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M74HC73-1中文资料

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August 2001s

HIGH SPEED : f MAX = 80MHz (TYP.) at V CC = 6V s

LOW POWER DISSIPATION:I CC =2μA(MAX.) at T A =25°C s

HIGH NOISE IMMUNITY:

V NIH = V NIL = 28 % V CC (MIN.)

SYMMETRICAL OUTPUT IMPEDANCE:|I OH | = I OL = 4mA (MIN)

BALANCED PROPAGATION DELAYS:t PLH ? t PHL

WIDE OPERATING VOLTAGE RANGE:V CC (OPR) = 2V to 6V

PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 73

DESCRIPTION

The M74HC73 is an high speed CMOS DUAL J-K FLIP FLOP WITH CLEAR fabricated with silicon gate C 2MOS technology.

Depending on the logic level applied to J and K inputs, this device changes state on the negative going transition of clock input pulse (CK). The

clear function is accomplished independently of the clock condition when the clear input (CLR) is taken low.

All inputs are equipped with protection circuits against static discharge and transient excess voltage.

M74HC73

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

PIN CONNECTION AND IEC LOGIC SYMBOLS

ORDER CODES

PACKAGE TUBE T & R DIP M74HC73B1R SOP M74HC73M1R

M74HC73RM13TR TSSOP

M74HC73TTR

M74HC73

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INPUT AND OUTPUT EQUIVALENT CIRCUIT

PIN DESCRIPTION

TRUTH TABLE

LOGIC DIAGRAM

PIN No SYMBOL NAME AND FUNCTION

1, 51CK, 2CK

Clock Input

2, 61CLR, 2CLR

Asynchronous Reset

Inputs

12, 91Q, 2Q True Flip-Flop Outputs

13, 81Q, 2Q

Complement Flip-Flop

Outputs

14, 7, 3, 10

1J, 2J, 1K, 2K Synchronous Inputs

Flip-Flop 1 and 211GND Ground (0V)4

Vcc Positive Supply Voltage

M74HC73

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ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied

(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter

Value Unit V CC Supply Voltage -0.5 to +7V V I DC Input Voltage -0.5 to V CC + 0.5V V O DC Output Voltage -0.5 to V CC + 0.5

V I IK DC Input Diode Current ± 20mA I OK DC Output Diode Current ± 20mA I O DC Output Current ± 25mA I CC or I GND DC V CC or Ground Current

± 50mA P D Power Dissipation 500(*)mW T stg Storage Temperature -65 to +150

°C T L

Lead Temperature (10 sec)

300

°C

Symbol Parameter

Value Unit V CC Supply Voltage 2 to 6V V I Input Voltage 0 to V CC V V O Output Voltage 0 to V CC V T op Operating Temperature -55 to 125°C t r , t f

Input Rise and Fall Time

V CC = 2.0V 0 to 1000ns V CC = 4.5V 0 to 500ns V CC = 6.0V

0 to 400

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DC SPECIFICATIONS

Symbol

Parameter

Test Condition

Value Unit

V CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.

Max.

Min.Max.

V IH

High Level Input Voltage

2.0 1.5 1.5 1.5V 4.5

3.15 3.15 3.156.0

4.2

V IL

Low Level Input Voltage

2.00.50.50.5V

4.5 1.35 1.35 1.356.0 1.8

1.8

1.8V OH

High Level Output Voltage

2.0I O =-20 μA 1.9 2.0 1.9 1.9V

4.5I O =-20 μA 4.4 4.5 4.4 4.46.0I O =-20 μA

5.9

6.0 5.9 5.94.5I O =-4.0 mA 4.18 4.31 4.13 4.106.0

I O =-5.2 mA 5.68

5.8 5.63

5.60

V OL

Low Level Output Voltage

2.0I O =20 μA 0.00.10.10.1V 4.5I O =20 μA 0.00.10.10.16.0I O =20 μA 0.00.10.10.14.5I O =4.0 mA 0.170.260.330.406.0

I O =5.2 mA 0.18

0.260.330.40I I Input Leakage Current

6.0V I = V CC or GND ± 0.1± 1± 1μA I CC

Quiescent Supply Current

6.0

V I = V CC or GND

μA

M74HC73

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AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = t f = 6ns)

CAPACITIVE CHARACTERISTICS

1) C PD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I CC(opr) = C PD x V CC x f IN + I CC /2 (per FLIP/FLOP)

Symbol

Parameter

Test Condition

Value Unit

V CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.

Typ.Max.Min.

Max.Min.

Max.t TLH t THL Output Transition

Time 2.0307595110ns 4.581519226.07131619t PLH t PHL Propagation Delay

Time (CK - Q) 2.0421********ns

4.5142531386.012212632t PLH t PHL Propagation Delay

Time (CLR - Q) 2.054145180220ns

4.5182936446.01525

f MAX

Maximum Clock Frequency 2.0615 4.84MHz

4.5306024206.035

8028

t W(H) t W(L)Minimum Pulse Width (CK) 2.0187595110ns

4.561519226.06131619t W(L)

Minimum Pulse Width (CLR) 2.021*******ns

4.571519226.06131619t s

Minimum Set-up Time

2.0307595110ns

4.581519226.06

131619t h

Minimum Hold Time

2.0000ns

4.50006.0000t REM

Minimum Removal Time

2.025*******ns

4.571519226.0

Symbol

Parameter

Test Condition

Value Unit

V CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.

Typ.Max.Min.

Max.Min.

Max.C IN Input Capacitance 5.0510

pF C PD

Power Dissipation Capacitance (note 1)

5.0

M74HC73

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TEST CIRCUIT

L R T = Z OUT of pulse generator (typically 50?)

WAVEFORM 1: MINIMUM REMOVAL TIME

(f=1MHz; 50% duty cycle)

M74HC73 WAVEFORM 2 : MINIMUM PULSE WIDTH, PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)

WAVEFORM 3 : PROPAGATION DELAY TIME, MINIMUM PULSE WIDTH, SETUP AND HOLD TIME (f=1MHz; 50% duty cycle)

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M74HC73 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

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