OMAPL138_McBSP
///////////////////////////////////////////McBSP.C////////////////////////////////////////
//------------------------------------------------------------------------------
// \file test_McBSP.c
// \brief implementation of OMAP-L138 McBSP test.
//
//-----------------------------------------------------------------------------
#include "stdio.h"
#include "types.h"
#include "evmomapl138.h"
void InitDspIntc();
volatile unsigned int flag = 0;
//-----------------------------------------------------------------------------
//define McBSP0 register
#define PCR *(unsigned int *)0x01D10024
#define SRGR *(unsigned int *)0x01D10014
#define XCR *(unsigned int *)0x01D10010
#define RCR *(unsigned int *)0x01D1000C
#define SPCR *(unsigned int *)0x01D10008
#define DXR *(unsigned int *)0x01D10004
#define DRR *(unsigned int *)0x01D10000
void delay(unsigned int count)
{
unsigned int i=0;
for(i=0; i
}
//-----------------------------------------------------------------------------
// \brief tests the McBSP interface
//
// \param none.
//
// \return uint32_t
//-----------------------------------------------------------------------------
void TEST_McBSP(void)
{
printf("--------------------------------------------------------------------\r\n");
printf(" McBSP test\r\n\r\n");
printf("Because there is no Codec connected to McBSP on EVM\r\n");
printf("--------------------\r\n");
printf("So configure to use internal FS, bit CLK\r\n\r\n");
printf("There is no real Data input or Output\r\n\r\n");
printf("--------------------------------------------------------------------\r\n\r\n");
// Enable PSC and config PINMUX for McBSP.
printf("Enable McBSP0 via PSC, Disable first, Then Enable to Ensure McBSP in default state\r\n");
// EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_MCBSP0, PSC_DISABLE);
EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_MCBSP0, PSC_ENABLE);
printf("Configure McBSP0 PINMUX\r\n");
*(unsigned int *)0x01C14128 = 0x02222220; // PINMUX2 resgister
printf("Initialize McBSP0 registers\r\n");
printf("For SPCR register configuration, MUST follow TRM McBSP Initialization Procedue!\r\n");
SPCR &= ~(1<<23 |1<<22 | 1<<16 |1); // Disable FRST, GRST, XRST, RRST first.
PCR = (1 <<11 | //FSXM FS is determined by FSGM in SRGR
1 <<10 | // FSRM FS is generated internally, FSR is output
1 << 9 | // CLKXM is output pin driven by internal
1 << 8 | // CLKRM CLKR is output driven by internal
0 << 7 | // SCLKME internal clock
0 << 3 | // FSXP TX FS is active high
0 << 2 | // FSRP RX FS in active high
0 << 1 | // CLKXP TX data driven on rising edge of CLKX
0 ); // CLKRP RX data driven on falling edge of CLKR
SRGR = (0 << 31 | // sample rate generator clock
is free running
0 << 30 | //Rising edge CLKS generates CLKG and FSG
1 << 29 | // smaple rate generator clock taken from internal
1 << 28 | // FSX is driven by FSG.
31<< 16 | // Frame period value +1, 2 phase *16 bit.
0 << 8 | // Frame width value +1
149<< 0 ); // sample rate generator clock frequency: CPU=300MHz, McBSP default to SYSCLK2=CPU/2, so bit clock=1MHz
// user need to configure it according to your own system requirement.
RCR = ( 0 << 31 | // dual-phase frame
0 << 24 | //1 word in phase 2
2 << 21 | // 16 bit word in phase 2
0 << 19 | // No companding
1 << 18 | // Ignor extra fs pulse
1 << 16 | // 1-bit delay
1 << 8 | // 1 word in phase 1
5 << 5 | //16 bit word in phase 1
0 << 4 | // no reversal
0 );
XCR = ( 0 << 31 | // dual-phase frame
0 << 24 | // 1 word in phase 2
2 << 21 | // word length is 16 bit
0 << 19 | //no companding
1 << 18 | // Ignore fs glitch
1 << 16 | //1 bit delay
1 << 8 | //1 word in phase 1
5 << 5 | //16 bit word
0 << 4 | // no reversal
0 );
delay (100);
SPCR |= (1 << 22); // Enable GRST
SPCR |= (1 << 16); //Enabel XRST
SPCR |= (1 << 15); //Enabel DLB
delay(50);
SPCR &= ~(1 << 16); //Disable XRST
InitDspIntc();
SPCR |= (1 << 16 | 1); //Enable RRST, XRST
// if (!(SPCR && (1<<18))) // Feed DXR if XSR is empty.
// DXR =2;
SPCR |= (1 << 23); //Enable FRST
}
unsigned int tempRX = 2;
unsigned int rxtemp = 2;
// set breakpoint within ISR to verify interrupt.
interrupt void McBSP_ISR_TX(void)
{
printf("transfer\n");
// if (SPCR && 2)
// rxtemp = DRR;
// printf("drr = %d\n",rxtemp);
#if 0
if (SPCR && 0x20000)
DXR = rxtemp;
#endif
}
interrupt void McBSP_ISR_RX(void)
{
printf("receiver\n");
if (SPCR && 2)
rxtemp = DRR;
printf("drr = %d\n",rxtemp);
flag = 0;
// if (SPCR && 0x20000)
// DXR = tempRX;
}
////////////////////////////////////////////////////int_dsp.c////////////////////////
#include "stdio.h"
#include "c6x.h"
#define EVTFLAG0 (*(volatile unsigned int*)0x01800000)
#define EVTSET0 (*(volatile unsigned int*)0x01800020)
#define EVTCLR0 (*(volatile unsigned int*)0x01800040)
#define EVTCLR1 (*(volatile unsigned int*)0x01800044)
#define EVTCLR2 (*(volatile unsigned int*)0x01800048)
#define EVTCLR3 (*(volatile unsigned int*)0x0180004c)
#define INTMUX3 (*(volatile unsigned int*)0x0180010c)
#define INTMUX2 (*(volatile unsigned int*)0x01800108)
extern far void vectors();
unsigned int NMI_counter = 0;
interrupt void c_NMI(void)
{
printf("/n NMI interrupt entered!\n");
NMI_counter++;
}
void InitDspIntc()
{
unsigned int temp;
printf("Configure DSP interrupt controller!\n");
EVTCLR0 = 0xFFFFFFFF; //Clear ALL interrupt status
EVTCLR1 = 0xFFFFFFFF;
EVTCLR2 = 0xFFFFFFFF;
EVTCLR3 = 0xFFFFFFFF;
// INTMUX3 = (INTMUX3&0xffff0000)|0x4100;//Map #65 event to DSP interrupt #13
// INTMUX3 = (INTMUX3&0x00ffffff)|0x57000000; //Map McBSP TX(88) to DSP interrupt #11
INTMUX2 = (INTMUX3&0xffffff00)|0x00000058; //Map McBSP RX(87) to DSP interrupt #12
/* Set interrupt vector address */
temp = ISTP;
temp &= 0x03ff; // aligne to 1Kbyte
temp |= (unsigned int)vectors;
ISTP = temp;
ICR=0xfff0;//Clear status in IFR, bit 0~3 is reserved.
IER=0x00001002;//Enable Int 11,12 and NMIE to enable globle interrupts
CSR |= 1; //Enable GIE.
}
//////////////////////////////////////////////C6x_vectors.asm////////////////////
********************************************************************************
*------------------------------------------------------------------------------
* Global symbols defined here and exported out of this file
*------------------------------------------------------------------------------
.global _vectors
.global _c_int00
.global _c_NMI
.global _vector2
.global _vector3
.global _vector4
.global _vector5
.global _vector6
.global _vector7
.global _vector8
.global _vector9
.global _vector10
.global _vector11
.global _McBSP_ISR_RX
.global _vector12
.global _vector13
.global _vector14
.global _vector15
.global _IRQdisable
.global _IRQenable
*------------------------------------------------------------------------------
* Global symbols referenced in this file but defined somewhere else.
* Remember that your interrupt service routines need to be referenced here.
*------------------------------------------------------------------------------
.ref _c_int00
*------------------------------------------------------------------------------
* This is a macro that instantiates one entry in the interrupt service table.
*------------------------------------------------------------------------------
VEC_ENTRY .macro addr
STW B0,*--B15
MVKL addr,B0
MVKH addr,B0
B B0
LDW *B15++,B0
NOP 2
NOP
NOP
.endm
*------------------------------------------------------------------------------
* This is a dummy interrupt service routine used to initialize the IST.
*------------------------------------------------------------------------------
_vec_dummy:
B B3
NOP 5
*------------------------------------------------------------------------------
* This is the actual interrupt service table (IST). It is properly aligned and
* is located in the subsection .text:vecs. This means if you don't explicitly
* specify this section in your
linker command file, it will default and link
* into the .text section. Remember to set the ISTP register to point to this
* table.
*------------------------------------------------------------------------------
.sect ".vector"
.align 1024
_vectors:
_vector0: VEC_ENTRY _c_int00 ;RESET
_vector1: VEC_ENTRY _c_NMI ;NMI
_vector2: VEC_ENTRY _vec_dummy ;RSVD
_vector3: VEC_ENTRY _vec_dummy
_vector4: VEC_ENTRY _vec_dummy
_vector5: VEC_ENTRY _vec_dummy
_vector6: VEC_ENTRY _vec_dummy
_vector7: VEC_ENTRY _vec_dummy
_vector8: VEC_ENTRY _vec_dummy
_vector9: VEC_ENTRY _vec_dummy
_vector10: VEC_ENTRY _vec_dummy
_vector11: VEC_ENTRY _vec_dummy
_vector12: VEC_ENTRY _McBSP_ISR_RX
_vector13: VEC_ENTRY _vec_dummy
_vector14: VEC_ENTRY _vec_dummy
_vector15: VEC_ENTRY _vec_dummy
*------------------------------------------------------------------------------
********************************************************************************
* End of vecs.asm
********************************************************************************