The Application of Two-Dimensional X-ray Hot Stage in Flip Chip Package Failure Analysis Yan Li,Rahul Panat,Bin Li,Rose Mulligan,Purushotham Kaushik Muthur Srinath,and Arun Raman
Abstract—Advancement of silicon and packaging technologies toward lower power and higher functionality requires better understanding between materials and process interactions.This paper illustrates the applications of2-D X-ray metrology incorpo-rated with a hot stage system for the?rst time in the literature, which allows one to simulate heating pro?les of up to300?C and observe the behavior of materials in situ within the packages. Three case studies are discussed:1)segregation of metal par-ticles in the next-generation thermal interface material,leading to corner thermal resistance(Rjc)degradation;(2)?rst level interconnect(FLI)solder bump bridging during chip attach of a large die server package with high substrate die area warpage in which limits of the die area substrate warpage need to be set in order to avoid FLI solder bump bridging during the chip attach solder re?ow process;and3)second level interconnect solder joint bridging at the surface mounting process of a large die package attached with an integrated heat spreader.By being able to study failures in situ at high temperatures,a new dimension to the package failure analysis is presented in this paper.
Index Terms—In situ high-temperature2-D X-ray,next-generation thermal interface material(NG-TIM),package failure analysis,solder joint bridging.
I.I NTRODUCTION
A FLIP CHIP microprocessor package consists of different
layers of materials such as Cu integrated heat spreader (IHS)or lid,Si die,epoxy under?ll,and an organic substrate made of many layers(see Fig.1).Packages are assembled at high temperatures due to soldering processes involved in the?rst level interconnect(FLI)and second level intercon-nect(SLI)as well as the component attach.For lead-free and halogen-free packages,the soldering temperatures can go as high as260?C[1].Due to high temperatures involved in the assembly,the differential thermal expansion coef?cients of the various package constituents can give rise to stresses in the package and result in warpage[2].For example,in certain?ip chip packages,a room temperature convex shape around the die area could gradually change to a concave shape upon heating [2].The high temperature and package dynamic warpage can introduce issues such as solder bump bridging,solder voiding,
Manuscript received July21,2010;revised November3,2010and November21,2010;accepted December2,2010.Date of publication December30,2010;date of current version March9,2011.
The authors are with Intel Corporation,Chandler,AZ85226USA (e-mail:yan.a.li@https://www.wendangku.net/doc/1811254123.html,;rahul.panat@https://www.wendangku.net/doc/1811254123.html,;bin4.li@https://www.wendangku.net/doc/1811254123.html,;rose. mulligan@https://www.wendangku.net/doc/1811254123.html,;purushotham.kaushik.muthur.srinath@https://www.wendangku.net/doc/1811254123.html,;arun. raman@https://www.wendangku.net/doc/1811254123.html,).
Color versions of one or more of the?gures in this paper are available online at https://www.wendangku.net/doc/1811254123.html,.
Digital Object Identi?er
10.1109/TDMR.2010.2103315
Fig.1.Schematic diagram of a?ip chip package,with C4joint forming
the FLI.IHS or lid is an optional part depending upon processor thermal
requirements.The schematic shows a BGA as the SLI.The SLI could also be
made of pins(PGA)or lands(LGA).
substrate trace crack,and thermal interface material(TIM)
thermal resistance(TRES)https://www.wendangku.net/doc/1811254123.html,ually,the defects are
detected and analyzed at room temperature.Sometimes,it is
very dif?cult to?nd the root cause of the failures without an
in situ study at high temperatures.
Two-dimensional X-ray imaging systems are customarily
used for the inspection of both FLI and SLI solder joints
inside?ip chip packages after the re?ow process.They are also
important failure analysis techniques for detecting defects in
packages,such as solder joint bridge,missing solder,substrate
trace cracks,etc.To fully understand the failures happening at
elevated temperatures,we put a hot stage,which can heat units
up to the designed temperature and is transparent to X-ray,into
a2-D X-ray chamber.In situ X-ray observations of the failures
happening at high temperatures are thus possible using the2-D
X-ray hot stage.This paper summarizes some important case
studies at Intel,where failure mechanisms have been identi?ed
based on in situ2-D X-ray studies at elevated temperatures.
II.B ACKGROUNDS OF THE C ASE S TUDIES
A.NG-TIM Study
The TIM is the material between the die and the IHS(or
lid),as shown in Fig.1.It is the medium for heat conduction
from the Si die backside to the IHS.Development of the next-
generation TIM(NG-TIM)is needed as Si technology contin-
ues to develop according to Moore’s law and thermal design
power rises with added Si functionality[3].The NG-TIM
must provide a low-resistance thermal path,be mechanically
stable in high-moisture environments and over the operating
temperature,provide stress coupling between the die and IHS,
and meet manufacturing process and equipment speci?cations 1530-4388/$26.00?2011IEEE
Fig.2.TRES measurement shows corner Rjc degradation in the units with a NG-TIM material after 125-cycle
TCB.
Fig.3.CSAM images at lid-to-TIM interface from a unit after 125-cycle TCB (a);a unit after 25-h UHAST stress (b);and an unstressed unit (c).CSAM images on the die corners of a unit after 125-cycle TCB and a unit after 25-h UHAST stress are shown in (d)and (e),respectively.Dark contrast in the image shows the metal particles in that NG-TIM material.
[3],[4].One of the NG-TIMs developed so far was studied,which is a polymer solder hybrid material with both polymer and metal particles.The metal particles are low melting alloys,and the melting point is about 65?C.It was used as the TIM between the die and IHS for performance evaluation.TRES measurements show that the TRES at the corners (corner Rjc )is degraded after 125-thermal-cycle (TCB,?55?C to 125?C)stress.The corner Rjc is good after a 25-h unbiased highly accelerated stress test (UHAST,130?C,85%relative humid-ity)(shown in Fig.2).C-mode scanning acoustic microscope (CSAM)images (see Fig.3(a)and (b))at the lid-to-TIM interface were taken for units after the 125-cycle TCB and those after the 25-h UHAST stress.The metal particles in this NG-TIM material show up as dark contrast in the CSAM images.For both units,the distribution of the metal particles at the die corners is much lower than that at the die https://www.wendangku.net/doc/1811254123.html,pared with the unit after the 25-h UHAST,the unit after the 125-cycle TCB stress has even less distribution of metal particles at the corners,and the size of the particles at the
corners is much larger,as shown in Fig.3(d)and (e).At room temperature,when the material was applied to the die,the distribution of the metal particles was uniform.After the sealant cure (one of the processes during the IHS attach process with high temperature),the CSAM images of the unit before any reliability stress indicate that the metal particle distribution is similar with that in the unit after the UHAST,as shown in Fig.3(c).To understand the reasons behind the change in the metal particle distribution in this NG-TIM material after the unit went through a high-temperature process,a 2-D X-ray hot stage was used to study its behavior at elevated temperatures.B.In Situ 2-D X-ray Studies of FLI Solder Joint Bridging
The chip attach module (CAM)is the process of intercon-necting the die to the substrate and is the most important part in the assembly process ?ow of ?ip chip packages.During the CAM process,a ?ux is printed on the top of solder balls on the substrate.The die is then placed on the solder balls with high precision.The die and the substrate then pass through an oven,and the solder balls are re?owed to make the required I/O and power connections between the die and the substrate.Adjacent solder bumps may get bridged during the re?ow process due to the following reasons:1)misplaced die at the onset;2)die movement during re?ow because of the bubbling of ?ux at high temperatures;3)high substrate warpage in the die area;and 4)high warpage of the carrier of the microprocessor unit.The 2-D X-ray hot stage can be used to observe the solder joint bridging during CAM re?ow.After the die placement,the unit can be placed on the 2-D X-ray hot stage to re?ow the solder instead of using the oven.In situ 2-D X-ray images and videos can be recorded during the entire re?ow process.
C.In Situ 2-D X-ray Studies of BGA Solder Joint Bridging In surface mounting technology (SMT),the failure rate of solder bridging defects for ball grid array (BGA)components has increased signi?cantly with the increase of package form factors.Although the literature on this solder bridging defect has focused mainly on ?ne-pitch packages [5],BGAs in large packages are not immune to the bridging defect even with relatively larger ball pitches.We found that BGA solder joint bridging occurred in the center area of a large lidded package with a 1-mm pitch.To understand the failure mechanism of the BGA solder joint bridging in large packages,the 2-D X-ray hot stage was applied to capture in situ X-ray images in the center area of a large package with IHS during SMT re?ow.
III.E XPERIMENTAL A PPARATUS AND P ROCEDURE A.Two-Dimensional X-ray Hot Stage
Fig.4shows a schematic diagram of the 2-D X-ray hot stage.An aluminum hot stage that is 65mm ×45mm in size and 4mm in depth is used.Two heaters and one thermocouple are built inside the stage.The stage is attached to a ?xture,which also contains of built-in fan and circuit controlling the temper-ature of the hot stage.The heating pro?le can be programmed using the software by setting up the ramping rate and sitting
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Fig.4.Schematic diagram of the 2-D X-ray hot
stage.
Fig.5.In situ 2-D X-ray study of a NG-TIM material at 125?C:2-D X-ray image taken (a)at room temperature,(b)at 125?C for 10s,and (c)at 125?C for 15min.
time at a certain temperature.Samples are put on the Al hot stage,and then,the whole setup sits in the X-ray chamber.Two-dimensional X-ray images or videos are taken while the hot stage is heated up according to the programmed heat pro?le.
B.NG-TIM Study Using Two-Dimensional X-ray Hot Stage This NG-TIM ?lm was cut into small pieces.Two thin glass slides were put on both sides of one small piece,and a sandwich structure was made.The sample was then put on the 2-D X-ray hot stage.The 2-D X-ray hot stage was heated up according to the programmed temperature pro?le.At the same time,2-D X-ray images and videos were recorded.An in situ 2-D X-ray study of the material was performed at both 125?C and 260?C,as shown in Figs.5and 6,respectively.
C.In Situ 2-D X-ray Studies of C4(FLI)Solder Joint Bridging To understand the failure mechanism of C4solder bump bridging during the CAM re?ow process due to incoming substrate warpage,we select substrates with very high die area warpage.Fig.7shows a typical contour plot of high substrate warpage in the die attach area.All the substrates that we selected have spherical concave shapes,with one
high
Fig.6.In situ 2-D X-ray study of a NG-TIM material at 260?C:2-D X-ray images were taken (a)at room temperature,(b)at 260?C for 10s,and (c)at 260?C for 15
min.
Fig.7.Typical contour plot of the substrates selected for the C4solder joint bridging experiment.The plot shows ?xed increment contours on the substrate in the die attach area (before die attach).The shape is spherical concave,and the darker the color,the higher the contour elevation.The highest corner is labeled as red triangle.The solder bump bridging corner is usually the second highest corner,labeled as a red dot.
corner.After ?ux printing and die placement,the units were put on the 2-D X-ray hot stage.The heating pro?le of the hot stage was programmed to mimic the re?ow pro?le in the chip attachment.Two-dimensional X-ray images and videos were recorded during the experiment.
D.In Situ 2-D X-ray Studies of BGA Solder Joint Bridging A large assembled package with IHS was placed on a board,which was already printed with solder paste with a stencil.The sample was then put on the 2-D X-ray hot stage and heated up to the re?ow temperature;2-D X-ray images and videos were recorded during the re?ow.
IV .R ESULTS AND D ISCUSSION
A.NG-TIM Study Using Two-Dimensional X-ray Hot Stage The dark contrast in the 2-D X-ray images shown in Figs.5and 6indicates the metal particles inside the NG-TIM material.At room temperature,the distribution of the metal particles
144IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY,VOL.11,NO.1,MARCH2011
was uniform.The metal particles started moving around in the polymer matrix when the temperature reached around65?C. The volume of the material expands,and the density of the metal particles became smaller and smaller as the temperature https://www.wendangku.net/doc/1811254123.html,rger particles and areas without metal particles were https://www.wendangku.net/doc/1811254123.html,rger movement of the metal particles happened when the temperature was about220?C.The particle size and the area without any metal particles became even bigger. Based on the in situ2-D X-ray study of the material,we can have the following hypothesis for the corner TRES degradation. At room temperature,when this NG-TIM was applied on the die,the distribution of the metal particles was uniform.When the unit was heated up during process and reliability stress testing,the NG-TIM material tends to behave like a viscous ?uid,and the mobility of low melting metal particles increases once the temperature reaches65?C.Because of the dynamic warpage of the package,the convex shape around the die area gradually changes to a concave shape.The viscous?uid then tends to?ow toward the die center area as more space between the IHS and the die would appear at the die center.During the movement,the melting metal particles could coalesce to form bigger particles.After the125-cycle TCB stress,the unit is heated up125times,and more and more metal particles at the die corners move to the die center area,which may lead to low metal particle coverage at the die corners and cause higher corner TRES.To?x this problem,modi?cation on this NG-TIM matrix polymer is needed so that the metal particles would not move around at elevated temperatures.
B.In Situ2-D X-ray Studies of C4Solder Joint Bridging
The X-ray images taken before heating up the hot stage show that there was no die misalignment on the units.Fig.8 shows the heating pro?le as well as the X-ray images of the second highest corner(labeled as red dot in Fig.7)taken at different locations of the heating pro?le.There is no signi?cant change on the solder balls until the temperature reaches above the melting temperature of the lead-free solder.Solder joint bridging happened thereafter within6s.The X-ray images labeled1–6show how the solder bump bridging happened during6s.At?rst,a tiny solder line formed between two diagonally adjacent solder bumps(1in Fig.8).The width of the solder lines grew larger and larger until it became the same as the diameter of the solder bumps(2–6in Fig.8).No signi?cant changes were observed on the solder bumps after6s.
For most cases,the solder bump bridging only happened at the second highest corner(labeled as red dot in Fig.7).For all the other three corners,we did not observe any solder bump bridging.Fig.9shows the2-D X-ray images of the highest corner and the solder bridging corner taken before and after the solder re?ow.For other corners,no signi?cant change was observed.In Fig.9(d),we can see some gray dark circles around the solder bumps,which may indicate the bumps on the die. Considering the fact that there was no die misalignment before the re?ow(shown in Fig.9(c)),we can conclude that the die shifted toward the highest corner during the re?ow.
Based on the observations made by the2-D X-ray hot stage, we have the following hypothesis for the solder bump
bridging Fig.8.In situ2-D X-ray study of C4solder joint bridging due to incoming die attach area substrate warpage.Solder joint bridging happened within6s when the temperature reaches the melting temperature of the Pb-free solder. The green line is the programmed temperature pro?le,while the red line shows the real temperature pro?le.
due to incoming die attach area substrate warpage.Because of the large warpage of the substrate,the gap between the solder ball on the substrate and the die bump is the smallest for the highest corner.At the highest corner,the solder may wet the die bump a little earlier than the other three corners when the temperature reaches the melting temperature of the solder. Once the solder wets the die bump at the highest corner,the die will be pulled down and dragged toward that corner.The movement of the die while the solder is wetting the second highest corner may cause the solder bump bridging.We also found that the bump layout may also in?uence the result.If the warpage difference is small between the highest and the second highest corner and the second highest corner has a corner bump while the highest corner does not,solder bump bridging will happen at the highest corner.The solder may wet the corner bump at the second highest corner a little earlier,and the die
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Fig.9.Two-dimensional X-ray images of the solder bridging corner taken (a)before re?ow and (b)after re?ow.Two-dimensional X-ray images of the highest corner taken (c)before re?ow and (d)after
re?ow.
Fig.10.In situ 2-D X-ray images showing formation of solder bridging at center area of a large package with IHS in SMT solder re?ow.Two-dimensional X-ray images taken (a)before re?ow and (b)–(d)during re?ow.BGA solder joint bridging happened in the center of the package.The center solder bumps move around and touch the adjacent solder bumps and caused the bridging.
is dragged toward that corner and cause solder bump bridging at the highest corner.Limits of die area substrate warpage need to be set in order to avoid C4solder bump bridging during the chip attach solder re?ow process.
C.In Situ Two-Dimensional X-ray Studies of BGA Solder Joint Bridging
The 2-D X-ray image taken before the SMT re?ow on the hot stage shown in Fig.10(a)indicates that there was no package-to-board misalignment.Once the temperature reached the melting temperature of the lead-free solder,the center solder balls collapsed heavily,and the molten solder bulged out
from
Fig.11.Schematic diagram showing the failure mechanism of BGA solder bridging in a large package with IHS.Due to a heavy package weight and a large warpage of the large package,solder balls in the center collapse under a large pad force and bulge out from pad,leading to a reduction of joint gap distance.
the board pads,leading to a reduction of the joint gap distance (shown in Fig.10(b)).Interestingly,it was observed that the molten solder moved around pads,and for some of the joints,the molten solder moved toward each other,resulting in a further reduction of the joint gap distance,which is shown in Fig.10(c).When two adjacent molten solder balls are in contact with each other,a bridged joint is formed,as shown in Fig.10(d).
Based on the in situ 2-D X-ray data,we come up with the following hypothesis for BGA solder joint bridging in large packages.As shown in Fig.11,the weight of a large package with IHS is relatively heavy,sometimes around 40g.Considering the dynamic warpage of the package,there will be a signi?cant amount of force applied on the board pads in the center of the package during SMT re?ow.Solder balls in the center area undergo a big collapse and bulge out from the pad periphery,which leads to a reduction in the solder joint gap distance.As two adjacent molten solder balls move and are in contact with each other,a bridged joint forms to reduce the total surface energy of the molten solder.The in situ 2-D X-ray imaging results clearly indicate that the failure mechanism of solder joint bridging in large packages with IHS is due to a large force applied on the center pad in the re?ow,which is induced by the package weight and dynamic warpage as well as the dynamic motion of the solder in time at liquidus.To limit the BGA solder joint bridging,board pads need to be designed to keep solder balls from moving around.
V .C ONCLUSION
The 2-D X-ray hot stage was used to observe failures of ?ip chip packages at elevated temperatures.The heat pro?le of the hot stage can be programmed to mimic the solder re?ow pro?le in the manufacturing environment.In situ X-ray images and videos were taken while heating up the packages.The hot stage was employed to study a new TIM at high temperatures.It was found that the low-melting-point alloy ?ller particles in the material started moving around in the polymer matrix when the temperature was above the alloy melting temperature.The density of the metal particles became smaller and smaller,forming larger particles along with areas without metal parti-cles.The unique property of this NG-TIM material can lead to a nonuniform metal ?ller distribution if applied as the TIM in a ?ip chip package due to the high-temperature process and the dynamic warpage of the package.It can also cause corner TRES degradation during reliability stress tests such as TCB.The C4solder joint bridging during chip attach solder re?ow in units
146IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY,VOL.11,NO.1,MARCH2011 with high die area substrate warpage was studied by the2-D
X-ray hot stage.The C4solder joint bridging usually occurred
at the second highest corner of the die area and happened within
a few seconds once the temperature reached the melting point
of the solder.The solder wets the die side bump at the highest
corner?rst,and the die is dragged toward that corner.The
die movement while the solder is wetting caused the solder
joint bridging in the second highest corner.BGA solder joint
bridging in large packages with IHS during surface mounting
solder re?ow was also analyzed using the2-D X-ray hot stage.
Due to the relatively heavy weight and the dynamic warpage of
the large packages,the solder balls in the center area undergo
a big collapse and bulge out from the pad periphery,when the
temperature is above their melting point.The center solder balls
also move around and are in contact with each other,which
leads to the BGA solder joint bridging.
A CKNOWLEDGMENT
The authors would like to thank H.Ramanan,Y.J.Wang,and
M.Y.C.Luk for their efforts in the case study of FLI solder
bump bridging and NG-TIM thermal resistance degradation,
respectively,and Y.Liu,R.Dias,B.Pathangey,and D.Goyal
for the motivation and helpful discussions.
R EFERENCES
[1]K.H.Kim,S.H.Huh,and K.Suganuma,“Effects of intermetallic com-
pounds on properties of Sn–Ag–Cu lead-free soldered joints,”J.Alloys
Compd.,vol.352,no.1/2,pp.226–236,Mar.2003.
[2]C.K.Lee,W.K.Loh,K.E.Ong,and C.Ian,“Study of dynamic warpage of
?ip chip packages under temperature re?ow,”in Proc.Int.Electron.Manuf.
Technol.,Putrajaya,Malaysia,2006,pp.185–190.
[3]R.S.Prasher,J.Y.Chang,I.Sauciuc,S.Narasimhan,D.Chau,G.Chrysler,
A.Myers,S.Prstic,and C.Hu,“Nano and micro technology-based next-
generation package-level cooling solutions,”Intel Technol.J.,vol.9,no.4,
pp.285–296,2005.
[4]S.S.Tonapi,R.A.Fillion,F.J.Schattenmann,H.S.Cole,J.D.Evans,and
B.G.Sammakia,“An overview of thermal management for next generation
microelectronic devices,”in Proc.IEEE/SEMI Adv.Manuf.Conf.,2003,
pp.250–254.
[5]M.Y.Li and C.Q.Wang,“Solder joints design attribute to no solder bridge
for?ne pitch device,”in Proc.Electron.Packag.Technol.,2003,pp.
70–75.
Yan Li received the B.S.and M.S.degrees in physics
from Peking University,Beijing,China,in1996and
1999,respectively,and the Ph.D.degree in materials
science and engineering from Northwestern Univer-
sity,Evanston,IL,in2006.
Since2006,she has been a Senior Package Failure
Analysis Engineer with the Assembly Technology
Development Quality and Reliability Laboratory,In-
tel Corporation,Chandler,AZ.In Northwestern Uni-
versity,her research was focused on the synthesis
and characterization of boron-based nanowires and nanotubes.In Intel,she focuses on the quality and reliability of electronic packages,fundamental understanding of failure modes and failure mechanisms of electronic packages,development of new tools and techniques for fault isolation,and failure analysis of electronic packages.She has nine journal publications in the?eld of materials science and
engineering.
Rahul Panat received the B.S.degree in mechan-
ical engineering from the Government College of
Engineering,Pune,India,in1997,the M.S.degree
in mechanical engineering from the University of
Massachusetts Amherst,Amherst,in1999,and the
Ph.D.degree from the Department of Theoretical and
Applied Mechanics,University of Illinois at Urbana-
Champaign(UIUC),Urbana,in2004.
At UIUC,he worked on the thermodynamics of
stress-driven diffusion in thermal barrier systems
for his dissertation.Since2004,he has been with the Packaging R&D Center,Intel Corporation,Chandler,AZ,where he has worked on several problems such as the lead-free conversion of Flash memory processors,?ne line–space substrate development,and MLCC passives and their integration onto Intel packages.He was involved in the group that enabled the world’s?rst“halogen-free”(green)chip by eliminating halogenated?ame retardants.He currently works on R&D problems involving the packaging of large server microprocessors.He has?ve journal publications and two patent applications to his credit.
Dr.Panat was a recipient of several awards,including the Gold Medal for Excellence in Graduate Research from the MRS(2002),the Mavis Memorial Fund Scholarship(2002and2003),the Dissertation Completion Fellowship (2003),the Henry Langhaar Graduate Award(2004),and the Stanley Weiss Best Dissertation Award(2005)at UIUC.He was also awarded the Divisional Recognition Award for his work on the halogen-free chip.He has worked as an NSF Panelist in the area of bio-and nanomechanics of
materials.
Bin Li received the B.S.and M.S.degrees in mate-
rials science and engineering from Tsinghua Univer-
sity,Beijing,China,in1996and1999,respectively,
and the Ph.D.degree in materials science from The
University of Texas at Austin,Austin,in2007.
Since2007,he has been with Assembly Tech-
nology Development,Intel Corporation,Chandler,
AZ,where he is currently a Development Engineer
of assembly process,focusing on the fundamental
understanding of potential failure mechanisms aris-
ing due to package–motherboard and die–package interactions and the development of next-generation package concept and die–package integration schemes.
Rose Mulligan was born in Colorado Springs in1973.She received the B.S. degree in chemical engineering from the University of Michigan,Ann Arbor, in1995.
She is currently with Intel Corporation,Chandler,AZ,where she focuses on developing process packaging
technologies.
Purushotham Kaushik Muthur Srinath received
the B.E.degree in mechanical engineering from
Bangalore University,Bangalore,India,in2000and
the M.S degree in materials science and engineering
from the University of Texas at Arlington,Arlington,
in2004.
Prior to obtaining the M.S.degree,he worked
in the?eld of process piping.Since2005,he has
been a Failure Analysis Engineer with the Assem-
bly Technology Development Quality and Reliability
Group,Intel Corporation,Chandler,AZ.His areas of expertise include X-ray imaging techniques for electronic package failure analysis,indentation creep testing,and creep deformation in lead-free solders. He has authored or coauthored four papers in the?eld of electronic packaging and materials.
Mr.Srinath was awarded the national prize for the best undergraduate project in mechanical engineering in India for his work in computational?uid dynamics.
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Arun Raman received the B.Tech degree in chemi-cal engineering from the Indian Institute of Technol-ogy Madras,Chennai,India,in1997and the Ph.D. degree from the Department of Polymer Science and Engineering,University of Massachusetts Amherst, Amherst,in2002.
Since2002,he has been with Intel Corporation, Chandler,AZ,where he was a Senior Package Fail-ure Analysis Engineer and currently manages the failure analysis group involved in Intel’s32-nm tech-nology package development.His expertise includes package thermal failure analysis and reliability engineering.His research interests also include strengths of materials and interfaces and development of phenomenological material models that have a predictive capability,with a fo-cus toward polymer mechanics.He has authored over15journal and conference publications in varied?elds such as package substrate failure analysis,metal migration failure mechanisms,indium as a solder thermal interface material, laser spallation as a tool for intrinsic adhesive strength,environmental stress cracking of glassy thermoplastics,and elastomers as energy devices.