HD74LS76AP中文资料
HD74LS76A
Dual J-K Flip-Flops (with Preset and Clear)
REJ03D0417–0300
Rev.3.00
Jul.22.2005 Features
? Ordering Information
Part Name Package Type Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LS76AP DILP-16
pin PRDP0016AE-B
(DP-16FV)
P —
HD74LS76ARPEL SOP-16
pin(JEDEC) PRSP0016DG-A
(FP-16DNV)
RP EL(2,500
pcs/reel)
Note: Please consult the sales office for the above package availability. Pin Arrangement
Function Table
Inputs Outputs
Preset Clear Clock J K Q Q L H X X X H L H L X X X L H L L X X X H* H* H H ↓ L L Q 0 Q 0
H H ↓ H L H
L H H ↓ L H L H H H ↓ H H Toggle
H H H X X Q 0 Q 0
H; high level, L; low level, X; irrelevant, ↓; transition from high to low level,
Q 0; level of Q before the indicated steady-state input conditions were established.
Q 0; complement of Q 0 or level of Q before the indicated steady-state input conditions were established.
Toggle; each output changes to the complement of its previous level on each active transition indicated by ↓.
* This configuration is nonstable; that is, it will not persist when preset and clear inputs return to their inactive (high) level.
Block Diagram (1/2)
Absolute Maximum Ratings
Item Symbol Ratings Unit
Supply voltage V CC 7 V
Input voltage
V IN 7 V Power dissipation P T 400 mW Storage temperature
Tstg
–65 to +150
°C
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Item Symbol Min Typ Max Unit
Supply voltage V CC 4.75 5.00 5.25 V I OH — — –400 μA
Output current I OL — — 8 mA Operating temperature Topr –20 25 75 °C
Clock frequency f clock 0 — 30 MHz Clock High
t w 20 — —
Pulse width Clear Preset Low t w 25 — — ns
“H” Data t su 20↓ — —
Setup time “L” Data
t su 20↓ — — ns
Hold time t h
0↓ — — ns
Electrical Characteristics
(Ta = –20 to +75 °C)
Item Symbol min. typ.* max. Unit Condition
V IH 2.0 — — V
Input voltage
V IL —
— 0.8 V V OH 2.7 — — V
V CC = 4.75 V, V IH = 2 V, V IL = 0.8 V,
I OH = –400 μA
— — 0.5 I OL = 8 mA Output voltage
V OL
— — 0.4 V I OL = 4 mA V CC = 4.75 V, V IH = 2 V,
V IL = 0.8 V
J, K — — 20
Clear — — 60
Preset — —
60 Clock I IH — — 80
μA V CC = 5.25 V, V I = 2.7 V
J, K — — –0.4 Clear — — –0.8
Preset — — –0.8 Clock I IL ** — — –0.8 mA V CC = 5.25 V, V I = 0.4 V
J, K — — 0.1 Clear — — 0.3
Preset — — 0.3 Input
current
Clock I I — — 0.4
mA V CC = 5.25 V, V I = 7 V
Short-circuit output
current
I OS –20 — –100 mA V CC = 5.25 V Supply current***
I CC — 4 6 mA V CC = 5.25 V
Input clamp voltage V IK — — –1.5 V V CC = 4.75 V, I IN = –18 mA
Notes: * V CC = 5 V, Ta = 25°C
** I IL should not be measured when preset and clear inputs are low at same time. *** With all outputs open, I CC is measured with the Q and Q outputs high in turn. At the time of measurement, the clock input is grounded.
Switching Characteristics
(V CC = 5 V, Ta = 25°C)
Item Symbol Inputs Outputs min. typ. max. Unit Condition
Maximum clock frequency f max 30 45 MHz
t PLH — 15 20 ns
Propagation delay time t PHL
Clear Preset Clock
Q, Q — 15 20 ns C L = 15 pF, R L = 2 k ?
Timing Definition
Testing Method
Test Circuit
1. ?max, t PLH, t PHL, (Clock→Q, Q)
2. t PHL, t PLH (Clear, Preset→ Q, Q)
Waveforms 1
Waveforms 2
Package Dimensions
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