P-TO252-3-11P-TO252-3-23P-TO251-3-11P-TO251-3-21
IPS09N03LA IPU09N03LA
Parameter
Symbol Conditions
Unit
min.
typ.
max.
Thermal characteristics
Thermal resistance, junction - case R thJC -- 2.4K/W
SMD version, device on PCB
R thJA
minimal footprint --756 cm 2 cooling area 5)
--50
Electrical characteristics, at T j =25 °C, unless otherwise specified Static characteristics
Drain-source breakdown voltage V (BR)DSS V GS =0 V, I D =1 mA 25--V
Gate threshold voltage V GS(th)V DS =V GS , I D =20 μA 1.2 1.62Zero gate voltage drain current
I DSS
V DS =25 V, V GS =0 V, T j =25 °C
-0.1
1
μA V DS =25 V, V GS =0 V, T j =125 °C
-10100Gate-source leakage current I GSS V GS =20 V, V DS =0 V -10100nA Drain-source on-state resistance
R DS(on)
V GS =4.5 V, I D =30 A -1215m ?
V GS =4.5 V, I D =30 A, SMD version -11.814.8V GS =10 V, I D =30 A -7.48.8V GS =10 V, I D =30 A, SMD version
-7.28.6Gate resistance R G -1-?Transconductance
g fs
|V DS |>2|I D |R DS(on)max , I D =30 A
23
46
-S 5)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2
(one layer, 70 μm thick) copper area for drain Values 2)
Current is limited by bondwire; with an R thJC =2.4 K/W the chip is able to carry 67 A.3)
See figure 3
4) T j,max =150 °C and duty cycle D <0.25 for V GS <-5 V
1)
J-STD20 and JESD22
IPS09N03LA IPU09N03LA Parameter Symbol Conditions Unit
min.typ.max. Dynamic characteristics
Input capacitance C iss-12351642pF Output capacitance C oss-474630 Reverse transfer capacitance C rss-6192
Turn-on delay time t d(on)-7.010ns Rise time t r- 5.68.4
Turn-off delay time t d(off)-2030
Fall time t f- 3.4 5.1
Gate Charge Characteristics6)
Gate to source charge Q gs- 4.3 5.7nC Gate charge at threshold Q g(th)- 2.0 2.6
Gate to drain charge Q gd- 2.8 4.3 Switching charge Q sw- 5.27.3
Gate charge total Q g-1013
Gate plateau voltage V plateau- 3.5-V
Gate charge total, sync. FET Q g(sync)V DS=0.1 V,
V GS=0 to 5 V
-8.712nC
Output charge Q oss V DD=15 V, V GS=0 V-1014 Reverse Diode
Diode continous forward current I S--50A Diode pulse current I S,pulse--350
Diode forward voltage V SD V GS=0 V, I F=50 A,
T j=25 °C
-0.97 1.2V
Reverse recovery charge Q rr V R=15 V, I F=I S,
d i F/d t=400 A/μs
--10nC
6) See figure 16 for gate charge parameter definition T C=25 °C
Values
V GS=0 V, V DS=15 V,
f=1 MHz
V DD=15 V, V GS=10 V,
I D=25 A, R G=2.7 ?
V DD=15 V, I D=25 A,
V GS=0 to 5 V
1 Power dissipation
5 Typ. output characteristics
9 Drain-source on-state resistance
13 Avalanche characteristics
IPS09N03LA IPU09N03LA Package Outline
P-TO252-3-11: Outline
Footprint:Packaging:
IPS09N03LA IPU09N03LA Package Outline
P-TO252-3-23: Outline
Footprint:
IPS09N03LA IPU09N03LA Package Outline
P-TO251-3-11: Outline
P-TO251-3-21: Outline
IPS09N03LA IPU09N03LA Published by
Infineon Technologies AG
Bereich Kommunikation
St.-Martin-Stra?e 53
D-81541 München
? Infineon Technologies AG 1999
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