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MAX3785UTT-T中文资料

MAX3785

6.25Gbps, 1.8V PC Board Equalizer

________________________________________________________________Maxim Integrated Products 1

19-2630; Rev 4; 10/08

For pricing, delivery, and ordering information,please contact Maxim Direct at 1-888-629-4642,or visit Maxim’s website at https://www.wendangku.net/doc/2915138133.html,.

General Description

The MAX3785 6.25Gbps equalizer operates from a sin-gle 1.8V supply and compensates for transmission-medium losses encountered with FR-4 transmission lines. Optimized for low-voltage, high-density, DC-cou-pled interconnections between the line card and switch card, the MAX3785 enables a system upgrade path while maintaining a legacy rate of 2.5G bps to 3.125Gbps. Roughly the size of two 0603 passive com-ponents, the MAX3785 easily provides placement and routing flexibility.

The MAX3785 is composed of an equalizer, limiting amplifier, and output driver. For data rates of 3.2G bps and lower, the MAX3785 equalizes signals for spans up to 40in of FR-4 board material. For data rates up to 6.25Gbps, the MAX3785 compensates for 30in of FR-4board material. The MAX3785 is coding independent,functioning equally well for 8b/10b or scrambled signals.The MAX3785 features DC-coupled current-mode logic (CML) data inputs and outputs. It is packaged in a tiny 1.5mm ×1.5mm chip-scale package (USCP?) and a 6-pin TDFN package.

Applications

HSBI for ≤6.4Gbps Double IEEE 802.3ae XAUI Double STM-16/OC-48

Features

?Single 1.8V Supply

?Very Low Power, 60mW

?Spans 30in with FR-4 at 6.25Gbps ?Operates from 1.0Gbps to 6.4Gbps

?Coding Independent, 8b/10b or Scrambled ?DC-Coupled CML Inputs and Outputs ?

Small 1.5mm ×1.5mm Footprint

Ordering Information

Typical Application Circuit

UCSP is a trademark of Maxim Integrated Products, Inc.

+Denotes a lead-free/RoHS-compliant package.*EP = Exposed pad.

M A X 3785

6.25Gbps, 1.8V PC Board Equalizer 2_______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Supply Voltage, V CC to GND.................................-0.5V to +6.0V Continuous Output Current (OUT+, OUT-).......-25mA to +25mA Input Voltage (IN+, IN-)..............................-0.5V to (V CC + 0.5V)Operating Ambient Temperature Range

(UBL, UTB).........................................................0°C to +85°C

Operating Ambient Temperature Range (ITT).....-20°C to +85°C Storage Ambient Temperature Range...............-55°C to +150°C Continuous Power Dissipation (T A = +70°C)

6-Pin TDFN (derate 24.4mW above +70°C)..................1.95W

ELECTRICAL CHARACTERISTICS

Note 2:Using input pattern 0000011111 at 6.25Gbps.

Note 3:Difference in deterministic jitter between data source and equalizer output, evaluated at 2.5Gbps, 3.2Gbps, 5Gbps, and

6.25Gbps. Pattern used: PRBS (27), ninety-six 0s, 1, 0, 1, 0, PRBS (27), ninety-six 1s, 0, 1, 0, 1.

Note 4:Signal is applied differentially at input to a 6-mil wide, loosely coupled stripline. Deterministic jitter at the output of the

transmission line is from media-induced loss, not from clock source modulation (see Figure 1).

MAX3785

6.25Gbps, 1.8V PC Board Equalizer

_______________________________________________________________________________________

Typical Operating Characteristics

(V CC = +1.8V, T A = +25°C, unless otherwise noted. Measurements done at 6.25Gbps, 500mV P-P at the source with a test pattern:PRBS (2

7), ninety-six 0s, 1, 0, 1, 0, PRBS (27), ninety-six 1s, 0, 1, 0, 1. Deterministic jitter of the MAX3785 and the board was mea-sured using Tektronix’s FrameScan?. Deterministic jitter of the system was subtracted from the measured value. Eye diagrams were acquired by FrameScan, which includes system jitter but eliminates random jitter.)

FrameScan is a trademark of Tektronix.

EYE DIAGRAM OF UNEQUALIZED SIGNAL AFTER 30in OF FR-4

MAX3785 toc01

30ps/div

70mV/div TEST PATTERN, 6.25Gbps, WITHOUT RANDOM JITTER, INCLUDING 13ps SYSTEM JITTER

EYE DIAGRAM OF EQUALIZED SIGNAL AFTER 30in OF FR-4

MAX3785 toc02

30ps/div

70mV/div TEST PATTERN, 6.25Gbps, WITHOUT RANDOM JITTER, INCLUDING 13ps SYSTEM JITTER

EYE DIAGRAM OF EQUALIZED SIGNAL AFTER 30in OF FR-4

MAX3785 toc03

30ps/div

70mV/div

210 - 1 PRBS, 6.25Gbps, WITHOUT RANDOM JITTER, INCLUDING 13ps SYSTEM JITTER

M A X 3785

6.25Gbps, 1.8V PC Board Equalizer 4_______________________________________________________________________________________

Typical Operating Characteristics (continued)

(V CC = +1.8V, T A = +25°C, unless otherwise noted. Measurements done at 6.25Gbps, 500mV P-P at the source with a test pattern:PRBS (27), ninety-six 0s, 1, 0, 1, 0, PRBS (27), ninety-six 1s, 0, 1, 0, 1. Deterministic jitter of the MAX3785 and the board was measured using Tektronix’s FrameScan. Deterministic jitter of the system was subtracted from the measured value. Eye diagrams were acquired by FrameScan, which includes system jitter but eliminates random jitter.)

EYE DIAGRAM OF UNEQUALIZED SIGNAL AFTER 30in OF FR-4

MAX3785 toc04

50ps/div

70mV/div TEST PATTERN, 3.125Gbps, WITHOUT RANDOM JITTER, INCLUDING 13ps SYSTEM JITTER

EYE DIAGRAM OF EQUALIZED SIGNAL AFTER 30in OF FR-4

MAX3785 toc05

50ps/div

70mV/div TEST PATTERN, 3.125Gbps, WITHOUT RANDOM JITTER, INCLUDING 13ps SYSTEM JITTER

EYE DIAGRAM OF EQUALIZED SIGNAL AFTER 30in OF FR-4

MAX3785 toc06

50ps/div

70mV/div

CRPAT, 3.125Gbps,

WITHOUT RANDOM JITTER, INCLUDING 13ps SYSTEM JITTER

EQUALIZER OPERATING CURRENT

vs. TEMPERATURE

M A X 3785 t o c 07

TEMPERATURE (°C)

C U R R E N T (m A )

102030405060708090100

DETERMINISTIC JITTER vs. BOARD LENGTH (FR-4)

(INPUT LEVEL OF 500mV P-P , TEST PATTERN)

BOARD LENGTH (in)

J I T T E R (p s )

10152025303540455055606551040

DETERMINISTIC JITTER vs. SIGNAL LEVEL (TEST PATTERN, 30in OF FR-4 BOARD)

DIFFERENTIAL SIGNAL LEVEL (V P-P )

J I T T E R (p s )

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

2.0

MAX3785

6.25Gbps, 1.8V PC Board Equalizer

_______________________________________________________________________________________5

Typical Operating Characteristics (continued)

DETERMINISTIC JITTER vs. DATA RATE

FOR 10in OF FR-4 BOARD (INPUT LEVEL OF 500mV P-P )

DATA RATE (Gbps)

J I T T E R (p s )

6.5

5.5

4.5

3.5

152025

3002.5

DETERMINISTIC JITTER vs. DATA RATE

FOR 20in OF FR-4 BOARD (INPUT LEVEL OF 500mV P-P )

DATA RATE (Gbps)J I T T E R (p s )

6.55.54.53.5

510

152025

3002.5

DETERMINISTIC JITTER vs. DATA RATE

FOR 30in OF FR-4 BOARD (INPUT LEVEL OF 500mV P-P )

DATA RATE (Gbps)

J I T T E R (p s )

6.5

5.54.53.5510152025300

2.5EQUALIZER INPUT RETURN GAIN (SDD11)(INPUT SIGNAL LEVEL = -40dBm, POWER OFF)

M A X 3785 t o c 13

FREQUENCY (MHz)

G A I N (d B )

1000-30-20-100102030-40

100

10,000EQUALIZER INPUT RETURN GAIN (SDD22)(INPUT SIGNAL LEVEL = -40dBm, IN+ HIGH)

M A X 3785 t o c 14

FREQUENCY (MHz)

G A I N (d B )

1000-30-20-100102030-40

10010,000

M A X 3785

Functional Description

The MAX3785 6.25G bps PC board equalizer consists of an equalizer, limiting amplifier, offset driver, and off-set cancellation circuit (see Figure 2). The equalizer block compensates for the attenuation caused by the PC board. The limiting amplifier squares up the signal at the output of the equalizer block. The offset cancella-tion circuit corrects for internal offset in the limiting amplifier to minimize pulse-width distortion. This intro-duces a low-frequency cutoff. The data must achieve a 50% mark/space ratio in less than 100μs. The specified minimum differential input must be maintained to avoid oscillation.

Input and Output Structures

An equivalent DC input circuit is shown in Figure 3. It has an equivalent DC differential input resistance of 100Ω. The output buffer is implemented using current-mode logic (CML), as shown in Figure 4.

Package Description

The chip-scale package (UCSP) has a bump pitch of 0.5mm (19.7 mils) and a bump diameter of 0.3mm (12

mils). Lay out the solder pad spacing on 0.5mm (19.7mils), a pad size of 0.25mm (10 mils) and a solder

mask opening of 0.33mm (13 mils). Round or square pads are permissible. For detailed information on UCSP layout and handling, go to Maxim’s website,https://www.wendangku.net/doc/2915138133.html,. The enclosed package description was accurate at the time of publication. For the MAX3785, all the balls shown in row B of the drawing are unpopulated. See the Package Information section for the latest package information.

6.25Gbps, 1.8V PC Board Equalizer 6_______________________________________________________________________________________

Figure 2. Functional Diagram of the MAX3785

MAX3785

6.25Gbps, 1.8V PC Board Equalizer

_______________________________________________________________________________________7

Figure 3. Equalizer Input DC Equivalent Circuit

Figure 4. CML Output Equivalent Circuit

Package Information

For the latest package outline information and land patterns, go to https://www.wendangku.net/doc/2915138133.html,/packages .PACKAGE TYPE

PACKAGE CODE

DOCUMENT NO.

6 UCSP B9-321-00936 WLP W91B1+221-00676 TDFN

T633-2

21-0137

M A X 3785

6.25Gbps, 1.8V PC Board Equalizer Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are

implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

8_____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600?2008 Maxim Integrated Products

is a registered trademark of Maxim Integrated Products, Inc.