当前位置：文档库 › HSMP-3812中文资料

HSMP-3812中文资料

Surface Mount RF PIN Low Distortion Attenuator Diodes

Technical Data

Features

?Diodes Optimized for:

–Low Distortion Attenuating –Microwave Frequency

Operation

?Surface Mount Packages

–Single and Dual Versions

–Tape and Reel Options

Available

?Low Failure in Time (FIT) Rate[1]

?Lead-free Option Available Note:

1.For more information see the

Surface Mount PIN Reliability Data Sheet.

HSMP-381x Series and

HSMP-481x Series

Package Lead Code

Identification, SOT-23

(Top View)

Description/Applications The HSMP-381x series is specifically designed for low distortion attenuator applica-tions. The HSMP-481x products feature ultra low parasitic inductance in the SOT-23 and SOT-323 packages. They are specifically designed for use at frequencies which are much higher than the upper limit for conventional diodes.

A SPICE model is not available for PIN diodes as SPICE does not provide for a key PIN diode characteristic, carrier lifetime.

SERIES

SINGLE

Package Lead Code

Identification, SOT-323

(Top View)

Absolute Maximum Ratings[1] T C = +25°C

Symbol Parameter Unit SOT-23SOT-323

I f Forward Current (1 μs Pulse)Amp11

P IV Peak Inverse Voltage V Same as V BR Same as V BR

T j Junction Temperature°C150150

T stg Storage Temperature°C-65 to 150-65 to 150

θjc Thermal Resistance[2]°C/W500150

Notes:

1.Operation in excess of any one of these conditions may result in permanent damage to

the device.

2.T C = +25°C, where T C is defined to be the temperature at the package pins where

contact is made to the circuit board.

Electrical Specifications T C = +25°C (Each Diode)

Conventional Diodes

Minimum Maximum Maximum Minimum Maximum Part Package Breakdown Total Total High Low Number Marking Lead Voltage Resistance Capacitance Resistance Resistance HSMP-Code Code Configuration V BR (V)R T (?)C T (pF)R H (?)R L (?)

3810E0[1]0Single100 3.00.35150010 3812E2[1]2Series

3813E3[1]3Common Anode

3814E4[1]4Common Cathode

381B E0[2]B Single

381C E2[2]C Series

381E E3[2]E Common Anode

381F E4[2]F Common Cathode

Test Conditions V R = V BR I F = 100 mA V R = 50 V I R = 0.01 mA I F = 20 mA

Measure f = 100 MHz f = 1 MHz f = 100 MHz f= 100 MHz

I R≤ 10 μA

High Frequency (Low Inductance, 500 MHz – 3 GHz) PIN Diodes

Minimum Maximum Typical Maximum Typical Part Package Breakdown Series Total Total Total Number Marking Lead Voltage Resistance Capacitance Capacitance Inductance HSMP-Code Code Configuration V BR (V)R S (?)C T (pF)C T (pF)L T (nH)

4810EB B[1]Dual Cathode100 3.00.350.4 1.0 481B EB B[2]Dual Cathode

Test Conditions V R = V BR I F = 100 mA V R = 50 V V R = 50 V f = 500 MHz–

Measure f = 1 MHz f = 1 MHz 3 GHz

I R≤ 10 μA V R = 0 V

Notes:

1.Package marking code is white.

2.Package laser marked.

Typical Parameters at T C = 25°C

Part Number Series Resistance

Carrier Lifetime

Reverse Recovery Time

Total Capacitance

HSMP-R S (?)

τ (ns)

T rr (ns)

C T (pF)

381x 7515003000.27 @ 50 V Test Conditions

I F = 1 mA I F = 50 mA V R = 10 V f = 1 MHz

f = 100 MHz

I R = 250 mA

I F = 20 mA 90% Recovery

Typical Parameters at T C = 25°C (unless otherwise noted), Single Diode

R F R E S I S T A N C E (O H M S )

0.01

0.1

100

I F – FORWARD BIAS CURRENT (mA)

Figure 2. RF Resistance vs. Forward Bias Current.

10128

16141820

T O T A L C A P A C I T A N C E (p F )

REVERSE VOLTAGE (V)

Figure 1. RF Capacitance vs. Reverse Bias.1000

100

DIODE RF RESISTANCE (OHMS)

Figure 3. 2nd Harmonic Input Intercept Point vs. Diode RF Resistance.

I N P U T I N T E R C E P T P O I N T (d B m )

10010

0.1

0.01

I F – F O R W A R D C U R R E N T (m A )

V F – FORWARD VOLTAGE (mA)

Figure 4. Forward Current vs. Forward Voltage.

INPUT

Figure 5. Four Diode π Attenuator. See Application Note 1048 for Details.

VOLTAGE

Typical Applications for Multiple Diode Products

Typical Applications for HSMP-481x Low Inductance Series

Microstrip Series Connection for HSMP-481x Series

In order to take full advantage of the low inductance of the HSMP-481x series when using them in series applications,

both lead 1 and lead 2 should be connected together, as shown in

Figure 7.

Figure 7. Circuit Layout.

Figure 9. Equivalent Circuit.

Figure 6. Internal Connections.HSMP-481x

Microstrip Shunt Connections for

HSMP-481x Series

In Figure 8, the center

conductor of the microstrip line is interrupted and leads 1 and 2 of the

HSMP-481x series diode are placed across the resulting gap. This forces the 1.5 nH lead inductance of leads 1 and 2 to appear as part of a low pass filter, reducing the shunt parasitic inductance and increasing the maximum available attenuation. The 0.3 nHof shunt inductance

external to the diode is created by the via holes, and is a good estimate for 0.032" thick material.

GROUND BY TWO

VIA HOLES

Figure 8. Circuit Layout.

Typical Applications for HSMP-481x Low Inductance Series (continued)

Figure 10. Circuit Layout.

Co-Planar Waveguide Shunt Connection for HSMP-481x Series

Co-Planar waveguide, with ground on the top side of the printed circuit board, is shown in Figure 10. Since it eliminates the need for via holes to ground, it offers lower shunt parasitic inductance and higher maximum attenuation when compared to a microstrip circuit.

Figure 11. Equivalent Circuit.

0.18 pF** Measured at -20 V

R j = 80

I 0.9R T C T = C P + C j

I = Forward Bias Current in mA

*See AN1124 for package models.

Equivalent Circuit Model HSMS-381x Chip*

Assembly Information

SOT-323 PCB Footprint

A recommended PC

B pad layout for the miniature SOT-323 (SC-70)package is shown in Figure 12(dimensions are in inches). This layout provides ample allowance for package placement by auto-mated assembly equipment without adding parasitics that could impair the performance.

Figure 12. PCB Pad Layout (dimensions in inches).

SOT-23 PCB Footprint

Figure 13. PCB Pad Layout.

TIME (seconds)

T E M P E R A T U R E (°C )

050100

150

200250

120

180

240

300

Figure 14. Surface Mount Assembly Profile.

SMT Assembly

Reliable assembly of surface mount components is a complex process that involves many

material, process, and equipment factors, including: method of heating (e.g., IR or vapor phase reflow, wave soldering, etc.)

circuit board material, conductor thickness and pattern, type of solder alloy, and the thermal

conductivity and thermal mass of components. Components with a low mass, such as the SOT-323/-23package, will reach solder reflow temperatures faster than those with a greater mass.

Agilent ’s diodes have been

qualified to the time-temperature profile shown in Figure 14. This profile is representative of an IR reflow type of surface mount assembly process.

After ramping up from room temperature, the circuit board with components attached to it (held in place with solder paste)

passes through one or more

preheat zones. The preheat zones increase the temperature of the board and components to prevent thermal shock and begin evaporat-ing solvents from the solder paste.The reflow zone briefly elevates the temperature sufficiently to produce a reflow of the solder.The rates of change of tempera-ture for the ramp-up and cool-down zones are chosen to be low enough to not cause deformation of the board or damage to compo-nents due to thermal shock. The maximum temperature in the reflow zone (T MAX ) should not exceed 235°C.

These parameters are typical for a surface mount assembly process for Agilent diodes. As a general guideline, the circuit board and components should be exposed only to the minimum tempera-tures and times necessary to achieve a uniform reflow of solder.

Package Dimensions

Outline SOT-323 (SC-70)

Package Characteristics

Lead Material...................................Copper (SOT-323); Alloy 42 (SOT-23)Lead Finish............................................................................Tin-Lead 85-15%Maximum Soldering Temperature..............................260°C for 5 seconds Minimum Lead Strength..........................................................2 pounds pull Typical Package Inductance ..................................................................2 nH Typical Package Capacitance ..............................0.08 pF (opposite leads)

Outline 23 (SOT-23)

Ordering Information

Specify part number followed by option. For example:

HSMP -381x -XXX

Bulk or Tape and Reel Option Part Number; x = Lead Code Surface Mount PIN

Option Descriptions

-BLK = Bulk, 100 pcs. per antistatic bag

-TR1 = Tape and Reel, 3000 devices per 7" reel -TR2 = Tape and Reel, 10,000 devices per 13" reel

Tape and Reeling conforms to Electronic Industries RS-481, “Taping of Surface Mounted Components for Automated Placement.”

For lead-free option, the part number will have the character "G" at the end, eg. -TR2G for a 10K pc lead-free reel.

0.30 (0.012)0.10 (0.004)

0.425 (0.017)

DIMENSIONS ARE IN MILLIMETERS (INCHES)

SIDE VIEW

END VIEW

DIMENSIONS ARE IN MILLIMETERS (INCHES)

Tape Dimensions and Product Orientation

For Outline SOT-23

Note: "AB" represents package marking code. "C" represents date code.

END VIEW

TOP VIEW

Device Orientation

For Outlines SOT-23/323

USER FEED

DESCRIPTION

SYMBOL SIZE (mm)SIZE (INCHES)LENGTH WIDTH DEPTH PITCH

BOTTOM HOLE DIAMETER A 0B 0K 0P D 1 3.15 ± 0.102.77 ± 0.101.22 ± 0.104.00 ± 0.101.00 + 0.050.124 ± 0.0040.109 ± 0.0040.048 ± 0.0040.157 ± 0.0040.039 ± 0.002CAVITY

DIAMETER PITCH POSITION D P 0E 1.50 + 0.104.00 ± 0.101.75 ± 0.100.059 + 0.0040.157 ± 0.0040.069 ± 0.004PERFORATION

WIDTH THICKNESS

W t18.00 + 0.30 – 0.100.229 ± 0.0130.315 + 0.012 – 0.0040.009 ± 0.0005CARRIER TAPE CAVITY TO PERFORATION (WIDTH DIRECTION)CAVITY TO PERFORATION (LENGTH DIRECTION)

F P 2

3.50 ± 0.052.00 ± 0.05

0.138 ± 0.0020.079 ± 0.002

DISTANCE BETWEEN CENTERLINE

https://www.wendangku.net/doc/2718165351.html,/semiconductors

For product information and a complete list of distributors, please go to our web site.For technical assistance call:

Americas/Canada: +1 (800) 235-0312 or (916) 788-6763

Europe: +49 (0) 6441 92460China: 10800 650 0017Hong Kong: (65) 6756 2394

India, Australia, New Zealand: (65) 6755 1939Japan: (+81 3) 3335-8152(Domestic/International), or 0120-61-1280(Domestic Only)Korea: (65) 6755 1989

Singapore, Malaysia, Vietnam, Thailand, Philippines,Indonesia: (65) 6755 2044Taiwan: (65) 6755 1843

Data subject to change.

(CARRIER TAPE THICKNESS)

(COVER TAPE THICKNESS)

DESCRIPTION

SYMBOL SIZE (mm)SIZE (INCHES)LENGTH WIDTH DEPTH PITCH

BOTTOM HOLE DIAMETER A 0B 0K 0P D 1 2.40 ± 0.102.40 ± 0.101.20 ± 0.104.00 ± 0.101.00 + 0.250.094 ± 0.0040.094 ± 0.0040.047 ± 0.0040.157 ± 0.0040.039 + 0.010CAVITY

DIAMETER PITCH POSITION D P 0E 1.55 ± 0.054.00 ± 0.101.75 ± 0.100.061 ± 0.0020.157 ± 0.0040.069 ± 0.004PERFORATION

WIDTH THICKNESS W t 18.00 ± 0.300.254 ± 0.020.315 ± 0.0120.0100 ± 0.0008CARRIER TAPE CAVITY TO PERFORATION (WIDTH DIRECTION)CAVITY TO PERFORATION (LENGTH DIRECTION)

F P 2 3.50 ± 0.052.00 ± 0.050.138 ± 0.0020.079 ± 0.002

DISTANCE

FOR SOT-323 (SC70-3 LEAD)An

8°C MAX FOR SOT-363 (SC70-6 LEAD)

10°C MAX

ANGLE

WIDTH

TAPE THICKNESS C T t 5.4 ± 0.100.062 ± 0.0010.205 ± 0.0040.0025 ± 0.00004COVER TAPE Tape Dimensions and Product Orientation

For Outline SOT-323