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SSM2335CBZ-REEL7,SSM2335CBZ-R2,EVAL-SSM2335Z, 规格书,Datasheet 资料

SSM2335CBZ-REEL7,SSM2335CBZ-R2,EVAL-SSM2335Z, 规格书,Datasheet 资料
SSM2335CBZ-REEL7,SSM2335CBZ-R2,EVAL-SSM2335Z, 规格书,Datasheet 资料

Filterless, High Efficiency,Mono 3 W Class-D Audio Amplifier

SSM2335

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. T rademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 781.329.4700 https://www.wendangku.net/doc/3b5639674.html, Fax: 781.461.3113 ?2008 Analog Devices, Inc. All rights reserved.

FEATURES

Filterless Class-D amplifier with Σ-Δ modulation

No sync necessary when using multiple Class-D amplifiers from Analog Devices, Inc.

3 W into 3 Ω load and 1.

4 W into 8 Ω load at 5.0 V supply with <1% total harmonic distortion (THD + N) 93% efficiency at 5.0 V, 1.4 W into 8 Ω speaker >96 dB signal-to-noise ratio (SNR)

Single-supply operation from 2.5 V to 5.5 V 20 nA ultralow shutdown current Short-circuit and thermal protection

Available in 9-ball, 1.5 mm × 1.5 mm WLCSP Pop-and-click suppression

Built-in resistors reduce board component count Default fixed 18 dB or user-adjustable gain setting

APPLICATIONS

Mobile phones MP3 players

Portable gaming Portable electronics Educational toys

GENERAL DESCRIPTION

The SSM2335 is a fully integrated, high efficiency, Class-D audio amplifier. It is designed to maximize performance for mobile phone applications. The application circuit requires a minimum of external components and operates from a single 2.5 V to 5.5 V supply. It is capable of delivering 3 W of continuous output power with <1% THD + N driving a 3 Ω load from a 5.0 V supply.

The SSM2335 features a high efficiency, low noise modulation scheme that requires no external LC output filters. The modu-lation continues to provide high efficiency even at low output power. It operates with 93% efficiency at 1.4 W into 8 Ω or 85% efficiency at 3 W into 3 Ω from a 5.0 V supply and has an SNR of >96 dB. Spread-spectrum pulse density modulation is used to provide lower EMI-radiated emissions compared with other Class-D architectures.

The SSM2335 has a micropower shutdown mode with a typical shutdown current of 20 nA. Shutdown is enabled by applying a logic low to the SD pin.

The device also includes pop-and-click suppression circuitry. This suppression circuitry minimizes voltage glitches at the output during turn-on and turn-off, reducing audible noise on activation and deactivation.

The fully differential input of the SSM2335 provides excellent rejection of common-mode noise on the input. Input coupling capacitors can be omitted if the input dc common-mode voltage is approximately V DD /2.

The default gain of the SSM2335 is 18 dB, but users can reduce the gain by using a pair of external resistors (see the Gain section). The SSM2335 is specified over the industrial temperature range of ?40°C to +85°C. It has built-in thermal shutdown and output short-circuit protection. It is available in a 9-ball, 1.5 mm × 1.5 mm wafer level chip scale package (WLCSP).

FUNCTIONAL BLOCK DIAGRAM

*INPUT CAPACITORS ARE OPTIONAL IF INPUT DC COMMON-MODE VOLTAGE IS APPROXIMATELY V DD /2.

7551-001

Figure 1.

SSM2335

Rev. 0 | Page 2 of 16

TABLE OF CONTENTS

Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Absolute Maximum Ratings ............................................................ 4 Thermal Resistance ...................................................................... 4 ESD Caution .................................................................................. 4 Pin Configuration and Function Descriptions ............................. 5 Typical Performance Characteristics ............................................. 6 Typical Application Circuits ......................................................... 11 Theory of Operation ...................................................................... 12 Overview ..................................................................................... 12 Gain .............................................................................................. 12 Pop-and-Click Suppression ...................................................... 12 Output Modulation Description .............................................. 12 Layout .......................................................................................... 13 Input Capacitor Selection .......................................................... 13 Power Supply Decoupling ......................................................... 13 Outline Dimensions ....................................................................... 14 Ordering Guide .. (14)

REVISION HISTORY

10/08—Revision 0: Initial Version

SSM2335

SPECIFICATIONS

V DD = 5.0 V, T A = 25°C, R L = 8 Ω +33 μH, unless otherwise noted.

1 Although the SSM2335 has good audio quality above 3 W, continuous output power beyond 3 W must be avoided due to device packaging limitations.

2 This value represents measured performance; packaging limitations must not be exceeded.

Rev. 0 | Page 3 of 16

SSM2335

Rev. 0 | Page 4 of 16

ABSOLUTE MAXIMUM RATINGS

Absolute maximum ratings apply at 25°C, unless otherwise noted. Table 2.

Parameter Rating

Supply Voltage

6 V Input Voltage

V DD Common-Mode Input Voltage V DD Continuous Output Power 3 W

Storage Temperature Range ?65°C to +150°C Operating Temperature Range ?40°C to +85°C Junction Temperature Range

?65°C to +165°C Lead Temperature (Soldering, 60 sec) 300°C ESD Susceptibility

2.5 kV

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Thermal Resistance

Package Type PCB θJA θJB Unit 9-Ball, 1.5 mm × 1.5 mm WLCSP 1S0P 162 39 °C/W

2S0P 76 21 °C/W

ESD CAUTION

SSM2335

Rev. 0 | Page 5 of 16

SSM2335

TOP VIEW BALL SIDE DOWN (Not to Scale)

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

07551-002

Figure 2. Pin Configuration

SSM2335

Rev. 0 | Page 6 of 16

TYPICAL PERFORMANCE CHARACTERISTICS

0.001

0.0001

0.0010.010.111007551-003

OUTPUT POWER (W)

0.01

0.1

1

10

100

T H D + N (%)

0.001

0.01

0.1

1

10

100

101001k

10k 100k

07551-006

FREQUENCY (Hz)

T H D +

N (%)

Figure 3. THD + N vs. Output Power into 8 Ω + 33 μH, Gain = 18 dB

Figure 6. THD + N vs. Frequency, V DD = 5 V, R L = 8 Ω + 33 μH, Gain = 18 dB

0.001

0.0001

0.0010.010.111007551-004

OUTPUT POWER (W)

0.01

0.1

110

100

T H D + N (%

)

0.001

0.01

0.1

1

10

100

101001k

10k 100k

07551-007

FREQUENCY (Hz)

T H D + N

(%)

Figure 7. THD + N vs. Frequency, V DD = 5 V, R L = 4 Ω + 33 μH, Gain = 18 dB

Figure 4. THD + N vs. Output Power into 4 Ω + 33 μH, Gain = 18 dB

0.001

0.0001

0.0010.010.111007551-005

OUTPUT POWER (W)

0.01

0.1110

100

T H D + N (%)

0.001

0.01

0.1

1

10

100

101001k

10k 100k

1-008

T H D

+ N (%)

0755FREQUENCY (Hz)

Figure 5. THD + N vs. Output Power into 3 Ω + 33 μH, Gain = 18 dB Figure 8. THD + N vs. Frequency, V DD = 5 V, R L = 3 Ω + 33 μH, Gain = 18 dB

SSM2335

Rev. 0 | Page 7 of 16

0.001

0.01

0.1

110

100

009

T H D + N (%)

1

0.001

0.01

0.1

10

100

101001k

10k 100k

07551-012

FREQUENCY (Hz)

T H D + N (%)

101001k

10k 100k 07551-FREQUENCY (Hz)

Figure 9. THD + N vs. Frequency, V DD = 3.6 V, R L = 8 Ω + 33 μH, Gain = 18 dB

0.001

010

T H D + N

(%)

0.010.1

110100

10

1001k

10k 100k 07551-FREQUENCY (Hz)

Figure 10. THD + N vs. Frequency, V DD = 3.6 V, R L = 4 Ω + 33 μH, Gain = 18 dB

0.01

0.1

1

10100

T H D + N (%)

0.001

101001k

10k 100k 07551-011

FREQUENCY (Hz)

Figure 11. THD + N vs. Frequency, V DD = 3.6 V, R L = 3 Ω + 33 μH, Gain = 18 dB Figure 12. THD + N vs. Frequency, V DD = 2.5 V, R L = 8 Ω + 33 μH, Gain = 18 dB

1

0.001

0.01

0.110

100

101001k

10k 100k

07551-013

FREQUENCY (Hz)

T H D + N (%)

Figure 13. THD + N vs. Frequency, V DD = 2.5 V, R L = 4 Ω + 33 μH, Gain = 18 dB

1

0.01

0.1

10

100

T H D + N (%)

0.001

10

1001k

10k 100k

07551-014

FREQUENCY (Hz)

Figure 14. THD + N vs. Frequency, V DD = 2.5 V, R L = 3 Ω + 33 μH, Gain = 18 dB

SSM2335

Rev. 0 | Page 8 of 16

2.22.4

2.62.8

3.0

3.23.4

3.6

3.8

00.5

1.01.5

2.0

2.5

3.03.5

4.54.02.5

3.0 3.5

4.0 4.5

5.0

07551-018SUPPLY VOLTAGE (V)

O U T P U T P O W E R (W )

2.5

3.0 3.5

4.0 4.5

5.0 5.5

6.0

015

S U P P L Y C U R R E N T (m A )

07551-SUPPLY VOLTAGE (V)

Figure 15. Supply Current vs. Supply Voltage

00.2

0.40.60.81.0

1.21.41.6

1.8

2.016

O U T P U T P O W E R (W )

07551-0SUPPLY VOLTAGE (V)00.5

Figure 16. Maximum Output Power vs. Supply Voltage, R L = 8 Ω + 33 μH,

Gain = 18 dB

1.0

1.5

2.02.5

3.0

3.5

4.02.5

3.0

3.5

4.0

4.5

5.0

07551-017

SUPPLY VOLTAGE (V)O U T P U T P O W E R (W )

Figure 17. Maximum Output Power vs. Supply Voltage, R L = 4 Ω + 33 μH,

Gain = 18 dB

Figure 18. Maximum Output Power vs. Supply Voltage, R L = 3 Ω + 33 μH,

Gain = 18 dB

102030405060

70

809010007551-019

OUTPUT POWER (W)

E F F I C I E N C Y (%)

Figure 19. Efficiency vs. Output Power into 8 Ω + 33 μH

0.4

0.8

1.2

1.6

2.0

2.4

2.8

3.2

3.6

010

20

30

40506070

80901000E F F I C I E N C Y (%)

07551-02OUTPUT POWER (W)

Figure 20. Efficiency vs. Output Power into 4 Ω + 33 μH

SSM2335

Rev. 0 | Page 9 of 16

0.02

0.04

0.06

0.08

0.10

0.12

00.30.60.9 1.2 1.5 1.81-021

P O W E R D I S S I P A T I O N (W )

0.02

0.040.060.080.100.120.140.160.18

07551-024OUTPUT POWER (W)

P O W E R D I S S I P A T I O N (W )

0755OUTPUT POWER (W)

Figure 21. Power Dissipation vs. Output Power into 8 Ω + 33 μH, V DD = 5 V

00

0.5

1.0

1.5

2.0

2.5

3.0

3.5

-022

P O W E R D I S S I P A T I O N (W )

0.05

0.10

0.15

0.200.25

0.30

07551OUTPUT POWER (W)

Figure 22. Power Dissipation vs. Output Power into 4 Ω + 33 μH, V DD = 5 V

00

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

07551-023

OUTPUT POWER (W)

0.02

0.04

0.06

0.08

P O W E R D I S S I P A T I O N (W )

Figure 23. Power Dissipation vs. Output Power into 8 Ω + 33 μH, V DD = 3.6 V

Figure 24. Power Dissipation vs. Output Power into 4 Ω + 33 μH, V DD = 3.6 V

50

100

150200250

300350

400450

07551-025OUTPUT POWER (W)

S U P P L Y C U R R E N T (m A )

Figure 25. Supply Current vs. Output Power into 8 Ω + 33 μH

100

200300400500600700800

S U P P L Y C U R R E N T (m A )

07551-026

OUTPUT POWER (W)

Figure 26. Supply Current vs. Output Power into 4 Ω + 33 μH

SSM2335

Rev. 0 | Page 10 of 16

27

P S R R (d B )

10

100

1k

10k

100k

07551-0FREQUENCY (Hz)

–1

1234

65

–2

07551-029TIME (ms)

V O L T A G E (V )

–2

2

4

6

810

12

14

16

18

Figure 27. Power Supply Rejection Ratio (PSRR) vs. Frequency

Figure 29. Turn-On Response

10

100

1k

10k

100k

07551-028

FREQUENCY (Hz)

C M R R (d B )

0–11234

76

5V O L T A G E (V )

–207551-030

TIME (μs)

–90

–50–70–30–101030507090

Figure 28. Common-Mode Rejection Ratio (CMRR) vs. Frequency Figure 30. Turn-Off Response

SSM2335

Rev. 0 | Page 11 of 16

TYPICAL APPLICATION CIRCUITS

EXTERNAL GAIN SETTINGS = 160k ?/(20k ? + R EXT )

*INPUT CAPACITORS ARE OPTIONAL IF INPUT DC COMMON-MODE VOLTAGE IS APPROXIMATELY V DD /2.

07551-031

Figure 31. Differential Input Configuration, User-Adjustable Gain

EXTERNAL GAIN SETTINGS = 160k ?/(20k ? + R EXT )

07551-032

Figure 32. Single-Ended Input Configuration, User-Adjustable Gain

SSM2335

Rev. 0 | Page 12 of 16OUTPUT > 0V

+5V

0V

THEORY OF OPERATION

OVERVIEW

The SSM2335 mono Class-D audio amplifier features a filterless modulation scheme that greatly reduces the external component count, conserving board space and, thus, reducing systems cost. The SSM2335 does not require an output filter but, instead, relies on the inherent inductance of the speaker coil and the natural filtering of the speaker and human ear to fully recover the audio component of the square wave output. Most Class-D amplifiers use some variation of pulse-width modulation (PWM), but the SSM2335 uses Σ-Δ modulation to determine the switching pattern of the output devices, resulting in a number of important benefits. Σ-Δ modulators do not produce a sharp peak with many harmonics in the AM frequency band, as pulse-width modulators often do. Σ-Δ modulation provides the benefits of reducing the amplitude of spectral components at high frequencies, that is, reducing EMI emission that might otherwise be radiated by speakers and long cable traces. The SSM2335 does not require external EMI filtering for twisted speaker cable lengths shorter than 10 cm. Due to the inherent spread-spectrum nature of Σ-Δ modulation, the need for oscillator synchronization is eliminated for designs incorporating multiple SSM2335 amplifiers.

The SSM2335 also offers protection circuits for overcurrent and temperature protection.

GAIN

The SSM2335 has a default gain of 18 dB that can be reduced by using a pair of external resistors with a value calculated as follows: External Gain Settings = 160 kΩ/(20 kΩ + R EXT)

POP-AND-CLICK SUPPRESSION

Voltage transients at the output of audio amplifiers can occur when shutdown is activated or deactivated. Voltage transients as low as 10 mV can be heard as an audio pop in the speaker. Clicks and pops can also be classified as undesirable audible transients generated by the amplifier system and, therefore, as not coming from the system input signal. Such transients may be generated when the amplifier system changes its operating mode. For example, the following may be sources of audible transients: system power-up and power-down, mute and unmute, input source change, and sample rate change. The SSM2335 has a pop-and-click suppression architecture that reduces these out-put transients, resulting in noiseless activation and deactivation. OUTPUT MODULATION DESCRIPTION

The SSM2335 uses three-level, Σ-Δ output modulation. Each output can swing from GND to V DD and vice versa. Ideally, when no input signal is present, the output differential voltage is 0 V because there is no need to generate a pulse. In a real-world situation, there are always noise sources present.

Due to this constant presence of noise, a differential pulse is generated, when required, in response to this stimulus. A small amount of current flows into the inductive load when the differ-ential pulse is generated.

Most of the time, however, output differential voltage is 0 V, due to the Analog Devices patent pending, three-level, Σ-Δ output modulation. This feature ensures that the current flowing through the inductive load is small.

When the user wants to send an input signal, an output pulse is generated to follow the input voltage. The differential pulse density is increased by raising the input signal level. Figure 33 depicts three-level, Σ-Δ output modulation with and without input stimulus.

OUT+

+5V

0V

OUT–

+5V

0V VOUT

OUTPUT < 0V

+5V

0V

OUT+

+5V

0V

OUT–

0V

–5V VOUT

OUTPUT = 0V

OUT+

+5V

0V

+5V

0V

OUT–

+5V

–5V

0V VOUT

7

5

5

1

-

3

3 Figure 33. Three-Level, Σ-Δ Output Modulation With and Without Input Stimulus

SSM2335

Rev. 0 | Page 13 of 16

LAYOUT

As output power continues to increase, care must be taken to lay out PCB traces and wires properly among the amplifier, load, and power supply. A good practice is to use short, wide PCB tracks to decrease voltage drops and minimize inductance. Ensure that track widths are at least 200 mil for every inch of track length for lowest DCR, and use 1 oz or 2 oz of copper PCB traces to further reduce IR drops and inductance. A poor layout increases voltage drops, consequently affecting efficiency. Use large traces for the power supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance.

Proper grounding guidelines help to improve audio performance, minimize crosstalk between channels, and prevent switching noise from coupling into the audio signal. To maintain high output swing and high peak output power, the PCB traces that connect the output pins to the load, as well as the PCB traces to the supply pins, should be as wide as possible to maintain the minimum trace resistances. It is also recommended that a large ground plane be used for minimum impedances.

In addition, good PCB layout isolates critical analog paths from sources of high interference. High frequency circuits (analog and digital) should be separated from low frequency circuits. Properly designed multilayer PCBs can reduce EMI emission and increase immunity to the RF field by a factor of 10 or more, compared with double-sided boards. A multilayer board allows a complete layer to be used for the ground plane, whereas the ground plane side of a double-sided board is often disrupted by signal crossover.

If the system has separate analog and digital ground and power planes, the analog ground plane should be directly beneath the analog power plane, and, similarly, the digital ground plane should be directly beneath the digital power plane. There should be no overlap between analog and digital ground planes or between analog and digital power planes. INPUT CAPACITOR SELECTION

The SSM2335 does not require input coupling capacitors if the input signal is biased from 1.0 V to V DD ? 1.0 V . Input capacitors are required if the input signal is not biased within this recom-mended input dc common-mode voltage range, if high-pass filtering is needed, or if a single-ended source is used. If high-pass filtering is needed at the input, the input capacitor and the input resistor of the SSM2335 form a high-pass filter whose corner frequency is determined by the following equation:

f C = 1/(2π × R IN × C IN )

The input capacitor can significantly affect the performance of the circuit. Not using input capacitors degrades both the output offset of the amplifier and the dc PSRR performance.

POWER SUPPLY DECOUPLING

To ensure high efficiency, low total harmonic distortion (THD), and high PSRR, proper power supply decoupling is necessary. Noise transients on the power supply lines are short-duration voltage spikes. Although the actual switching frequency can range from 10 kHz to 100 kHz, these spikes can contain frequency components that extend into the hundreds of megahertz. The power supply input needs to be decoupled with a good quality, low ESL, low ESR capacitor, with a minimum value of 4.7 μF. This capacitor bypasses low frequency noises to the ground plane. For high frequency transient noises, use a 0.1 μF capacitor as close as possible to the VDD pin of the device. Placing the decoupling capacitor as close as possible to the SSM2335 helps to maintain efficient performance.

SSM2335

Rev. 0 | Page 14 of 16

101507-OUTLINE DIMENSIONS

C

(BALL SIDE UP)

TOP VIEW

(BALL SIDE DOWN)

A

1

2

3

B

C

Figure 34. 9-Ball Wafer Level Chip Scale Package [WLCSP]

(CB-9-2)

Dimensions shown in millimeters

ORDERING GUIDE

Model Temperature Range Package Description Package Option Branding SSM2335CBZ-R21?40°C to +85°C 9-Ball Wafer Level Chip Scale Package [WLCSP] CB-9-2 Y1L

SSM2335CBZ-REEL 1

?40°C to +85°C 9-Ball Wafer Level Chip Scale Package [WLCSP] CB-9-2 Y1L SSM2335CBZ-REEL71?40°C to +85°C 9-Ball Wafer Level Chip Scale Package [WLCSP] CB-9-2 Y1L

EVAL-SSM2335Z 1

Evaluation Board

1

Z = RoHS Compliant Part.

SSM2335 NOTES

Rev. 0 | Page 15 of 16

SSM2335

Rev. 0 | Page 16 of 16

NOTES

?2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.

D07551-0-10/08(0)

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