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IRFU3710Z中文资料

IRFR3710Z IRFU3710Z

HEXFET ? Power MOSFET

7/31/03

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AUTOMOTIVE MOSFET

PD - 94740

Specifically designed for Automotive applications, this HEXFET ?

Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating tempera-ture, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.

Description

l Advanced Process Technology l Ultra Low On-Resistance

l 175°C Operating Temperature l Fast Switching

Repetitive Avalanche Allowed up to Tjmax

Features

D-Pak IRFR3710Z I-Pak IRFU3710Z

IRFR/U3710Z

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IRFR/U3710Z

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Fig 2. Typical Output Characteristics

Fig 1. Typical Output Characteristics Fig 3. Typical Transfer Characteristics

Fig 4. Typical Forward Transconductance

vs. Drain Current

V DS , Drain-to-Source Voltage (V)

0.1

100

V DS , Drain-to-Source Voltage (V)

2345678910111213141516

V GS , Gate-to-Source Voltage (V)

1.0

100

1000I D , D r a i n -t o -S o u r c e C u r r e n t (Α)

I D ,Drain-to-Source Current (A)

020

100G f s , F o r w a r d T r a n s c o n d u c t a n c e (S )

IRFR/U3710Z

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Fig 8. Maximum Safe Operating Area

Fig 6. Typical Gate Charge vs.

Gate-to-Source Voltage

Fig 5. Typical Capacitance vs.

Drain-to-Source Voltage

100

V DS , Drain-to-Source Voltage (V)10

100

1000

10000

100000

C , C a p a c i t a n c e (p F )

01020304050607080

Q G Total Gate Charge (nC)

0.0

2.04.06.08.010.012.0

V G S , G a t e -t o -S o u r c e

V o l t a g e (V )

0.10

1.00

10.00100.00

1000.00I S D , R e v e r s e D r a i n C u r r e n t (A )

1001000

V DS , Drain-to-Source Voltage (V)

0.1

100

1000

I D , D r a i n -t o -S o u r c e C u r r e n t (A )

IRFR/U3710Z

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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig 9. Maximum Drain Current vs.

Case Temperature

Fig 10. Normalized On-Resistance

vs. Temperature

-60-40-200

20406080100120140160180

T J , Junction Temperature (°C)

0.5

1.0

1.5

2.0

2.5

3.0

R D S (o n ) , D r a i n -t o -S o u r c e O n R e s i s t a n c e (N o r m a l i z e d

)

t 1 , Rectangular Pulse Duration (sec)

100

125

150

175

T C , Case Temperature (°C)

0102030405060

I D , D r a i n C u r r e n t (A )

IRFR/U3710Z

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V Fig 13b. Gate Charge Test Circuit

Fig 13a. Basic Gate Charge Waveform

Fig 12c. Maximum Avalanche Energy

vs. Drain Current

Fig 12a. Unclamped Inductive Test Circuit

I Fig 14. Threshold Voltage vs. Temperature

V DD

100

125

150

175

Starting T J , Junction Temperature (°C)

0100200300400500600700E A S , S i n g

l e P u l s e A v a l a n c h e E n e r g y (m J )

-75-50-25

75100125150175200

T J , Temperature ( °C )

1.0

2.0

3.0

4.0

G S (t h ) G a t e t h r e s h o l d V o l t

a g e (V )

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Fig 15. Typical Avalanche Current vs.Pulsewidth

Fig 16. Maximum Avalanche Energy

vs. Temperature

Notes on Repetitive Avalanche Curves , Figures 15, 16:(For further info, see AN-1005 at https://www.wendangku.net/doc/3814882169.html,)1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax . This is validated for every part type.

2. Safe operation in Avalanche is allowed as long asT jmax is not exceeded.

3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.

4. P D (ave) = Average power dissipation per single avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche).

6. I av = Allowable avalanche current.

7. ?T = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25°C in Figure 15, 16). t av = Average time in avalanche. D = Duty cycle in avalanche = t av ·f

Z thJC (D, t av ) = Transient thermal resistance, see figure 11)

P D (ave) = 1/2 ( 1.3·BV·I av ) = D T/ Z thJC

I av = 2D T/ [1.3·BV·Z th ]E AS (AR) = P D (ave)·t av

tav (sec)

100

125

150

175

Starting T J , Junction Temperature (°C)

050

100

150

200

E A R , A v a l a n c h e E n e r g y (m J )

IRFR/U3710Z

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Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET ? Power MOSFETs

* V GS = 5V for Logic Level Devices

V V d(on)

d(off)

V DD

Fig 18a. Switching Time Test Circuit

Fig 18b. Switching Time Waveforms

IRFR/U3710Z

D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches)

IRFR/U3710Z

I-Pak (TO-251AA) Package Outline Dimensions are shown in millimeters (inches)

IRFR/U3710Z

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Data and specifications subject to change without notice.

This product has been designed and qualified for the Automotive [Q101] market.

Qualification Standards can be found on IR’s Web site.

D-Pak (TO-252AA) Tape & Reel Information

Dimensions are shown in millimeters (inches)

16.3 ( .641 )15.7 ( .619 )8.1 ( .318 )7.9 ( .312 )

12.1 ( .476 )11.9 ( .469 )

FEED DIRECTION

16.3 ( .641 )15.7 ( .619 )

TRR

TRL

NOTES :

1. CONTROLLING DIMENSION : MILLIMETER.

2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).

3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

NOTES :

1. OUTLINE CONFORMS TO EIA-481.

16 mm

13 INCH

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at https://www.wendangku.net/doc/3814882169.html, for sales contact information .07/03

Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11).

Limited by T Jmax , starting T J = 25°C, L = 0.28mH R G = 25?, I AS = 33A, V GS =10V. Part not recommended for use above this value. Pulse width ≤ 1.0ms; duty cycle ≤ 2%.

Notes:

C oss eff. is a fixed capacitance that gives the same charging time

as C oss while V DS is rising from 0 to 80% V DSS .

Limited by T Jmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.

This value determined from sample failure population. 100% tested to this value in production.

When mounted on 1" square PCB (FR-4 or G-10 Material) . For recommended footprint and soldering techniques refer to application note #AN-994.