M30622MEP-XXXGP中文资料
M16C/62 Group (M16C/62P , M16C/62PT)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
REJ03B0001-0210Z
Rev.2.10Nov. 07, 2003
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1. Overview
The M16C/62 group (M16C/62P, M16C/62PT) of single-chip microcomputers are built using the high-per-formance silicon gate CMOS process using a M16C/60 Series CPU core and are packaged in a 80-pin,100-pin and 128-pin plastic molded QFP. These single-chip microcomputers operate using sophisticated instructions featuring a high level of instruction efficiency. With 1M bytes of address space, they are ca-pable of executing instructions at high speed. In addition, this microcomputer contains a multiplier and DMAC which combined with fast instruction processing capability, makes it suitable for control of various OA, communication, and industrial equipment which requires high-speed arithmetic/logic operations.
1.1 Applications
Audio, cameras, office/communications/portable/industrial equipment, automobile, etc
Specifications written in this manual are believed to be accurate, but are not guaranteed to be entirely free of error. Specifications in this manual may be changed for functional or performance improvements. Please make sure your manual is the latest edition.
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1. Overview
M16C/62 Group (M16C/62P , M16C/62PT)
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1.2 Performance Outline
Table 1.1 to table 1.3 list performance outline of M16C/62 group (M16C/62P, M16C/62PT).
Table 1.1 Performance outline of M16C/62 group (M16C/62P) (128-pin version) Item Performance M16C/62P
Number of basic instructions
91 instructions
Shortest instruction execution time 41.7ns(f(BCLK)=24MHz, VCC1=3.0 to 5.5V)100ns(f(BCLK)=10MHz, VCC1=2.7 to 5.5V)
Operation mode Single-chip, memory expansion and microprocessor mode Memory space 1 Mbyte (Available to 4M bytes by memory space expansion function)
Memory capacity See table 1.4 and 1.5 Product List Port
Input/Output : 113 pins, Input : 1 pin
Multifunction timer Timer A : 16 bits x 5 channels, Timer B : 16 bits x 6 channels Three phase motor control circuit Serial I/O
3 channels
Clock synchronous, UART,I 2C bus (1), IEBus (2)2 channels
Clock synchronous
A-D converter 10-bit A-D converter: 1 circuit, 26 channels D-A converter 8 bits x 2 channels DMAC
2 channels CRC calculation circuit CCITT-CRC
Watchdog timer 15 bits x 1 channel (with prescaler)
Interrupt
Internal: 29 sources, External: 8 sources, Software: 4 sources,Priority level: 7 levels Clock generating circuit
4 circuits
Main clock generation circuit (*),Subclock generation circuit (*),Ring oscillator, PLL synthesizer
(*)Equipped with a built-in feedback resistor.
Oscillation stop detection function Stop detection of main clock oscillation , re-oscillation detection function
Voltage detection circuit Available (option (4))
Supply voltage VCC1=3.0 to 5.5V, VCC2=2.7V to VCC1 (f(BCLK)=24MHz)VCC1=2.7 to 5.5V, VCC2=2.7V to VCC1 (f(BCLK)=10MHz)Power consumption
14 mA (VCC1=VCC2=5V, f(BCLK)=24MHz)8 mA (VCC1=VCC2=3V, f(BCLK)=10MHz)
1.8 μA (VCC1=VCC2=3V, f(XCIN)=32kHz, wait mode)0.7 μA (VCC1=VCC2=3V, stop mode)Program/erase supply voltage 3.3 ± 0.3 V or 5.0 ± 0.5 V Program and erase endurance
100 times (all area)
or 1,000 times (user ROM area without block 1) / 10,000 times (block A, block 1) (3)Operating ambient temperature –20 to 85o C –40 to 85o C (3)
Package
128-pin plastic mold QFP
CPU
Peripheral function
Electric characteris-tics
Flash memory Version
NOTES:
1. I 2C bus is a registered trademark of Koninklijke Philips Electronics N. V.
2. IEBus is a registered trademark of NEC Electronics Corporation.
3. See table 1.8 Product Code for the program and erase endurance, and operating ambient temperature.
In addition 1,000 times/10,000 times are under development as of Oct., 2003. Please inquire about a release schedule.4. All options are on request basis.
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1. Overview
M16C/62 Group (M16C/62P , M16C/62PT)
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Table 1.2 Performance outline of M16C/62 group (M16C/62P, M16C/62PT) (100-pin version) Item
Performance
M16C/62P
M16C/62PT (Note 4)
Number of basic instructions 91 instructions
Shortest instruction execution time 41.7ns(f(BCLK)=24MHz, VCC1=3.0 to 5.5V)41.7ns(f(BCLK)=24MHz, VCC1=4.0 to 5.5V)
100ns(f(BCLK)=10MHz, VCC1=2.7 to 5.5V)
Operation mode Single-chip, memory expansion and Single-chip mode
microprocessor mode
Memory space 1 Mbyte (Available to 4 Mbytes by 1M byte
memory space expansion function)
Memory capacity See table 1.4 to 1.7 Product List Port Input/Output : 87 pins, Input : 1pin Multifunction timer Timer A : 16 bits x 5 channels, Timer B : 16 bits x 6 channels Three phase motor control circuit
Serial I/O 3 channels
Clock synchronous, UART,I 2C bus (1), IEBus (2)2 channels
Clock synchronous
A-D converter 10-bit A-D converter: 1 circuit, 26 channels D-A converter 8 bits x 2 channels DMAC 2 channels CRC calculation circuit CCITT-CRC Watchdog timer 15 bits x 1 channel (with prescaler)Interrupt Internal: 29 sources, External: 8 sources, Software: 4 sources,
Priority level: 7 levels
Clock generating circuit 4 circuits
Main clock generation circuit (*),Subclock generation circuit (*),Ring oscillator, PLL synthesizer
(*)Equipped with a built-in feedback resistor.
Oscillation stop detection function Stop detection of main clock oscillation, re-oscillation detection function Voltage detection circuit Available (option (5))Absent
Supply voltage VCC1=3.0 to 5.5V, VCC2=2.7V to VCC1VCC1=VCC2=4.0V to 5.5 V (f(BCLK)=24MHz)(f(BCLK)=24MHz)VCC1=2.7 to 5.5V, V CC2=2.7V to VCC1 (f(BCLK)=10MHz)
Power consumption 14 mA (VCC1=VCC2=5V, f(BCLK)=24MHz)14 mA (VCC1=VCC2=5V, f(BCLK)=24MHz)
8 mA (VCC1=VCC2=3V, f(BCLK)=10MHz) 2.0 μA (VCC1=VCC2=5V,1.8 μA (VCC1=VCC2=3V, f(XCIN)=32kHz, wait mode) f(XCIN)=32kHz, wait mode)0.8 μA (VCC1=VCC2=5V, stop mode)0.7 μA (VCC1=VCC2=3V, stop mode)Program/erase supply voltage
3.3 ± 0.3 V or 5.0 ± 0.5 V 5.0 ± 0.5 V Program and erase endurance 100 times (all area)or 1,000 times (user ROM area without block 1) / 10,000 times (block A, block 1) (3)
Operating ambient temperature –20 to 85o C T version : –40 to 85o C
–40 to 85o C (3)V version : –40 to 125o C
Package 100-pin plastic mold QFP, LQFP CPU
Peripheral
function
Electric
characteris-tics
Flash memory Version
NOTES:
1. I 2C bus is a registered trademark of Koninklijke Philips Electronics N. V.
2. IEBus is a registered trademark of NEC Electronics Corporation.
3. See table 1.8 Product Code for the program and erase endurance, and operating ambient temperature.
In addition 1,000 times/10,000 times are under development as of Oct., 2003. Please inquire about a release schedule.4. Use the high reliability version on VCC1 = VCC2.5. All options are on request basis.元器件交易网https://www.wendangku.net/doc/3f15426742.html,
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Table 1.3 Performance outline of M16C/62 group (M16C/62P, M16C/62PT) (80-pin version) Item
Performance
M16C/62P
M16C/62PT
Number of basic instructions 91 instructions
Shortest instruction execution time 41.7ns(f(BCLK)=24MHz, VCC1=3.0 to 5.5V)41.7ns(f(BCLK)=24MHz, VCC1=4.0 to 5.5V)
100ns(f(BCLK)=10MHz, VCC1=2.7 to 5.5V)
Operation mode Single-chip mode Memory space 1M byte Memory capacity See t able 1.4 to 1.7 Product List
Port Input/Output : 70 pins, Input : 1pin Multifunction timer Timer A : 16 bits x 5 channels (Timer A1 and A2 are internal timer)
Timer B : 16 bits x 6 channels (Timer B1 is internal timer)
Serial I/O 2 channels
Clock synchronous, UART,I 2C bus (1), IEBus (2)1 channel
Clock synchronous,I 2C bus (1), IEBus (2)2 channels
Clock synchronous (1 channel is only for transmission)
A-D converter 10-bit A-D converter: 1 circuit, 26 channels D-A converter 8 bits x 2 channels DMAC 2 channels CRC calculation circuit CCITT-CRC Watchdog timer 15 bits x 1 channel (with prescaler)Interrupt Internal: 29 sources, External: 5 sources, Software: 4 sources,
Priority level: 7 levels
Clock generating circuit 4 circuits
Main clock generation circuit (*),Subclock generation circuit (*),Ring oscillator, PLL synthesizer
(*)Equipped with a built-in feedback resistor.
Oscillation stop detection function Stop detection of main clock oscillation, re-oscillation detection function Voltage detection circuit Available (option (4))Absent
Supply voltage VCC1=3.0 to 5.5V, (f(BCLK)=24MHz)VCC1=4.0 to 5.5V, (f(BCLK)=24MHz)VCC1=2.7 to 5.5V, (f(BCLK)=10MHz)
Power consumption 14 mA (VCC1=5V, f(BCLK)=24MHz)14 mA (VCC1=5V, f(BCLK)=24MHz)
8 mA (VCC1=3V, f(BCLK)=10MHz) 2.0 μA (VCC1=5V,1.8 μA (VCC1=3V, f(XCIN)=32kHz, wait mode) f(XCIN)=32kHz, wait mode)0.8 μA (VCC1=5V, stop mode)0.7 μA (VCC1=3V, stop mode)
Program/erase supply voltage 3.3 ± 0.3 V or 5.0 ± 0.5 V 5.0 ± 0.5 V Program and erase endurance 100 times (all area)or 1,000 times (user ROM area without block 1)
/ 10,000 times (block A, block 1) (3)
Operating ambient temperature –20 to 85o C T version : –40 to 85o C
–40 to 85o C(option)V version : –40 to 125o C
Package 80-pin plastic mold QFP CPU
Peripheral function Electric characteris-tics Flash memory Version NOTES :
1. I 2C bus is a registered trademark of Koninklijke Philips Electronics N. V.
2. IEBus is a registered trademark of NEC Electronics Corporation.
3. See table 1.8 Product Code for the program and erase endurance, and operating ambient temperature.
In addition 1,000 times/10,000 times are under development as of Oct., 2003. Please inquire about a release schedule.4. All options are on request basis.
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M16C/62 Group (M16C/62P , M16C/62PT)
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8f o 3002,70.v o N 01.2.v e R page 161.6 Pin Description
Table 1.9 Pin Description (100-pin and 128-pin Version) (1)
Apply 2.7 to 5.5 V to the VCC1 and VCC2 pins and 0 V to the V SS pin. The VCC apply condition is that VCC1 ≥ VCC2.(2)
Applies the power supply for the A-D converter. Connect the AVCC pin to VCC1. Connect the AVSS pin to VSS.
The microcomputer is in a reset state when applying "L" to the this pin.
Switches processor mode. Connect this pin to VSS to when after a reset to start up in single-chip mode. Connect this pin to VCC1 to start up in microprocessor mode.
Switches the data bus in external memory space. The data bus is 16 bits long when the this pin is held "L" and 8 bits long when the this pin is held "H". Set it to either one. Connect this pin to V SS when an single-chip mode.
Inputs and outputs data (D0 to D7) when these pins are set as the separate bus.Inputs and outputs data (D8 to D15) when external 16-bit data bus is set as the separate bus.
Output address bits (A0 to A19).
Input and output data (D0 to D7) and output address bits (A0 to A7) by time-sharing when external 8-bit data bus are set as the multiplexed bus.
Input and output data (D0 to D7) and output address bits (A8 to A15) by time-sharing when external 16-bit data bus are set as the multiplexed bus.
________________________________
Output CS0 to CS3 signals. CS0 to CS3 are chip-select signals to specify an external space.
_________________
______________
_____
________
______________________
Output WRL, WRH, (WR, BHE), RD signals. WRL and WRH or BHE and WR can be switched by program.
_________________
_____
? WRL, WRH and RD are selected
________
The WRL signal becomes "L" by writing data to an even address in an external memory space.
_________
The WRH signal becomes "L" by writing data to an odd address in an external memory space.
_____
The RD pin signal becomes "L" by reading data in an external memory space.______________
_____
? WR, BHE and RD are selected
______
The WR signal becomes "L" by writing data in an external memory space._____The RD signal becomes "L" by reading data in an external memory space.
________
The BHE signal becomes "L" by accessing an odd address.
___________________
Select WR, BHE and RD for an external 8-bit data bus.ALE is a signal to latch the address.
__________
While the HOLD pin is held "L", the microcomputer is placed in a hold state.
_________
In a hold state, HLDA outputs a "L" signal.
________
While applying a "L" signal to the RDY pin, the microcomputer is placed in a wait state.
VCC1, VCC2
VSS AVCC AVSS
____________
RESET CNVSS
BYTE
D0 to D7
D8 to D15A0 to A19A0/D0 to A7/D7A1/D0 to A8/D7____________CS0 to CS3______________
WRL/WR _________________WRH/BHE _____
RD
ALE
__________
HOLD __________HLDA ________
RDY
Power supply input Analog power supply input Reset input CNVSS
External data bus width select input
Bus control pins (4)I I I I
I
I/O I/O O I/O I/O O
O
O I O I
-VCC1VCC1VCC1
VCC1
VCC2VCC2VCC2VCC2VCC2VCC2
VCC2
VCC2VCC2VCC2VCC2
Power Signal name Pin name I/O type Description
supply I : Input O : Output I/O : Input and output
Power supply : Power supplies which relate to the external bus pins are separated as VCC2, thus they can be inter-faced using the different voltage as VCC1.
NOTES:
1. In this manual, hereafter, VCC refers to VCC1 unless otherwise noted.
2. In M16C/62PT, apply 2.7 to 5.5 V to the VCC1 and VCC2 pins. Also the apply condition is that VCC1 ≥ VCC2.
3. When use VCC1 ≥ VCC2, contacts due to some points or restrictions to be checked.
4. This pin function is not in M16C/62PT.
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Table 1.10 Pin Description (100-pin and 128-pin Version) (2)
XIN XOUT XCIN XCOUT BCLK CLKOUT
________________
INT0 to INT5
_______
NMI _____
______
KI0 to KI3TA0OUT to TA4OUT TA0IN to TA4IN ZP
TB0IN to TB5IN
__
__
U, U, V, V,
__
W, W __________
________
CTS0 to CTS2
________________RTS0 to RTS2CLK0 to CLK4RXD0 to RXD2SIN3, SIN4TXD0 to TXD2
SOUT3, SOUT4
CLKS1
SDA0 to SDA2SCL0 to SCL2
Main clock input Main clock output Sub clock input Sub clock output BCLK output (2)Clock output
______
INT interrupt input _______
NMI interrupt input Key input interrupt input Timer A
Timer B
Three-phase motor control output Serial I/O
I 2C mode
VCC1VCC1VCC1VCC1VCC2VCC2VCC1VCC1VCC1VCC1VCC1VCC1VCC1VCC1VCC1VCC1VCC1VCC1VCC1VCC1VCC1VCC1VCC1VCC1
I O I O O O I I I I/O I I I O I O I/O I I O O O I/O I/O
I/O pins for the main clock generation circuit. Connect a ceramic resonator or crystal oscillator between XIN and XOUT (3). To use the external clock, input the clock from XIN and leave XOUT open.
I/O pins for a sub clock oscillation circuit. Connect a crystal oscillator between XCIN and XCOUT (3). To use the external clock, input the clock from XCIN and leave XCOUT open.Outputs the BCLK signal.
The clock of the same cycle as fC, f8, or f32 is outputted.
______
Input pins for the INT interrupt
_______
Input pin for the NMI interrupt. Pin states can be read by the P8_5 bit in the P8register.
Input pins for the key input interrupt
These are timer A0 to timer A4 I/O pins. (except the output of TAOUT for the N-channel open drain output.)
These are timer A0 to timer A4 input pins.Input pin for the Z-phase.
These are timer B0 to timer B5 input pins.These are Three-phase motor control output pins.These are send control input pins.These are receive control output pins.These are transfer clock I/O pins.These are serial data input pins.These are serial data input pins.
These are serial data output pins. (except TXD2 for the N-channel open drain output.)
These are serial data output pins.
This is output pin for transfer clock output from multiple pins function.These are serial data I/O pins. (except SDA2 for the N-channel open drain output.)
These are transfer clock I/O pins. (except SCL2 for the N-channel open drain output.)
I : Input O : Output I/O : Input and output
NOTES:
1. When use VCC1 ≥ VCC2, contacts due to some points or restrictions to be checked.
2. This pin function is not in M16C/62PT.
3. Ask the oscillator maker the oscillation characteristic.
Power Signal name Pin name I/O type Description
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M16C/62 Group (M16C/62P , M16C/62PT)
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8f o 3002,70.v o N 01.2.v e R page 18Table 1.11 Pin Description (100-pin and 128-pin Version) (3)
VREF AN0 to AN7,AN0_0 to AN0_7,AN2_0 to AN2_7___________ADTRG ANEX0ANEX1DA0, DA1P0_0 to P0_7,P1_0 to P1_7,P2_0 to P2_7,P3_0 to P3_7,P4_0 to P4_7,P5_0 to P5_7,P12_0 to P12_7 (2),P13_0 to P13_7 (2)P6_0 to P6_7,P7_0 to P7_7,P9_0 to P9_7,P10_0 to P10_7,P11_0 to P11_7 (2)P8_0 to P8_4,P8_6, P8_7,P14_0, P14_1(2)
P8_5
Reference voltage input A-D converter
D-A converter I/O port
Input port
VCC1VCC1
VCC1VCC1VCC1VCC1VCC2
VCC1
VCC1
VCC1
Applies the reference voltage for the A-D converter and D-A converter.Analog input pins for the A-D converter
This is an A-D trigger input pin.
This is the extended analog input pin for the A-D converter, and is the output in external op-amp connection mode.
This is the extended analog input pin for the A-D converter.This is the Input pin for the D-A converter.
8-bit I/O ports in CMOS, having a direction register to select an input or output.Each pin is set as an input port or output port. An input port can be set for a pull-up or for no pull-up in 4-bit unit by program.
8-bit I/O ports having equivalent functions to P0.
(except P7_0 and P7_1 for the N-channel open drain output.)
I/O ports having equivalent functions to P0.
_______
Input pin for the NMI interrupt.
Pin states can be read by the P8_5 bit in the P8 register.
I
I
I I/O I
O I/O
I/O
I/O
I
I : Input O : Output I/O : Input and output
NOTES:
1. When use VCC1 ≥ VCC2, contacts due to some points or restrictions to be checked.
2. Ports P11 to P14 are provided in the 128-pin version only.
Power
Signal name Pin name I/O type Description
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Apply 2.7 to 5.5 V to the VCC1 pin and 0 V to the VSS pin. (2)
Applies the power supply for the A-D converter. Connect the AVCC pin to VCC1. Connect the AVSS pin to VSS.
The microcomputer is in a reset state when applying "L" to the this pin.Switches processor mode. Connect this pin to V SS to when after a reset to start up in single-chip mode. Connect this pin to V CC1 to start up in micropro-cessor mode. As for the BYTE pin of the 80-pin versions, pull-up processing is performed within the microcomputer.
I/O pins for the main clock generation circuit. Connect a ceramic resonator or crystal oscillator between XIN and XOUT (3). To use the external clock, input the clock from XIN and leave XOUT open.
I/O pins for a sub clock oscillation circuit. Connect a crystal oscillator between XCIN and XCOUT (3). To use the external clock, input the clock from XCIN and leave XCOUT open.
The clock of the same cycle as fC, f8, or f32 is outputted.
______
Input pins for the INT interrupt _______
Input pin for the NMI interrupt.Input pins for the key input interrupt
These are timer A0, timer A3 and Timer A4 I/O pins. (except the output of TAOUT for the N-channel open drain output.)
These are timer A0, timer A3 and Timer A4 input pins.
Input pin for the Z-phase.
These are timer B0, timer B2 to timer B5 input pins.These are send control input pins.These are receive control output pins.These are transfer clock I/O pins.These are serial data input pins.
These are serial data input pins.
These are serial data output pins. (except TXD2 for the N-channel open drain output.)
These are serial data output pins.
This is output pin for transfer clock output from multiple pins function.These are serial data I/O pins. (except SDA2 for the N-channel open drain output.)
These are transfer clock I/O pins. (except SCL2 for the N-channel open drain output.)
VCC1,VSS AVCC,AVSS ____________RESET CNVSS (BYTE)
XIN XOUT XCIN XCOUT CLKOUT
________________
INT0 to INT2
_______
NMI
____________
KI0 to KI3TA0OUT,TA3OUT,TA4OUT TA0IN,TA3IN,TA4IN
ZP TB0IN,TB2IN to TB5IN __________________CTS0, CTS2__________________
RTS0, RTS2CLK0, CLK1,CLK3, CLK4RXD0 to RXD2SIN4
TXD0 to TXD4SOUT3, SOUT4
CLKS1
SDA0 to SDA2SCL0 to SCL2
Power supply input Analog power supply input Reset input CNVSS
Main clock input Main clock output Sub clock input Sub clock output Clock output
______INT interrupt input
_______
NMI interrupt input Key input interrupt input Timer A
Timer B Serial I/O
I 2C mode
I I I I
I O I O O I I I I/O
I
I I I O I/O I I O O O I/O I/O
-VCC1VCC1VCC1
VCC1VCC1VCC1VCC1VCC2VCC1VCC1VCC1VCC1
VCC1
VCC1VCC1VCC1VCC1VCC1VCC1VCC1VCC1VCC1VCC1VCC1VCC1
Power Signal name Pin name I/O type
Description
supply I : Input O : Output I/O : Input and output
NOTES:
1. In this manual, hereafter, VCC refers to VCC1 unless otherwise noted.
2. In M16C/62PT, apply 4.0 to 5.5 V to the VCC1 pin.
3. Ask the oscillator maker the oscillation characteristic.
Table 1.12 Pin Description (80-pin Version) (1)
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M16C/62 Group (M16C/62P , M16C/62PT)
4
8f o 3002,70.v o N 01.2.v e R page 20Table 1.13 Pin Description (80-pin Version) (2)
VREF AN0 to AN7,AN0_0 to AN0_7,AN2_0 to AN2_7___________
ADTRG ANEX0ANEX1
DA0, DA1P0_0 to P0_7,P2_0 to P2_7,P3_0 to P3_7,P5_0 to P5_7,P6_0 to P6_7,P10_0 to P10_7P8_0 to P8_4,P8_6, P8_7,P9_0,P9_2 to P9_7P4_0 to P4_3,P7_0, P7_1,P7_6, P7_7
P8_5
Reference voltage input
A-D converter
D-A converter I/O port
Input port
VCC1VCC1
VCC1VCC1VCC1VCC1VCC1
VCC1VCC1
VCC1
Applies the reference voltage for the A-D converter and D-A converter.Analog input pins for the A-D converter
This is an A-D trigger input pin.
This is the extended analog input pin for the A-D converter, and is the output in external op-amp connection mode.
This is the extended analog input pin for the A-D converter.This is the Input pin for the D-A converter
8-bit I/O ports in CMOS, having a direction register to select an input or output.
Each pin is set as an input port or output port. An input port can be set for a pull-up or for no pull-up in 4-bit unit by program.
I/O ports having equivalent functions to P0.
I/O ports having equivalent functions to P0.
(except P7_0 and P7_1 for the N-channel open drain output.)_______
Input pin for the NMI interrupt.
Pin states can be read by the P8_5 bit in the P8 register.
I I
I I/O I O I/O
I/O I/O
I
I : Input O : Output I/O : Input and output
NOTES:
1. There is no external connections for port P1, P4_4 to P4_7, P7_2 to P7_5 and P9_1 in 80-pin version.
Set the direction bits in these ports to “1” (input mode), and set the output data to “0” (“L ”) using the program.
Power Signal name Pin name I/O type
Description
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