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TPS23753
https://www.wendangku.net/doc/4710606034.html, SLVS853C–JUNE2008–REVISED JANUARY2010 IEEE802.3PoE INTERFACE AND ISOLATED CONVERTER CONTROLLER
Check for Samples:TPS23753
FEATURES
DESCRIPTION
?Optimized for Isolated Converters
?Complete PoE Interface The TPS23753is a combined Power over Ethernet
(PoE)powered device(PD)interface and ?Adapter ORing Support
current-mode dc/dc controller optimized specifically ?12V Adapter Support for isolated converter designs.The PoE
?Programmable Frequency with Synch.implementation supports the IEEE802.3at standard
as a13W,type1PD.The requirements for an IEEE ?Robust100V,0.7?Hotswap MOSFET
802.3at type1device are a superset of IEEE ?Small TSSOP14Package802.3-2008(originally802.3af)requirements.
?15kV/8kV System Level ESD Capable
The TPS23753supports a number of input-voltage ?–40°C to125°C Junction Temperature Range ORing options including highest voltage,external
?Design Procedure Application Note-SLVA305adapter preference,and PoE preference.
?Adapter ORing Application Note-SLVA306The PoE interface features an external detection
signature pin that can also be used to disable the APPLICATIONS internal hotswap MOSFET.This allows the PoE
function to be turned off.Classification can be ?IEEE802.3at Compliant Powered Devices
programmed to any of the defined types with a single ?VoIP Telephones
resistor.
?Access Points
The dc/dc controller features a bootstrap startup ?Security Cameras
mechanism with an internal,switched current source.
This provides the advantages of cycling overload fault
protection without the constant power loss of a pull up
resistor.
The programmable oscillator may be synchronized to
a higher-frequency external timing reference.
Figure1.Basic TPS23753Implementation
Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.Copyright?2008–2010,Texas Instruments Incorporated Products conform to specifications per the terms of the Texas
Instruments standard warranty.Production processing does not
necessarily include testing of all parameters.
TPS23753
SLVS853C–JUNE2008–REVISED https://www.wendangku.net/doc/4710606034.html,
This integrated circuit can be damaged by ESD.Texas Instruments recommends that all integrated circuits be handled with appropriate precautions.Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure.Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PRODUCT INFORMATION(1)
DEVICE DUTY CYCLE PoE UVLO ON/HYST.PACKAGE MARKING
TPS237530–80%35/4.5PW(TSSOP-14)TP23753
(1)For the most current package and ordering information,see the Package Option Addendum at the end of this document,or see the TI
website at https://www.wendangku.net/doc/4710606034.html,.
ABSOLUTE MAXIMUM RATINGS(1)
Voltages are with respect to V SS(unless otherwise noted)
VALUE UNIT
V DD,V DD1,DEN,RTN(2)–0.3to100V
V DD1to RTN–0.3to100V
CLS(3)–0.3to6.5V
V I Input voltage range[APD,BLNK(3),CTL,FRS(3),V B(3)]to RTN–0.3to6.5V
CS to RTN–0.3to V B V
V C to RTN–0.3to19V
GATE to RTN–0.3to V C+0.3V Sourcing current V B Internally limited mA Average sourcing or sinking current GATE25mA RMS
HBM2kV ESD rating
CDM500V ESD–system level(contact/air)(4)8/15kV
–40to Internally
T J Operating junction temperature range°C
Limited
(1)Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device.These are stress ratings
only,and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)I RTN=0for V RTN>80V.
(3)Do not apply voltage to these pins.
(4)Surges per EN61000-4-2,1999applied between RJ-45and output ground and between adapter input and output ground of the
TPS23753EVM-001(HPA304-001)evaluation module(documentation available on the web).These were the test levels,not the failure threshold.
DISSIPATION RATINGS
ΨJTθJAθJA PACKAGE
(°C/W)(1)(°C/W)(2)(°C/W)(1) PW(TSSOP-14)0.97173.699.3
(1)JEDEC method with high-k board(4layers,2signal and2planes).T J=T TOP+(ΨJT x P J).UseΨJT to validate T J from measurements.
(2)JEDEC method with low-k board(2signal layers).
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RECOMMENDED OPERATING CONDITIONS
Voltage with respect to V SS(unless otherwise noted)
MIN NOM MAX UNIT Input voltage range,V DD,V DD1,RTN057V
Input voltage range,V DD,V DD1to RTN057V
V I Input voltage range,V C to RTN018V Input voltage range,APD,CTL to RTN0V B V
Input voltage range,CS to RTN02V
RTN current(T J≤125°C)350mA
V B sourcing current0 2.55mA
V B capacitance0.080.1 2.2μF
R BLNK0350k?Synchronization pulse width input(when used)25150ns
T J Operating junction temperature range–40125°C
ELECTRICAL CHARACTERISTICS
Unless otherwise noted:CS=APD=CTL=RTN,GATE open,R FRS=60.4k?,R BLNK=249k?,C VB=C VC=0.1μF,
R DEN=24.9k?,R CLS open,V VDD-VSS=48V,V VDD1-RTN=48V,8.5V≤V VC-RTN≤18V,–40°C≤T J≤125°C
Controller Section Only
[V SS=RTN and V DD=V DD1]or[V SS=RTN=V DD],all voltages referred to RTN.Typical specifications are at25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT V C
UVLO1V C rising8.6599.3 Undervoltage lockout V UVLO H Hysteresis(1) 3.3 3.5 3.7
Operating current V C=12V,CTL=V B0.400.580.85mA
V DD1=10.2V,V C(0)=0V5085175
t ST Startup time,C VC=22μF ms
V DD1=35V,V C(0)=0V304885
V DD1=10.2V,V VC=8.6V0.44 1.06 1.80 Startup current source-I VC mA
V DD1=48V,V VC=0V 2.5 4.3 6.0
V B
Voltage 6.5V≤V C≤18V,0≤I VB≤5mA 4.75 5.10 5.25V FRS
CTL=V B,Measure GATE
Switching frequency223248273kHz
R FRS=60.4k?
D MAX Duty cycle CTL=V B,Measure GATE7678.581%
V SYNC Synchronization Input threshold 2.0 2.2 2.4V CTL
V ZDC0%duty cycle threshold V CTL↓until GATE stops 1.3 1.5 1.7V Softstart period Interval from switching start to V CSMAX400800μs
Input resistance70100145k?BLNK
In addition to t1
Blanking delay BLNK=RTN355275ns
R BLNK=49.9k?415263
(1)The hysteresis tolerance tracks the rising threshold for a given device.
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ELECTRICAL CHARACTERISTICS(continued)
Unless otherwise noted:CS=APD=CTL=RTN,GATE open,R FRS=60.4k?,R BLNK=249k?,C VB=C VC=0.1μF,
R DEN=24.9k?,R CLS open,V VDD-VSS=48V,V VDD1-RTN=48V,8.5V≤V VC-RTN≤18V,–40°C≤T J≤125°C
Controller Section Only
[V SS=RTN and V DD=V DD1]or[V SS=RTN=V DD],all voltages referred to RTN.Typical specifications are at25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CS
V CSMAX Maximum threshold voltage V CTL=V B,V CS↑until GATE duty cycle drops0.500.550.60V
t1Turn off delay V CS=0.65V254160ns
V SLOPE Internal slope compensation voltage Peak voltage at maximum duty cycle,referred to CS90118142mV
I SL_EX Peak slope compensation current V CTL=V B,I CS at maximum duty cycle(ac component)304254μA
Bias current(sourcing)Gate high,dc component of CS current23 4.2μA GATE
Source current V CTL=V B,V C=12V,GATE high,Pulsed measurement0.300.460.60A
Sink current V CTL=V B,V C=12V,GATE low,Pulsed measurement0.500.79 1.1A APD
V APDEN V APD↑ 1.42 1.5 1.58 Threshold voltage V
V APDH Hysteresis(2)0.280.30.32 THERMAL SHUTDOWN
Turn off temperature135145155°C
Hysteresis(3)20°C
(2)The hysteresis tolerance tracks the rising threshold for a given device.
(3)These parameters are provided for reference only,and do not constitute part of TI's published device specifications for purposes of TI's
product warranty.
ELECTRICAL CHARACTERISTICS
PoE and Control
[V DD=V DD1]or[V DD1]=RTN,V VC-RTN=0V,all voltages referred to V SS.Typical specifications are at25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DEN(DETECTION)(V DD=V DD1=RTN=V SUPPLY positive)
Measure I SUPPLY
Detection current V DD=1.6V6264.366.5μA
V DD=10V399406413 Detection bias current V DD=10V,DEN open,Measure I SUPPLY 5.212μA
V PD_DIS Hotswap disable threshold345V
I lkg DEN leakage current V DEN=V DD=57V,Float V DD1and RTN,Measure I DEN0.15μA CLS(CLASSIFICATION)(V DD=V DD1=RTN=V SUPPLY positive)
13V≤V DD≤21V,Measure I SUPPLY
R CLS=1270? 1.8 2.14 2.4
R CLS=243?9.910.611.3
I CLS Classification current mA
R CLS=137?17.618.619.4
R CLS=90.9?26.527.929.3
R CLS=63.4?3839.942
V CL_ON Regulator turns on,V DD rising1011.713 Classification regulator lower
V threshold
V CL_HYS Hysteresis(1) 1.9 2.05 2.2
V CU_OFF Regulator turns off,V DD rising212223 Classification regulator upper
V threshold
V CU_HYS Hysteresis(1)0.50.771
I lkg Leakage current V DD=57V,V CLS=0V,DEN=V SS,Measure I CLS1μA
(1)The hysteresis tolerance tracks the rising threshold for a given device.
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GATE RTN V C CS V DD V SS DEN BLNK FRS V
B CTL CLS APD V DD1
TPS23753
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SLVS853C –JUNE 2008–REVISED JANUARY 2010
ELECTRICAL CHARACTERISTICS (continued)
PoE and Control
[V DD =V DD1]or [V DD1]=RTN,V VC-RTN =0V,all voltages referred to V SS .Typical specifications are at 25°C.
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT RTN (PASS DEVICE)
(V DD1=RTN)
On resistance 0.7
1.2?Current limit V RTN =1.5V,V DD =48V,Pulsed Measurement 405450505mA Inrush limit
V RTN =2V,V DD :0V →48V,Pulsed Measurement 100140180mA Foldback voltage threshold
V DD rising
11
12.3
13.6V I lkg Leakage current
V DD =V RTN =100V,DEN =V SS
40
μA
UVLO UVLO_R V DD rising 33.93536.1Undervoltage lockout threshold
V
UVLO_H
Hysteresis
(2)
4.40 4.55 4.70THERMAL SHUTDOWN
Turn off temperature 135
145155
°C Hysteresis (3)
20
°C
(2)The hysteresis tolerance tracks the rising threshold for a given device.
(3)
These parameters are provided for reference only,and do not constitute part of TI's published device specifications for purposes of TI's product warranty.
DEVICE INFORMATION
TOP VIEW
Table 1.Terminal Functions
TERMINAL I/O DESCRIPTION
https://www.wendangku.net/doc/4710606034.html, 1CTL I The control loop input to the PWM (pulse width modulator).Use V B as a pull up for CTL.
5V bias rail for dc/dc control circuits.Apply a 0.1μF to RTN.V B may be used to bias an external optocoupler for 2V B O feedback.
Dc/dc converter switching MOSFET current sense input.Connect CS to the high side of the RTN-referenced 3CS I current sense resistor.
Dc/dc converter bias voltage.The internal startup current source and converter bias winding output power this pin.4V C I/O Connect a 0.22μF minimum ceramic capacitor to RTN,and a larger capacitor to facilitate startup.5GATE O
Gate drive output for the dc/dc converter switching MOSFET.
6RTN RTN is the negative rail input to the dc/dc converter and output of the PoE hotswap.7V SS Negative power rail derived from the PoE source.
8V DD1Source of dc/dc converter startup current.Connect to V DD for most applications.9V DD Positive input power rail for PoE interface circuit.Derived from the PoE source.
Connect a 24.9k ?resistor from DEN to V DD to provide the PoE detection signature.Pulling this pin to V SS during 10DEN I/O powered operation causes the internal hotswap MOSFET to turn off.
11CLS O Connect a resistor from CLS to V SS to program the classification current per Table 2.
Pull APD above 1.5V to disable the internal PD hotswap switch,forcing power to come from an external adapter.12APD I Connect to the adapter through a resistor divider.
Connect to RTN to utilize the internally set blanking period or connect through a resistor to RTN to program the 13BLNK I/O blanking period.
14
FRS
I/O Connect a resistor from FRS to RTN to program the converter switching frequency.
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Product Folder Link(s):TPS23753
GATE
V DD1V B
V SS
CTL
BLNK FRS CS
RTN
CLS
DEN
APD
V DD
V C
()
12_APD APD ADPTR ON APDEN APDEN
R R V V V =??TPS23753
SLVS853C –JUNE 2008–REVISED JANUARY 2010
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Figure 2.TPS23753Functional Block Diagram
Pin Description
Refer to Figure 1for component reference designators ?CS for example ),and the Electrical Characteristics table for values denoted by reference (V CSMAX for example).Electrical Characteristic values take precedence over any numerical values used in the following sections.APD
APD forces power to come from an external adapter connected from V DD1to RTN by opening the hotswap switch.A resistor divider is recommended on APD when it is connected to an external adapter.The divider provides ESD protection,leakage discharge for the adapter ORing diode,and input voltage qualification.Voltage qualification assures the adapter can support the PD before the PoE current is cut off.
Select the APD divider resistors per the following equations where V ADPTR-ON is the desired adapter voltage that enables the APD function as adapter voltage rises.
(1)
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()
12
_2
APD APD ADPTR OFF APDEN APDH APD R R V V V R +=
??()()
BLNK BLNK R k t ns ?=TPS23753
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SLVS853C –JUNE 2008–REVISED JANUARY 2010
(2)
The CLS output is disabled when a voltage above V APDEN is applied to the APD pin.Place the APD pull-down resistor adjacent to the APD pin.APD should be tied to RTN when not used.BLNK
Blanking provides an interval between the gate drive going high and the current comparator on CS actively
monitoring the input.This delay allows the normal turn-on current transient (spike)to subside before the comparator is active,preventing undesired short duty cycles and premature current limiting.
Connect BLNK to RTN to obtain the internally set blanking period.Connect a resistor from BLNK to RTN for a programmable blanking period.The relationship between the desired blanking period and the programming resistor is defined by the following equation.
(3)
Place the resistor adjacent to the BLNK pin when it is used.CLS
Connect a resistor from CLS to V SS to program the classification current per IEEE 802.3at.The PD power ranges and corresponding resistor values are listed in Table 2.The power assigned should correspond to the maximum average power drawn by the PD during operation.The TPS23753supports class 0–3power levels.CS
The current sense input for the dc/dc converter should be connected to the high side of the switching MOSFET’s current sense resistor.The current-limit threshold,V CSMAX ,defines the voltage on CS above which the GATE ON time will be terminated regardless of the voltage on CTL.
The TPS23753provides internal slope compensation to stabilize the current mode control loop.If the provided slope is not sufficient,the effective slope may be increased by addition of R S per Figure 22.
Routing between the current-sense resistor and the CS pin should be short to minimize cross-talk from noisy traces such as the gate drive signal.CTL
CTL is the voltage control loop input to the PWM (pulse width modulator).Pulling V CTL below V ZDC causes GATE to stop switching.Increasing V CTL above V ZDC raises the switching MOSFET programmed peak current.The maximum (peak)current is requested at approximately V ZDC +(2×V CSMAX ).The ac gain from CTL to the PWM comparator is 0.5.
Use V B as a pull up source for CTL.DEN
Connect a 24.9k ?resistor from DEN to V DD to provide the PoE detection signature.DEN goes to a high impedance state when not in the detection voltage range.Pulling DEN to V SS during powered operation causes the internal hotswap MOSFET and class regulator to turn off.
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15000()()
FRS SW R k f kHz ?=
TPS23753
SLVS853C –JUNE 2008–REVISED JANUARY 2010
https://www.wendangku.net/doc/4710606034.html,
FRS
Connect a resistor from FRS to RTN to program the converter switching frequency.Select the resistor per the following relationship.
(4)
The converter may be synchronized to a frequency above its maximum free-running frequency by applying short ac-coupled pulses into the FRS pin.More information is provided in the Applications section.The FRS pin is high impedance.Keep the connections short and apart from potential noise sources.GATE
Gate drive output for the dc/dc converter switching MOSFET.RTN
RTN is internally connected to the drain of the PoE hotswap MOSFET,and the dc/dc controller return.RTN should be treated as a local reference plane (ground plane)for the dc/dc controller and converter primary to maintain signal integrity.V B
V B is an internal 5V control rail that should be bypassed by a 0.1μF capacitor to RTN.V B should be used to bias the feedback optocoupler.V C
V C is the bias supply for the dc/dc controller.The MOSFET gate driver runs directly from V C .V B is regulated down from V C ,and is the bias voltage for the rest of the converter control.A startup current source from V DD1to V C is controlled by a comparator with hysteresis to implement a bootstrap startup of the converter.V C must be connected to a bias source,such as a converter auxiliary output,during normal operation.
A minimum 0.22μF capacitor,located adjacent to the V C pin,should be connected from V C to RTN to bypass the gate driver.A larger total capacitance is required for startup.V DD
Positive input power rail for PoE control that is derived from the PoE.V DD should be bypassed to V SS with a 0.1μF (X7R,10%)capacitor as required by the standard.A transient suppressor (Zener)diode,should be connected from V DD to V SS to protect against overvoltage transients.V DD1
Source of dc/dc converter startup current.Connect to V DD for most applications.V DD1may be isolated by a diode from V DD to support PoE priority operation.V SS
V SS is the PoE input-power return side.It is the reference for the PoE interface circuits,and has a current-limited hotswap switch that connects it to RTN.V SS is clamped to a diode drop above RTN by the hotswap switch.A local V SS reference plane should be used to connect the input components and the V SS pin.
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446448
450
452
454
456
458
-40
-20
20406080100
120
P o E - C u r r e n t L i m i t - m A
T - Junction Temperature - °C
J
I - B i a s C u r r e n t -A
V D D m V - PoE Voltage - V VDD-VSS 0
1
2
3
4
5
6
I - S o u r c e C u r r e n t - m A
V C V - V
VDD1-RTN 2040
6080
100
120
140
160
-40
-20
20406080100
120
C o n v e r t e r S t a r t T i m e - m s
T - Junction Temperature - °C
J TPS23753
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SLVS853C –JUNE 2008–REVISED JANUARY 2010
TYPICAL CHARACTERISTICS
DETECTION BIAS CURRENT
PoE CURRENT LIMIT
vs vs
VOLTAGE
TEMPERATURE
Figure 3.
Figure 4.
CONVERTER START TIME
CONVERTER STARTUP SOURCE CURRENT
vs
vs TEMPERATURE
V VDD1
Figure 5.Figure 6.
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Product Folder Link(s):TPS23753
-40
-20
20406080100
120
T - Junction Temperature - °C
J I - S i n k i n g -A
V C m 0
200
400
600
800
10001200
7
9
11
13
15
17
V - Controller Bias Voltage - V
C V - C o n t r o l l e r B i a s C u r r e n t -A
C m
-40
-20
20406080100
120
350
400
450
500
550
600
650
S w i t c h i n g F
r e q u e n c y - H z
S w i t c h i n g F r e q u e n c y - H z
T - Junction Temperature - °C
J 0100
200300400500600700
800
10
20
30
40
50
S w i t c h i n g F r e q u e n c y - k H z
Programmed Resistance (10/ R ) -6
-1
FRS W
TPS23753
SLVS853C –JUNE 2008–REVISED JANUARY 2010
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TYPICAL CHARACTERISTICS (continued)
CONTROLLER BIAS CURRENT
CONTROLLER BIAS CURRENT
vs
vs TEMPERATURE
VOLTAGE
Figure 7.
Figure 8.
SWITCHING FREQUENCY
SWITCHING FREQUENCY
vs
vs
TEMPERATURE
PROGRAMMED RESISTANCE
Figure 9.Figure 10.
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分销商库存信息:
TI
TPS23753PW TPS23753PWR TPS23753PWRG4 TPS23753PWG4TPS23753EVM-001TPS23753EVM-004