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LM1203中文资料

LM1203中文资料
LM1203中文资料

TL H 9178LM1203RGB Video Amplifier System

January 1996

LM1203RGB Video Amplifier System

General Description

The LM1203is a wideband video amplifier system intended for high resolution RGB color monitor applications In addi-tion to three matched video amplifiers the LM1203contains three gated differential input black level clamp comparators for brightness control and three matched attenuator circuits for contrast control Each video amplifier contains a gain set or ‘‘Drive’’node for setting maximum system gain (Av e 4to 10)as well as providing trim capability The LM1203also contains a voltage reference for the video inputs For high resolution monochrome monitor applications see the LM1201Video Amplifier System datasheet

Features

Y Three wideband video amplifiers (70MHz b 3dB)Y

Inherently matched (g 0 1dB or 1 2%)attenuators for contrast control

Y

Three externally gated comparators for brightness con-trol

Y

Provisions for independent gain control (Drive)of each video amplifier

Y Video input voltage reference Y

Low impedance output driver

Block and Connection Diagram

TL H 9178–1

FIGURE 1

Order Number LM1203N See NS Package Number NA28F

C 1996National Semiconductor Corporation RRD-B30M56 Printed in U S A

Absolute Maximum Ratings

If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage V CC Pins1 13 23 28

(Note1)13 5V Voltage at Any Input Pin V IN V CC t V IN t GND Video Output Current I16 20or2528mA Power Dissipation P D2 5W (Above25 C)Derate Based on i JA and T J

Thermal Resistance i JA50 C W Junction Temperature T J150 C Storage Temperature Range T STG b65 C to a150 C Lead Temperature (Soldering 10sec )265 C ESD susceptibility1kV Human body model 100pF discharged through a1 5k X resistor

Operating Ratings(Note9)

Temperature Range0 C to70 C Supply Voltage(V CC)10 8V s V CC s13 2V

Electrical Characteristics See Test Circuit(Figure2) T A e25 C V CC1e V CC2e12V DC Static Tests S17 21 26Open V12e6V V14e0V V15e2 0V unless otherwise stated

Label Parameter Conditions Typ

Tested Design Units Limit(Note2)Limit(Note3)(Limits)

Is Supply Current V CC1only7390 0mA(max)

V11Video Input Reference Voltage

2 4

2 2V(min)

2 6V(max) lb Video Input Bias Current Any One Amplifier5 020m A(max) V14l Clamp Gate Low Input Voltage Clamp Comparators On1 20 8V(max) V14h Clamp Gate High Input Voltage Clamp Comparators Off1 62 0V(min) I14l Clamp Gate Low Input Current V14e0V b0 5b5 0m A(max) I14h Clamp Gate High Input Current V14e12V0 0051m A(max) lclamp a Clamp Cap Charge Current V5 8or10e0V850500m A(min) lclamp b Clamp Cap Discharge Current V5 8or10e5V b850b500m A(min) Vol Video Output Low Voltage V5 8or10e0V0 91 25V(max) Voh Video Output High Voltage V5 8or10e5V8 98 2V(min)

D Vo(2V)Video Output Offset Voltage Between Any Two Amplifiers

g0 5g50mV(max)

V15e2V

D Vo(4V)Video Output Offset Voltage Between Any Two Amplifiers

g0 5g50mV(max)

V15e4V

AC Dynamic Tests S17 21 26Closed V14e0V V15e4V unless otherwise stated

Symbol Parameter Conditions Typ

Tested Design Units Limit(Note2)Limit(Note3)(Limits)

Av max Video Amplifier Gain V12e12V V IN e560mVp-p6 04 5V V(min)

D Av5V Attenuation 5V Ref Av max V12e5V b10dB

D Av2V Attenuation 2V Ref Av max V12e2V b40dB

Av match Absolute gain match Av max V12e12V(Note5)g0 5dB

D Av track1Gain change between amplifiers V12e5V(Notes5 8)g0 1g0 5dB(max)

D Av track2Gain change between amplifiers V12e2V(Notes5 8)g0 3g0 7dB(max)

THD Video Amplifier Distortion V12e3V V O e1Vp-p0 5%

f(b3dB)Video Amplifier Bandwidth V12e12V

70MHz (Notes4 6)V O e100mV rms

t r Output Rise Time(Note4)V O e4Vp-p5ns

t f Output Fall Time(Note4)V O e4Vp-p7ns http www national com2

AC Dynamic Tests S17 21 26Closed V14e0V V15e4V unless otherwise stated(Continued)

Symbol Parameter Conditions Typ

Tested Design

Units Limit(Note2)Limit(Note3)

Vsep Video Amplifier10kHz Isolation V12e12V(Note7)

b65dB

10kHz

Vsep Video Amplifier10MHz Isolation V12e12V(Notes4 7)

b46dB

10MHz

Note1 V CC supply pins1 13 23 28must be externally wired together to prevent internal damage during V CC power on off cycles

Note2 These parameters are guaranteed and100%production tested

Note3 Design limits are guaranteed(but not100%production tested) These limits are not used to calculate outgoing quality levels

Note4 When measuring video amplifier bandwidth or pulse rise and fall times a double sided full ground plane printed circuit board without socket is recommend-

ed Video Amplifier10MHz isolation test also requires this printed circuit board

Note5 Measure gain difference between any two amplifiers V IN e1Vp-p

Note6 Adjust input frequency from10kHz(Av max ref level)to the b3dB corner frequency(f b3dB)

Note7 Measure output levels of the other two undriven amplifiers relative to driven amplifier to determine channel separation Terminate the undriven amplifier inputs to simulate generator loading Repeat test at f IN e10MHz for Vsep e10MHz

Note8 D Av track is a measure of the ability of any two amplifiers to track each other and quantifies the matching of the three attenuators It is the difference in gain change between any two amplifiers with the Contrast Voltage V12at either5V or2V measured relative to an Av max condition V12e12V For example at

Av max the three amplifiers gains might be17 4dB 16 9dB and16 4dB and change to7 3dB 6 9dB and6 5dB respectively for V12e5V This yields the measured typical g0 1dB channel tracking

Note9 Operating Ratings indicate conditions for which the device is functional See Electrical Specifications for guaranteed performance limits

Peaking capacitors See Frequency Response

using various peaking cups graph on next page

TL H 9178–2

FIGURE2 LM1203Test Circuit

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Typical Performance Characteristics

Contrast vs Frequency

TL H 9178–11Crosstalk vs Frequency

TL H 9178–12

Frequency Response Using Various Peaking Caps

TL H 9178–13

Attenuation vs Contrast Voltage

TL H 9178–14

Pulse Response

Rise Fall Times Vert e 1V Div Horiz e 10ns Div

––GND

TL H 9178–15

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TL H 9178–3

FIGURE 3 LM1203Typical Application

30X resistors are added to the input pins for protection against current surges coming through the 10m F input capacitors By increasing these resistors to well over 100X the rise and fall times of the LM1203can be increased for EMI considerations

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Applications Information

Figure4shows the block diagram of a typical analog RGB color monitor The RGB monitor is used with CAD CAM work stations PC’s arcade games and in a wide range of other applications that benefit from the use of color display terminals The RGB color monitor characteristics may differ in such ways as sweep rates screen size CRT color trio spacing(dot pitch) or in video amplifier bandwidths but will still be generally configured as shown in Figure4 Separate horizontal and vertical sync signals may be required or they may be contained in the green video input signal The video input signals are usually supplied by coax cable which is terminated in75X at the monitor input and internally ac cou-pled to the video amplifiers These input signals are approxi-mately1volt peak to peak in amplitude and at the input of the high voltage video section approximately6V peak to peak At the cathode of the CRT the video signals can be as high as60V peak to peak One important requirement of the three video amplifiers is that they match and track each other over the contrast and brightness control range The Figure4block labeled‘‘VIDEO AMPLIFICATION WITH GAIN AND DC CONTROL’’describes the function of the LM1203which contains the three matched video amplifiers contrast control and brightness control

TL H 9178–4

FIGURE4 Typical RGB Color Monitor Block Diagram http www national com6

Circuit Description

Figure 5is a block diagram of one of the video amplifiers along with the contrast and brightness controls The con-trast control is a dc-operated attenuator which varies the ac gain of all three amplifiers simultaneously while not introduc-ing any signal distortions or tracking errors The brightness control function requires a ‘‘sample and hold’’circuit (black level clamp)which holds the dc bias of the video amplifiers and CRT cathodes constant during the black level reference portion of the video waveform The clamp comparator when gated on during this reference period will charge or discharge the clamp capacitor until the plus input of the clamp comparator matches that of the minus input voltage which was set by the brightness control

Figure 6is a simplified schematic of one of the three video amplifiers along with the recommended external compo-nents The IC pin numbers are circled with all external com-ponents shown outside of the dashed line The video input is applied to pin 6via the 10m F coupling capacitor DC bias

to the video input is through the 10k X resistor which is connected to the 2 4V reference at pin 11 The low frequen-cy roll-off of the amplifier is set by these two components Transistor Q1buffers the video signal to the base of Q2 The Q2collector current is then directed to the V CC 1sup-ply directly or through the 1k load resistor depending upon the differential DC voltage at the bases of Q3and Q4 The Q3and Q4differential base voltage is determined by the contrast control circuit which is described below RF decou-pling capacitors are required at pins 2and 3to insure high frequency isolation between the three video amplifiers which share these common connections The black level dc voltage at the collector of Q4is maintained by Q5and Q6which are part of the black level clamp circuit also described below The video signal appearing at the collector of Q4is then buffered by Q7and level shifted down by Z1and Q8to the base of Q9which will then provide additional system gain

TL H 9178–5

FIGURE 5 Block Diagram of LM1203Video Amplifier with Contrast and Black Level Control

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Circuit Description (Continued)

T L H 9178–6

F I

G U R E 6 S i m p l i f i e d L M 1203V i d e o A m p l i f i e r S e c t i o n w i t h R e c o m m e n d e d E x t e r n a l C o m p o n e n t s

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Circuit Description (Continued)

The ‘‘Drive’’pin will allow the user to trim the Q9gain of each amplifier to correct for differences in the CRT and high voltage cathode driver gain stages A small capacitor (33pF)at this pin will extend the high frequency gain of the video amplifier by compensating for some of the internal high frequency roll off To use this capacitor and still provide variable gain adjustment the 51X and series 100X pot should be used with the red and green drive pins The 91X resistor used with the blue drive pin will set the system gain to approximately 6 2and allow adjustment of the red and green gains to 6 2plus or minus 25% The video signal at the collector of Q9is buffered and level shifted down by Q10and Q11to the base of the output emitter follower Q12 Between the emitter of Q12and the video output pin is a 40X resistor which was included to prevent spurious oscilla-tions when driving capacitive loads An external emitter re-sistor must be added between the video output pin and ground The value of this resistor should not be less than 390X or package power limitations may be exceeded when worst case (high supply max supply current max temp)cal-culations are made If negative going pulse slewing is a problem because of high capacitive loads (l 10pF) a more efficient method of emitter pull down would be to connect a suitable resistor to a negative supply voltage This has the effect of a current source pull down when the minus supply voltage is b 12V and the emitter current is approximately

10mA The system gain will also increase slightly because less signal will be lost across the internal 40X resistor Pre-cautions must be taken to prevent the video output pin from going below ground because IC substrate currents may cause erratic operation The collector currents from the vid-eo output transistors are returned to the power supply at V CC 2pin 23 When making power dissipation calculations note that the data sheet specifies only the V CC 1supply current at 12V The IC power dissipation contribution of V CC 2is dependent upon the video output emitter pull down load

In applications that require video amplifier shut down be-cause of fault conditions detected by monitor protection cir-cuits pin 11and the wiper arms of the contrast and bright-ness controls can be grounded without harming the IC This assumes some series resistance between the top of the control pots and V CC

Figure 7shows the internal construction of the pin 112 4V reference circuit which is used to provide temperature and supply voltage tracking compensation for the video amplifier inputs The value of the external DC biasing resistors should not be larger than 10k X because minor differences in input bias currents to the individual video amplifiers may cause offsets in gain

TL H 9178–7

FIGURE 7 LM1203Video Input Voltage Reference and Contrast Control Circuits

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Circuit Description(Continued)

Figure7also shows how the contrast control circuit is con-figured Resistors R23 24 diodes D3 4and transistor Q13 are used to establish a low impedance zero TC half supply voltage reference at the base of Q14 The differential ampli-fier formed by Q15 16and feedback transistor Q17along with resistors R27 28establish a diferential base voltage for Q3and Q4in Figure6 When externally adding or sub-tracting current from the collector of Q16 a new differential voltage is generated that reflects the change in the ratio of currents in Q15and Q16 To provide voltage control of the Q16current resistor R29is added between the Q16collec-tor and pin12 A capacitor should be added from pin12to ground to prevent noise from the contrast control pot from entering the IC

Figure8is a simplified schematic of the clamp gate and clamp comparator sections of the LM1203 The clamp gate circuit consists of a PNP input buffer transistor(Q18) a PNP emitter coupled pair referenced on one side to2 1V(Q19 20)and an output switch(Q21) When the clamp gate input at pin14is high(l1 5V)the Q21switch is on and shunts the I1850m A current to ground When pin14is low(k1 3V) the Q21switch is off and the I1850m A current source is mirrored or‘‘turned around’’by reference diode D5and Q26 to provide a850m A current source for the clamp compara-tor(s) The inputs to the comparator are similar to the clamp gate input except that an NPN emitter coupled pair is used to control the current which will charge or discharge the clamp capacitors at pins5 8 or10 PNP transistors are used at the inputs because they offer a number of advan-tages over NPNs PNPs will operate with base voltages at or near ground and will usually have a greater reverse emitter base breakdown voltage(BVebo) Because the differential input voltage to the clamp comparator during the video scan period could be greater than the BVebo of NPN transistors a resistor(R34)with a value one half that of R33or R35is connected between the bases of Q23and Q27 This resis-tor will limit the maximum differential input to Q24 25to approximately350mV The clamp comparator common mode range is from ground to approximately9V and the maximum differential input voltage is V CC and ground

TL H 9178–8

FIGURE8 Simplified Schematic of LM1203Clamp Gate and Clamp Comparator Circuits http www national com10

Additional Applications of the LM1203

Figure 9shows how the LM1203can be set up as a video buffer which could be used in low cost video switcher appli-cations Pin 14is tied high to turn off the clamp compara-tors The comparator input pins should be grounded as shown Sync tip (black level if sync is not included)clamping is provided by diodes at the amplifier inputs Note that the clamp cap pins are tied to the Pin 112 4V reference This was done along with the choice of 200X for the drive pin resistor to establish an optimum DC output voltage The

contrast control (Pin 12)will provide the necessary gain or attenuation required for channel balancing Changing the contrast control setting will cause minor DC shifts at the amplifier output which will not be objectionable as the out-put is AC coupled to the load The dual NPN PNP emitter follower will provide a low impedance output drive to the AC coupled 75X output impedance setting resistor The dual 500m F capacitors will set the low frequency response to approximately 4Hz

TL H 9178–9

FIGURE 9 RGB Video Buffer with Diode Sync Tip Clamps and 75X Cable Driver

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Additional Applications of the LM1203(Continued)

When diode D4at Pin11is switched to ground the input video signals will be DC shifted down and clamped at a voltage near ground(approximately250mV) This will dis-able the video amplifiers and force the output DC level low The DC outputs from other similarly configured LM1203s could overide this lower DC level and provide the output signals to the75X cable drivers In this case any additional LM1203s would share the same390X output resistor The maximum DC plus peak white output voltage should not be allowed to exceed7V because the‘‘off’’amplifier output stage could suffer internal zener damage See Figure3and text for a description of the internal configuration of the vid-eo amplifier Figure10shows the configuration for a three channel high frequency amplifier with non gated DC feedback Pin14is tied low to turn on the clamp comparators(feedback amplifi-ers) The inverting inputs(Pins17 21 26)are connected to the amplifier outputs from a low pass filter Additional low frequency filtering is provided by the clamp caps The drive resistors can be made variable or fixed at values between0 and300X Maximum output swings are achieved when the DC output is set to approximately4V The high frequency response will be dependent upon external peaking at the drive pins

TL H 9178–10

FIGURE10 Three Channel High Frequency Amplifier with Non-gated DC Feedback(Non-video Applications) http www national com12

TL H 9178–16

FIGURE 11 LM1203 LM1881Application Circuit for PC Board

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P C B o a r d w i t h C o m p o n e n t s

T L H 9178–17

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L M 1203R G B V i d e o A m p l i f i e r S y s t e m

Physical Dimensions inches (millimeters)unless otherwise noted

Lit 107315

28-Lead Molded Dual-In-Line Package (N)

Order Number LM1203N NS Package Number NA28F

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be reasonably expected to result in a significant injury to the user

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