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WF4M32-XXX5中文资料

White Electronic Designs

WF4M32-XXX5

PRELIMINARY*

FIGURE 1 – PIN CONFIGURATION FOR WF4M32-XH2X5

4Mx32 5V FLASH MODULE

FEATURES

Access Times of 100, 120, 150ns Packaging:

? 66 pin, PGA Type, 1.385" square, Hermetic Ceramic HIP (Package 402).? 68 lead, 40mm Low Pro? le CQFP (Package 502), 3.5mm (0.140") height.

? 68 lead, Hermetic CQFP (G2T), 22.4mm (0.880") square (Package 509) 4.57mm (0.180") height. Designed to ? t JEDEC 68 lead 0.990CQFJ footprint (Fig. 3) Sector Architecture

? 32 equal size sectors of 64KBytes per each 2Mx8 chip

? Any combination of sectors can be erased. Also supports full chip erase.

Minimum 100,000 Write/Erase Cycles Minimum Organized as 4Mx32

User con? gurable as 2x4Mx16 or 4x4Mx8 in HIP

and G4T packages. Commercial, I

ndustrial, and Military Tem p er a t ure

Ranges 5 Volt Read and Write. 5V ± 10% Sup p ly. Low Power CMOS

Data# Polling and Toggle Bit feature for detection of

program or erase cycle com p le t ion.

Supports reading or programming data to a sector

not being erased.

RESET# pin resets internal state machine to the

read mode.

Built-in Decoupling Caps and Multiple Ground Pins

for Low Noise Operation, Separate Power and Ground Planes to improve noise immunity

* T his product is under development, is not quali? ed or characterized and is subject to change without notice.Note: F or programming information refer to Flash Programming 16M5 Application Note.

White Electronic Designs WF4M32-XXX5

PRELIMINARY FIGURE 2 – PIN CONFIGURATION FOR WF4M32-XG4TX5

White Electronic Designs

WF4M32-XXX5

PRELIMINARY

HIP = 66 pin, PGA Type, 1.385" square, Hermetic Ceramic HIP (Package 402).G2T = 68 lead, Hermetic CQFP (G2T), 22.4mm (0.880") square. Designed to ? t JEDEC 68

lead 0.990" CQFJ footprint (Fig. 3) (Package 509)

G4T = 68 lead, 40mm Low Pro? le CQFP, 3.5mm (0.140") (Package 502 )

ABSOLUTE MAXIMUM RATINGS

Parameter

Symbol

Ratings

Unit

Voltage on Any Pin Relative to V SS V T -2.0 to +7.0

V Power Dissipation P T 8W Storage Temperature T STG -65 to +125°C Short Circuit Output Current I OS 100mA Endurance — write/erase cycles (Mil Temp)

100,000 min.

cycles Data Retention (Mil Temp)

years

RECOMMENDED DC OPERATING CONDITIONS

Parameter Symbol Min Typ Max Unit Supply Voltage V CC 4.5 5.0 5.5V Ground V SS 000V Input High Voltage V IH 2.0–V CC + 0.5V Input Low Voltage V IL

-0.5

–+0.8V Operating Temperature (Mil.)T A -55–+125°C Operating Temperature (Ind.)

T A -40

–

+85

°C

DC CHARACTERISTICS - CMOS COMPATIBLE

V CC = 5.0V, V SS = 0V, -55°C ≤ T A ≤ +125°C

HIP

G2T

G4T

Parameter Symbol Conditions

Min

Max

Min

Max Min

Max Unit Input Leakage Current I LI

V CC = 5.5, V IN = GND to V CC 101010μA Output Leakage Current I LOX32V CC = 5.5, V IN = GND to V CC 101010μA V CC Active Current for Read (1)I CC1CS# = V IL , OE# = V IH , f = 5MHz 320215345mA V CC Active Current for Program or Erase (2)

I CC2CS# = V IL , OE# = V IH 420295445mA V CC Standby Current I CC3V CC = 5.5, CS# = V IH ,

f = 5MHz, RESET# = V IH

20 2.095mA Output Low Voltage V OL I OL = 12.0 mA, V CC = 4.50.45

0.45

V Output High Voltage V OH I OH = -2.5 mA, V CC = 4.50.85 x V CC 0.85 x V CC 0.85 x V CC V Low V CC Lock-Out Voltage

V LKO

3.2

4.2 3.2 4.2 3.2 4.2

CAPACITANCE

T A = +25°C, V IN = OV, F = 1.0MHz

Parameter

Symbol HIP (H2)CQFP (G2T)CQFP(G4T)

OE# capacitance C OE

757520WE# capacitance C WE

7575 20CS# capacitance C CS

205020Data I/O capacitance C I/O

303030Address input capacitance C AD

757520This parameter is guaranteed by design but not tested.

NOTES:

1. The Icc current listed includes both the DC operating current and the frequency dependent component (@ 5MHz). The frequency component typically is less than 2mA/MHz, with OE# at V IH .

2. I CC active while Embedded Algorithm (program or erase) is in progress.

3. DC test conditions V IL = 0.3V, V IH = V CC - 0.3V

White Electronic Designs WF4M32-XXX5

PRELIMINARY AC Characteristics – Write/Erase/Program Operations - WE# Controlled

V CC = 5.0V, -55°C ≤ T A≤ +125°C

Parameter Symbol-100-120-150Unit

Min Max Min Max Min Max

Write Cycle Time t AVAV t WC100120150ns Chip Select Setup Time t ELWL t CS000ns Write Enable Pulse Width t WLWH t WP455050ns Address Setup Time t AVWL t AS000ns Data Setup Time t DVWH t DS455050ns Data Hold Time t WHDX t DH000ns Address Hold Time t WLAX t AH455050ns Write Enable Pulse Width High t WHWL t WPH202020ns Duration of Byte Programming Operation (1)t WHWH1300300300μs Sector Erase (2)t WHWH2151515sec Read Recovery Time before Write t GH W L000μs

V CC Setup Time t VCS505050μs Chip Programming Time444444sec Chip Erase Time (3)256256256sec Output Enable Hold Time (4) t OEH101010ns RESET# Pulse Width t RP500500500ns NOTES:

1. Typical value for t WHWH1 is 7μs.

2. Typical value for t WHWH2 is 1sec.

3. Typical value for Chip Erase Time is 32sec.

4. For Toggle and Data Polling.

AC CHARACTERISTICS – READ-ONLY OPERATIONS

V CC = 5.0V, V SS = 0V, -55°C ≤ T A≤ +125°C

Parameter Symbol-1000-120-150Unit

Min Max Min Max Min Max

Read Cycle Time T AVAV T RC100120150ns Address Access Time T AVQV T ACC100120150ns Chip Select Access Time T ELQV T CE100120150ns Output Enable to Output Valid T GLQV T OE405055ns Chip Select High to Output High Z (1)T EHQZ T DF203035ns Output Enable High to Output High Z (1)T GHQZ T DF203035ns Output Hold from Addresses, CS# or OE# Change,

T AXQX T OH000ns whichever is First

RESET# Low to Read Mode (1)T READY202020μs

1. Guaranteed by design, not tested.

White Electronic Designs WF4M32-XXX5

PRELIMINARY AC CHARACTERISTICS FOR G2T PACKAGE – WRITE/ERASE/PROGRAM OPERATIONS,

CS# CONTROLLED

V CC = 5.0V, GND = 0V, -55°C ≤ T A≤ +125°C

Parameter Symbol-100-120-150Unit

Min Max Min Max Min Max

Write Cycle Time t AVAV t WC100120150ns Write Enable Setup Time t WLEL t WS000ns Chip Select Pulse Width t ELEH t CP455050ns Address Setup Time t AVEL t AS000ns Data Setup Time t DVEH t DS455050ns Data Hold Time t EHDX t DH000ns Address Hold Time t ELAX t AH455050ns Chip Select Pulse Width High t EHEL t CPH20 2020ns Duration of Byte Programming Operation (1)t WHWH1300300300μs Sector Erase Time (2)t WHWH2151515sec Read Recovery Time t GHEL000μs Chip Programming Time444444sec Chip Erase Time (3)256256256sec Output Enable Hold Time (4) t OEH101010ns NOTES:

1. Typical value for t WHWH1 is 7μs.

2. Typical value for t WHWH2 is 1sec.

3. Typical value for Chip Erase Time is 32sec.

4. For Toggle and Data Polling.

White Electronic Designs

WF4M32-XXX5

PRELIMINARY

NOTES:

1. A21 must be held constant until WE# or CS# go high, whichever occurs ? rst.

2. Guaranteed by design, but not tested.

3. Typical value for t WHWH1 is 7μs.

4. Typical value for t WHWH2 is 1sec.

5. Typical value for Chip Erase Time is 32sec.

6. For Toggle and Data Polling.

AC CHARACTERISTICS FOR G4T AND H2 PACKAGES – WRITE/ERASE/PROGRAM OPERATIONS

- WE# CONTROLLED

V CC = 5.0V, T A = -55°C, -55°C ≤ T A ≤ +125°C

Parameter

Symbol -100

-120

-150

Unit Min Max

Min Max

Write Cycle Time

t AVAV t WC 100120150ns Chip Select Setup Time t ELWL t CS 000ns Write Enable Pulse Width t WLWH t WP 455050ns Address Setup Time t AVWL t AS 000ns Data Setup Time t DVWH t DS 455050ns Data Hold Time

t WHDX t DH 151515ns Address Hold Time (1)

t WLAX t AH 455050ns Write Enable Pulse Width High (2)

t WHWL t WPH

ns Duration of Byte Programming Operation (3)t WHWH1300300300μs Sector Erase (4)

t WHWH215

sec Read Recovery Time before Write t GH W L 000μs V CC Setup Time

t VCS

μs Chip Programming Time 444444sec Chip Erase Time (5)

256

sec Output Enable Hold Time (6) t OEH 101010ns RESET# Pulse Width

t RP

500

500500

AC CHARACTERISTICS FOR G4T AND H2 PACKAGES – READ-ONLY OPERATIONS

V CC = 5.0V, T A = -55°C, -55°C ≤ T A ≤ +125°C

Parameter

Symbol

-1000

-120

-150

Unit

Min

Max

Min

Max

Min

Max

Read Cycle Time T AVAV T RC 100

120

150

Address Access Time T AVQV T ACC 100120150ns Chip Select Access Time T ELQV T CE 100120150ns Output Enable to Output Valid T GLQV T OE 505055ns Chip Select High to Output High Z T EHQZ T DF 404545ns Output Enable High to Output High Z

T GHQZ T DF 40

ns Output Hold from Addresses, CS# or OE# Change, whichever is First T AXQX

T OH 00

RESET# Low to Read Mode

T READY

μs

White Electronic Designs WF4M32-XXX5

PRELIMINARY AC CHARACTERISTICS FOR G4T AND H2 PACKAGES – WRITE/ERASE/PROGRAM

OPERATIONS,CS# CONTROLLED

V CC = 5.0V, GND = 0V, -55°C ≤ T A≤ +125°C

FIGURE 5 – RESET TIMING DIAGRAM

White Electronic Designs WF4M32-XXX5

PRELIMINARY FIGURE 6 – AC WAVEFORMS FOR READ OPERATIONS

White Electronic Designs WF4M32-XXX5

PRELIMINARY FIGURE 7 – WRITE/ERASE/PROGRAM OPERATION, WE# CONTROLLED

White Electronic Designs WF4M32-XXX5

PRELIMINARY FIGURE 8 – AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS

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PRELIMINARY FIGURE 9 – AC WAVEFORMS FOR DATA# POLLING DURING EMBEDDED

ALGORITHM OPERATIONS

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PRELIMINARY FIGURE 10 – ALTERNATE CS# CONTROLLED PROGRAMMING OPERATION TIMINGS

White Electronic Designs WF4M32-XXX5

PRELIMINARY PACKAGE 402: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H2)

White Electronic Designs WF4M32-XXX5

PRELIMINARY PACKAGE 509: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2T)

White Electronic Designs

WF4M32-XXX5

PRELIMINARY

ORDERING INFORMATION

LEAD FINISH: Blank = Gold plated leads

A = Solder dip leads

V PP PROGRAMMING VOLTAGE

5 = 5 V

DEV I

CE GRADE:

M = Military -55°C to +125°C I = I ndustrial -40°C to +85°C C = Commercial 0°C to +70°C PACKAGE TYPE: H2 = Ceramic Hex In line Package, HIP (Package 402) G4T = 40mm Low Pro? le CQFP (Package 502)

G2T = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 509)

ACCESS T I

ME (ns) ORGANIZATION, 4M x 32

User con? gurable as 2x4M x 16 or 4x4M x 8 in HIP and G4T packages

FLASH

WHITE ELECTRONIC DESIGNS CORP .

W F 4M32 - XXX X X 5 X