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STK672-110中文资料

Ordering number : EN6041

Overview

The STK672-110 is a unipolar fixed-current chopper type 2-phase stepping motor driver hybrid IC. It features power MOSFETs in the output stage and a built-in phase signal distribution IC. The incorporation of a phase distribution IC allows the STK672-110 to control the speed of the

motor based on the frequency of an external input clock signal. It supports two types of excitation for motor control: 2-phase excitation and 1-2 phase excitation. It also provides a function for switching the motor direction.

Applications

?Two-phase stepping motor drive in send/receive facsimile units

?Paper feed in copiers, industrial robots, and other applications that require 2-phase stepping motor drive

Features

?The motor speed can be controlled by the frequency of an external clock signal (the CLOCK pin signal).

?The excitation type is switched according to the state (low or high) of the MODE pin. The mode is set to 2-phase or 1-2 phase excitation on the rising edge of the clock signal.

?A motor direction switching pin (the CWB pin) is provided.

?All inputs are Schmitt inputs and 40-k ?(typical: –50 to +100%) pull-up resistors are built in.

?The motor current can be set by changing the Vref pin voltage. Since a 0.22-?current detection resistor is built in, a current of 1 A is set for each 0.22 V of applied voltage.

?The input frequency range for the clock signal used for motor speed control is 0 to 25 kHz.

?Supply voltage ranges: V CC 1 = 10 to 42 V, V CC 2 = 5.0 V ±5%

?This IC supports motor operating currents of up to 1.8 A at Tc = 105°C, and of up to 2.65 A at Tc = 25°C.

Package Dimensions

unit: mm 4168

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

Thick-Film Hybrid IC

STK672-110

Parameter

Symbol Conditions

Ratings

Unit Maximum supply voltage 1V CC max No signal 52

V Maximum supply voltage 2V DD max No signal –0.3 to +7.0V Input voltage V IN max Logic input pins

–0.3 to +7.0

V Output current

I OH max V DD = 5 V, CLOCK ≥200 Hz

2.65A Repeated avalanche capacity Ear max 28mJ Allowable power dissipation Pd max With an arbitrarily large heat sink. Per MOSFET 6.5W Operating substrate temperature Tc max 105°C Junction temperature Tj max 150

°C Storage temperature

Tstg

–40 to +125

°C

Specifications

Maximum Rating at Ta = 25°C

Parameter

Symbol Conditions

Ratings Unit Maximum supply voltage 1V CC With signals applied 10 to 42V Maximum supply voltage 2V DD With signals applied

5.0 ±5%V Input voltage V IH 0 to V DD

V Phase current 1I OH 1Tc = 105°C, CLOCK ≥200 Hz

1.8A Phase current 2I OH 2Tc = 80°C, CLOCK ≥200 Hz

2.1A See the motor current (I OH ) derating curve Clock frequency

f CL Minimum pulse width: 20 μs 0 to 25kHz Phase driver withstand voltage

V DSS

I D = 1 mA (Tc = 25°C)100 min

V

Allowable Operating Ranges at Ta = 25°C

Parameter

Symbol Conditions

Ratings

Unit min

typ max

V DD supply current I CCO CLOCK = GND

2.66mA Output current

I oave With R/L = 3 ?/3.8 mH in each phase 0.41

0.450.50A Vref = 0.176 V FET diode forward voltage Vdf If = 1 A (R L = 23 ?) 1.2 1.8V Output saturation voltage Vsat R L = 23 ?0.73

1.02

V High-level input voltage V IH Pins 6 to 9 (4 pins) 4.0

V Low-level input voltage V IL Pins 6 to 9 (4 pins)

1.0V Input current I IL With pins 6 to 9 at the ground level.62125

250μA Pull-up resistance: 40 k ?(typical)Vref input voltage VrH Pin 12

3.5V Vref input bias current

I IB

With pin 12 at 1 V

50500

nA

Electrical Characteristics at Ta = 25°C, V CC = 24 V, V DD = 5 V

Note: A fixed-voltage power supply must be used.

Internal Equivalent Circuit Block Diagram

P h a s e e x c i t a t i o n s i g n a l g e n e r a t i o n

C h o p p i n g c i r c u i t

O f f t i m e s e t t i n g

P h a s e a d v a n c e c o u n t e r

E x c i t a t i o n m o d e s e l e c t i o n

STK672-110

Sample Application Circuit

?To minimize noise in the 5-V system, locate the ground side of capacitor CO2 in the above circuit as close as possible to pin 1 of the IC.

?Insert resistor RO3 (47 to 100 ?) so that the discharge energy from capacitor CO4 is not directly applied to the CMOS IC in this hybrid device. If the diode D1 has Vf characteristics with Vf less than or equal to 0.6 V (when If = 0.1 A), this will be smaller than the CMOS IC input pin diode Vf. If this is the case RO3 may be replaced with a short without problem.?Standard or HC type input levels are used for the pin 7, 8, and 9 inputs.

?If open-collector type circuits are used for the pin 7, 8, and 9 inputs, these circuit will be in the high-impedance state for high level inputs. As a result, chopping circuit noise may cause the input circuits to operate incorrectly. To prevent incorrect operation due to such noise, capacitors with values between 470 and 1000 pF must be connected between pins 7 and 11, 8 and 11, and 9 and 11. (A capacitor with a value between 470 and 1000 pF must be connected between pins 6 and 11 as well if an open-collector output IC is used for the RESETB pin (pin 6) input.)

?Taking the input bias current (I IB ) characteristics into account, the resistor RO1 must not exceed 100 k ?.

?The following circuit (for a lowered current of over 0.2 A) is recommended if the application needs to temporarily lower the motor current. Here, a value of close to 100 k ?must be used for resistor RO1 to make the transistor output saturation voltage as low as possible.

Input Pin Functions (CMOS input levels)

Pin Pin No.Function

Input conditions when operating CLOCK 9Reference clock for motor phase current switching Operates on the rising edge of the signal MODE 8Excitation mode selection Low: 2-phase excitation High: 1-2 phase excitation CWB 7Motor direction switching

Low: CW (forward)High: CCW (reverse)

RESETB

6

System reset and A, AB, B, and BB outputs cutoff.

A reset is applied by a low level

Applications must apply a reset signal for at least 20 μs when power is first applied.

?A simple reset function is formed from D1, CO4, and RO3 in this application circuit. With the CLOCK input held low,when the 5-V supply voltage is brought up a reset is applied if the motor output phases A and BB are driven. If the 5-V supply voltage rise time is slow (over 50 ms), the motor output phases A and BB may not be driven. Increase the value of the capacitor CO4 and check circuit operation again.

?See the timing chart for the concrete details on circuit operation.

Two-phase stepping motor

At least 100 μF

Usage Notes

?5-V system input pins

[RESETB and CLOCK (Input signal timing when power is first applied)]

As shown in the timing chart, a RESETB signal input is required by the driver to operate with the timing in which the F1 gate is turned on first. The RESETB signal timing must be set up to have a width of at least 20 μs, as shown below.The capacitor CO4 and the resistor RO3 in the application circuit form simple reset circuit that uses the RC time constant rising time. However, when designing the RESETB input based on CMOS levels, the application must have the timing shown in figure 1.

Figure 1 RESETB and CLOCK Signals Input Timing

See the timing chart for details on the CLOCK, MODE, CWB, and other input pins.

[Vref ]

In the sample application circuit, the peak value of the motor current (I O ) is set by RO1, RO2, and V DD (5 V) as described by the formula below.

I OH = Vref ÷Rs Here, Rs is hybrid IC internal current detection resistor Vref = (R02 ÷(R01 + R02)) ×5 V STK672-110 : Rs = 0.22 ?

?Allowable motor current operating range

The motor current (I O ) must be held within the range corresponding to the area under the curve shown in figure 4.

For example, if the operating substrate temperature Tc is 105°C, then I O must be held under I O max = 1.8 A, and in hold mode I O must be held under I O max = 1.5 A.

Figure 2 Motor Current I O

Flowing into the Driver IC

Rise of the 5-V supply voltage

RESETB signal input

CLOCK signal

At least 20 μs

At least 10 μs

?Thermal design

[Operating range in which a heat sink is not used]

The STK672-110 package has a structure that uses no screws, and is recommended for use without a heat sink. This section discusses the safe operating range when no heat sink is used.

In the maximum ratings specifications, Tcmax is specified to be 105°C, and when mounted in an actual end product system, the Tcmax value must never be exceeded during operation. Tc can be expressed by formula (A) below, and thus the range for ?Tc must be stipulated so that Tc is always under 105°C.

Tc = Ta + ?Tc (A)

Ta: Hybrid IC ambient temperature, ?Tc: Temperature increase across the aluminum substrate

As shown in figure 6, the value of ?Tc increases as the hybrid IC internal average power dissipation P D increases.

As shown in figure 5, P D increases with the motor current. Here we describe the actual P D calculation using the example shown in the motor current timing chart in figure 3.

Since there are periods when current flows and periods when the current is off during actual motor operation, P D cannot be determined from the data presented in figure 5. Therefore, we calculate P D assuming that actual motor operation consists of repetitions of the operation shown in figure 3.

Motor phase current

(sink side)

Figure 3 Motor Current Timing

T1: Motor rotation operation time

T2: Motor hold operation time

T3: Motor current off time

T2 may be reduced, depending on the application.

T0: Single repeated motor operating cycle

IO1 and IO2: Motor current peak values

Due to the structure of motor windings, the phase current is a positive and negative current with a pulse form.

Note that figure 3 presents the concepts here, and that the on/off duty of the actual signals will differ.

The hybrid IC internal average power dissipation P D can be calculated from the following formula.

P D= (T1 ×P1 + T2 ×P2 + T3) ÷T0 (I)

(Here, P1 is the P D for IO1 and P2 is the P D for IO2)

If the value calculated in formula (I) above is under 1.4 W, then from figure 6 we see that operation is allowed up to an ambient temperature Ta of 60°C.

While the operating range when a heat sink is not used can be determined from formula (I) above, figure 5 is merely a single example of one operating mode for a single motor.

For example, while figure 5 shows a 2-phase excitation motor, if 1-2 phase excitation is used with a 500-Hz clock frequency, the drive will be turned off for 25% of the time and the dissipation P D will be reduced to 75% of that in figure 5.

It is extremely difficult for Sanyo to calculate the internal average power dissipation P D for all possible end product conditions. After performing the above rough calculations, always install the hybrid IC in an actual end product and verify that the substrate temperature Tc does not rise above 105°C.

Timing Chart

2-phase excitation

Gate F1

Gate F2

Gate F3

Gate F4

1-2 phase excitation

Gate F1

Gate F2

Gate F3

Gate F4

1-2 phase excitation (CWB)

Gate F1

Gate F2

Gate F3

Gate F4

Switching from 2-phase to 1-2 phase excitation

Gate F1

Gate F2

Gate F3

Gate F4

This catalog provides information as of January 1999. Specifications and information herein are subject to change without notice.

M o t o r c u r r e n t , I O H — A

S u b s t r a t e t e m p e r a t u r e r i s e , ?T C — °C

Operating Substrate Temperature, T C — °C

With no heat sink, the IC vertical,and convection cooling

Hybrid IC internal average power disspation, P D — W

H y b r i d I C i n t e r n a l a v e r a g e p o w e r d i s s i p a t i o n , P D — W

Motor current, I OH — A

Continuous 2-phase excitation operation Motor used:R = 0.63 ?

L = 0.62 mH

The data are typical values.

Operating region when f CL ≥200 Hz

Operating region in hold mode

Motor:

Figure 4

Figure 6

Figure 5

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