ICE3BR1065JF
CoolSET ?
-F3R
ICE3BR1065JF
Off-Line SMPS Current Mode Controller with integrated 650V
CoolMOS ?
and Startup cell
(frequency jitter Mode) in FullPak
Power Management & Supply
Version 2.0, 11 Sep 2008
Edition 2008-09-11
Published by
Infineon Technologies AG,81726 Munich, Germany,
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CoolSET ?-F3R ICE3BR1065JF Revision History:2008-09-11Datasheet
Previous Version: 0.2
Page Subjects (major changes since last revision)15Add max. limitation for C BK capacitance
17,18Revise description of protection mode. Add constrains of 25.5V Vcc OVP 19Revise max. voltage for V FB , V CS and V BA
19Revise I D_Puls to T j =125°C and add the avalanche rating 23Add Drain Source Avalanche Breakdown Voltage 24~28Add typical controller performance characteristics 29,30Add typical CoolMOS ? performance characteristics 31Add input power curve 32
Revise outline dimension
Type Package V DS F OSC R DSon 1)1)typ @ T j =25°C
230VAC ±15%
85-265 VAC ICE3BR1065JF
PG-TO220-6-247
650V
67kHz
1.0
1782)
2)
Calculated maximum input power in an open frame design at T a =50°C, T j =125°C and R thSA (external heatsink) = 2.7K/W. Refer to input power curve for 120W 2)
CoolSET ?
-F3R
ICE3BR1065JF
Off-Line SMPS Current Mode Controller with
integrated 650V CoolMOS ? and Startup cell (frequency jitter Mode) in FullPak
PG-TO220FS-6
PG-TO220-6-247
Product Highlights
?TO220 FullPak with low Rdson MOSFET for high power application ?Active Burst Mode to reach the lowest Standby Power Requirements < 100mW
?Auto Restart protection for overload, overtemperature, overvoltage ?External auto-restart enable function ?Built-in soft start and blanking window
?Extendable blanking Window for high load jumps ?Built-in frequency jitter and soft driving for low EMI ?Green Mould Compound
?Pb-free lead plating; RoHS compliant
Description
The CoolSET ?-F3R FullPak is the enhanced version of CoolSET ?-F3 and targets for the Off-Line Adapters and high power range SMPS in DVD R/W, DVD Combi, set top box, etc. It has a wide Vcc range to 25V by adopting the BiCMOS technology. With the merit of Active Burst Mode, it can achieve the lowest Standby Power Requirements (<100mW) at no load and V in = 270VAC. Since the controller is always active during the Active Burst Mode, it is an immediate response on load jumps and leads to <1%voltage ripple voltage at output. In case of protection for Overtemperature, Overvoltage, Open loop and Overload conditions, it would enter Auto Restart Mode. Thanks for the internal precise peak current limitation, it can provide accurate information to optimize the dimension of the transformer and the output diode. The built-in blanking window can provide sufficient buffer time before entering the Auto Restart Mode. In case of longer blanking time, a simply addition of capacitor to BA pin can serve the purpose. Furthermore, the built-in frequency jitter function can effectively reduce the EMI noise and further reduce the scale of input filter. The component counts can further be reduced with the various built-in functions such as soft start,blanking time and frequency jitter.
Features
?650V avalanche rugged CoolMOS ?
with built-in Startup Cell
?Active Burst Mode for lowest Standby Power ?Fast load jump response in Active Burst Mode ?67kHz internally fixed switching frequency ?Auto Restart Protection Mode for Overload, Open Loop, VCC Undervoltage, Overtemperature & Overvoltage ?Built-in Soft Start
?Built-in blanking window with extendable blanking time for short duration high current ?External auto-restart enable pin ?Max Duty Cycle 75%
?Overall tolerance of Current Limiting < ±5%?Internal PWM Leading Edge Blanking
?BiCMOS technology provide wide VCC range ?
Built-in Frequency jitter and soft driving for low EMI
Table of Contents Page
1Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 1.1Pin Configuration with PG-TO220-6-247 . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 1.2Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
2Representative Blockdiagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
3Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 3.1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 3.2Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 3.3Improved Current Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3.3.1PWM-OP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 3.3.2PWM-Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 3.4Startup Phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.5PWM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 3.5.1Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 3.5.2PWM-Latch FF1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 3.5.3Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 3.6Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 3.6.1Leading Edge Blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 3.6.2Propagation Delay Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 3.7Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 3.7.1Basic and Extendable Blanking Mode . . . . . . . . . . . . . . . . . . . . . . . . . . .15 3.7.2Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 3.7.2.1Entering Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 3.7.2.2Working in Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 3.7.2.3Leaving Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 3.7.3Protection Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 3.7.3.1Auto Restart mode with extended blanking time . . . . . . . . . . . . . . . . .17 3.7.3.2Auto Restart without extended blanking time . . . . . . . . . . . . . . . . . . .18 4Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 4.1Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 4.2Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 4.3Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 4.3.1Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 4.3.2Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 4.3.3PWM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 4.3.4Soft Start time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 4.3.5Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 4.3.6Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 4.3.7CoolMOS? Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 5Typical Controller Performance Characteristics . . . . . . . . . . . . . . . . . .24
Table of Contents Page 6Typical CoolMOS? Performance Characteristics . . . . . . . . . . . . . . . . . .29 7Input Power Curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 8Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 9Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 10Schematic for recommended PCB layout . . . . . . . . . . . . . . . . . . . . . . . .34
CoolSET ?-F3R ICE3BR1065JF
Pin Configuration and Functionality
1
Pin Configuration and Functionality
1.1
Pin Configuration with PG-TO220-6-247
Figure 1
Pin Configuration PG-TO220-6-247
(front view)
1.2Pin Functionality
Drain (Drain of integrated CoolMOS ?)
Pin Drain is the connection to the Drain of the internal CoolMOS ? and the HV of the startup cell.
CS (Current Sense)
The Current Sense pin senses the voltage developed on the series resistor inserted in the source of the integrated CoolMOS ?. If CS voltage reaches the internal threshold of the Current Limit Comparator, the Driver output is immediately switched off. Furthermore the current information is provided for the PWM-Comparator to realize the Current Mode.
BA (extended Blanking & Auto-restart enable)
The BA pin combines the functions of extendable blanking time for over load protection and the external auto-restart enable. The extendable blanking time function is to extend the built-in 20 ms blanking time by adding an external capacitor at BA to ground. The external auto-restart enable function is an external access to stop the gate switching and force the IC to enter auto-restart mode. It is triggered by pulling down the BA pin to less than 0.33V.
VCC (Power Supply)
The VCC pin is the positive supply of the IC. The operating range is between 10.5V and 25V.GND (Ground)
The GND pin is the ground of the controller.
FB (Feedback)
The information about the regulation is provided by the FB Pin to the internal Protection Unit and to the internal PWM-Comparator to control the duty cycle. The FB-Signal is the only control signal in case of light load at the Active Burst Mode.
Pin Symbol Function
1Drain
650V 1) CoolMos ? Drain 1)
at T j =110°C
2CS Current Sense/
650V 1) CoolMOS ? Source 3BA extended Blanking & external Auto Restart enable 4VCC Controller Supply Voltage 5GND Controller Ground 6
FB
Feedback
ICE3BR1065JF
Representative Blockdiagram
2Representative Blockdiagram Array
Figure2Representative Blockdiagram
CoolSET ?-F3R ICE3BR1065JF
Functional Description
3Functional Description
All values which are used in the functional description are typical values. For calculating the worst cases the min/max values which can be found in section 4Electrical Characteristics have to be considered.
3.1Introduction
CoolSET ?-F3R FullPak is the further development of the CoolSET ?-F3 for high power application. The particular enhanced features are built-in features for soft start, blanking window and frequency jitter. It also provides the flexibility to increase the blanking window by simply adding capacitance in BA pin. However, the proven outstanding features in CoolSET ?-F3 are remained.
The intelligent Active Burst Mode at Standby Mode can effectively obtain the lowest Standby Power at minimum load and no load condition. After entering the burst mode, there is still a full control of the power conversion by the secondary side via the same optocoupler that is used for the normal PWM control.The response on load jumps is optimized. The voltage ripple on V out is minimized. V out is on well controlled in this mode.
The usually external connected RC-filter in the feedback line after the optocoupler is integrated in the IC to reduce the external part count.
Furthermore a high voltage Startup Cell is integrated into the IC which is switched off once the Undervoltage Lockout on-threshold of 18V is exceeded. This Startup Cell is part of the integrated CoolMOS ?. The external startup resistor is no longer necessary as this Startup Cell is connected to the Drain. Power losses are therefore reduced. This increases the efficiency under light load conditions drastically.
This version is adopting the BiCMOS technology and it can increase design flexibility as the Vcc voltage range is increased to 25V.
For this full package version, the soft start is a built-in function. It is set at 20ms. Then it can save external component counts.
There are 2 modes of blanking time for high load jumps; the basic mode and the extendable mode. The blanking time for the basic mode is pre-set at 20ms while the extendable mode will increase the blanking time at basic mode by adding external capacitor at the BA pin. During this time window the overload detection is disabled. With this concept no further external components are necessary to adjust the blanking window.
In order to increase the robustness and safety of the system, the IC provides Auto Restart protection mode.The Auto Restart Mode reduces the average power conversion to a minimum under unsafe operating conditions. This is necessary for a prolonged fault
condition which could otherwise lead to a destruction of the SMPS over time. Once the malfunction is removed,normal operation is automatically recovered after the next Start Up Phase.
The internal precise peak current limitation reduces the costs for the transformer and the secondary diode. The influence of the change in the input voltage on the power limitation can be avoided together with the integrated Propagation Delay Compensation.Therefore the maximum power is nearly independent on the input voltage which is required for wide range SMPS. There is no need for an extra over-sizing of the SMPS, e.g. the transformer or the secondary diode.Furthermore, this full package version implements the frequency jitter mode to the switching clock such that the EMI noise will be effectively reduced.
3.2
Power Management
Figure 3Power Management
The Undervoltage Lockout monitors the external supply voltage V VCC . When the SMPS is plugged to the main line the internal Startup Cell is biased and starts to charge the external capacitor C VCC which is connected to the VCC pin. This VCC charge current is controlled to 0.9mA by the Startup Cell. When the V VCC exceeds the on-threshold V CCon =18V the bias circuit are switched on. Then the Startup Cell is switched off by the Undervoltage Lockout and therefore no power
losses present due to the connection of the Startup Cell to the Drain voltage. To avoid uncontrolled ringing at switch-on a hysteresis start up voltage is implemented. The switch-off of the controller can only take place after Active Mode was entered and V VCC falls below 10.5V. The maximum current consumption before the controller is activated is about 150μA.
When V VCC falls below the off-threshold V CCoff=10.5V, the bias circuit is switched off and the soft start counter is reset. Thus it is ensured that at every startup cycle the soft start starts at zero.
The internal bias circuit is switched off if Auto Restart Mode is entered. The current consumption is then reduced to 250μA.
Once the malfunction condition is removed, this block will then turn back on. The recovery from Auto Restart Mode does not require re-cycling the AC line.
When Active Burst Mode is entered, the internal Bias is switched off most of the time in order to reduce the current consumption below 500μA.
3.3Improved Current Mode
Figure4Current Mode
Current Mode means the duty cycle is controlled by the slope of the primary current. This is done by comparing the FB signal with the amplified current sense signal.Figure5Pulse Width Modulation
In case the amplified current sense signal exceeds the FB signal the on-time t on of the driver is finished by
resetting the PWM-Latch (see Figure 5).
The primary current is sensed by the external series resistor R Sense inserted in the source of the integrated CoolMOS?. By means of Current Mode regulation, the secondary output voltage is insensitive to the line variations. The current waveform slope will change with the line variation, which controls the duty cycle.
The external R Sense allows an individual adjustment of the maximum source current of the integrated CoolMOS?.
To improve the Current Mode during light load conditions the amplified current ramp of the PWM-OP is superimposed on a voltage ramp, which is built by the switch T2, the voltage source V1 and a resistor R1 (see Figure 6). Every time the oscillator shuts down for maximum duty cycle limitation the switch T2 is closed by V
OSC
. When the oscillator triggers the Gate Driver, T2 is opened so that the voltage ramp can start.
In case of light load the amplified current ramp is too small to ensure a stable regulation. In that case the Voltage Ramp is a well defined signal for the comparison with the FB-signal. The duty cycle is then controlled by the slope of the Voltage Ramp.
By means of the time delay circuit which is triggered by
the inverted V
OSC
signal, the Gate Driver is switched-off until it reaches approximately 156ns delay time (see Figure 7). It allows the duty cycle to be reduced
continuously till 0% by decreasing V
FB
below that threshold.
Figure6Improved Current Mode Figure7Light Load Conditions 3.3.1PWM-OP
The input of the PWM-OP is applied over the internal
leading edge blanking to the external sense resistor R Sense connected to pin CS. R Sense converts the source current into a sense voltage. The sense voltage is amplified with a gain of 3.3 by PWM OP. The output of the PWM-OP is connected to the voltage source V1. The voltage ramp with the superimposed amplified current signal is fed into the positive inputs of the PWM-Comparator C8 and the Soft-Start-Comparator (see Figure 6).
3.3.2PWM-Comparator
The PWM-Comparator compares the sensed current signal of the integrated CoolMOS? with the feedback signal V
FB
(see Figure 8). V
FB
is created by an external optocoupler or external transistor in combination with
the internal pull-up resistor R
FB
and provides the load information of the feedback circuitry. When the amplified current signal of the integrated CoolMOS?exceeds the signal V FB the PWM-Comparator switches off the Gate Driver.
Figure8PWM Controlling
3.4
Startup Phase
Figure 9Soft Start
In the Startup Phase, the IC provides a Soft Start period to control the primary current by means of a duty cycle limitation. The Soft Start function is a built-in function and it is controlled by an internal counter..
Figure 10
Soft Start Phase
When the V VCC exceeds the on-threshold voltage, the IC starts the Soft Start mode (see Figure 10).
The function is realized by an internal Soft Start resistor, an current sink and a counter. And the amplitude of the current sink is controlled by the counter (see Figure 11).
Figure 11
Soft Start Circuit
After the IC is switched on, the V SOFTS voltage is controlled such that the voltage is increased step-wisely (32 steps) with the increase of the counts. The Soft Start counter would send a signal to the current sink control in every 600us such that the current sink decrease gradually and the duty ratio of the gate drive increases gradually. The Soft Start will be finished in 20ms (t Soft-Start ) after the IC is switched on. At the end of the Soft Start period, the current sink is switched off.
Figure 12
Gate drive signal under Soft-Start Phase
Within the soft start period, the duty cycle is increasing from zero to maximum gradually (see Figure 12).
In addition to Start-Up, Soft-Start is also activated at each restart attempt during Auto Restart.
Figure13Start Up Phase
The Start-Up time t Start-Up before the converter output
voltage V
OUT is settled, must be shorter than the Soft-
Start Phase t Soft-Start (see Figure 13).
By means of Soft-Start there is an effective minimization of current and voltage stresses on the integrated CoolMOS?, the clamp circuit and the output overshoot and it helps to prevent saturation of the transformer during Start-Up.3.5PWM Section
Figure14PWM Section Block
3.5.1Oscillator
The oscillator generates a fixed frequency of 67KHz with frequency jittering of ±4% (which is ±2.7KHz) at a jittering period of 4ms.
A capacitor, a current source and current sink which determine the frequency are integrated. The charging and discharging current of the implemented oscillator capacitor are internally trimmed, in order to achieve a very accurate switching frequency. The ratio of controlled charge to discharge current is adjusted to reach a maximum duty cycle limitation of D max=0.75. Once the Soft Start period is over and when the IC goes into normal operating mode, the switching frequency of the clock is varied by the control signal from the Soft Start block. Then the switching frequency is varied in range of 67KHz ± 2.7KHz at period of 4ms.
3.5.2PWM-Latch FF1
The output of the oscillator block provides continuous pulse to the PWM-Latch which turns on/off the internal CoolMOS?. After the PWM-Latch is set, it is reset by the PWM comparator, the Soft Start comparator or the Current -Limit comparator. When it is in reset mode, the output of the driver is shut down immediately.
3.5.3Gate Driver
Figure 15Gate Driver
The driver-stage is optimized to minimize EMI and to provide high circuit efficiency. This is done by reducing the switch on slope when exceeding the internal CoolMOS ? threshold. This is achieved by a slope control of the rising edge at the driver’s output (see Figure 9).
Figure 16
Gate Rising Slope
Thus the leading switch on spike is minimized.Furthermore the driver circuit is designed to eliminate cross conduction of the output stage.
During power up, when VCC is below the undervoltage lockout threshold V VCCoff , the output of the Gate Driver is set to low in order to disable power transfer to the secondary side.
3.6
Current Limiting
Figure 17Current Limiting Block
There is a cycle by cycle peak current limiting operation realized by the Current-Limit comparator C10. The source current of the integrated CoolMOS ? is sensed via an external sense resistor R Sense . By means of R Sense the source current is transformed to a sense voltage V Sense which is fed into the pin CS. If the voltage V Sense exceeds the internal threshold voltage V csth, the comparator C10 immediately turns off the gate drive by resetting the PWM Latch FF1.
A Propagation Delay Compensation is added to support the immediate shut down of the integrated CoolMOS ? with very short propagation delay. Thus the influence of the AC input voltage on the maximum output power can be reduced to minimal.
In order to prevent the current limit from distortions caused by leading edge spikes, a Leading Edge Blanking is integrated in the current sense path for the comparators C10, C12 and the PWM-OP.
The output of comparator C12 is activated by the Gate G10 if Active Burst Mode is entered. When it is activated, the current limiting is reduced to 0.26V. This voltage level determines the maximum power level in Active Burst Mode.
3.6.1Leading Edge Blanking
Figure18Leading Edge Blanking
Whenever the internal CoolMOS? is switched on, a leading edge spike is generated due to the primary-side capacitances and reverse recovery time of the secondary-side rectifier. This spike can cause the gate drive to switch off unintentionally. In order to avoid a premature termination of the switching pulse, this spike is blanked out with a time constant of t LEB = 220ns. 3.6.2Propagation Delay Compensation In case of overcurrent detection, there is always propagation delay to switch off the internal CoolMOS?.
An overshoot of the peak current I
peak is induced to the
delay, which depends on the ratio of dI/dt of the peak current (see Figure 19).
Figure19Current Limiting
The overshoot of Signal2 is larger than of Signal1 due to the steeper rising waveform. This change in the slope is depending on the AC input voltage. Propagation Delay Compensation is integrated to reduce the overshoot due to dI/dt of the rising primary current. Thus the propagation delay time between exceeding the current sense threshold V csth and the switching off of the integrated CoolMOS? is compensated over temperature within a wide range. Current Limiting is then very accurate.For example, I
peak
= 0.5A with R
Sense
= 2. The current sense threshold is set to a static voltage level V csth=1V without Propagation Delay Compensation. A current ramp of dI/dt = 0.4A/μs, or dV Sense/dt = 0.8V/μs, and a propagation delay time of t Propagation Delay =180ns leads to an I peak overshoot of 14.4%. With the propagation delay compensation, the overshoot is only around 2% (see Figure 20).
Figure20Overcurrent Shutdown
The Propagation Delay Compensation is realized by means of a dynamic threshold voltage V csth (see Figure 21). In case of a steeper slope the switch off of the driver is earlier to compensate the delay.
Figure21Dynamic Voltage Threshold V csth
3.7Control Unit
The Control Unit contains the functions for Active Burst Mode and Auto Restart Mode. The Active Burst Mode and the Auto Restart Mode both have 20ms internal Blanking Time. For the Auto Restart Mode, a further extendable Blanking Time is achieved by adding
external capacitor at BA pin. By means of this Blanking Time, the IC avoids entering into these two modes accidentally. Furthermore those buffer time for the overload detection is very useful for the application that works in low current but requires a short duration of high current occasionally.
3.7.1Basic and Extendable Blanking Mode
Figure 22Basic and Extendable Blanking Mode
There are 2 kinds of Blanking mode; basic mode and the extendable mode. The basic mode is just an internal pre-set 20ms blanking time while the extendable mode has extra blanking time by connecting an external capacitor to the BA pin in addition to the pre-set 20ms blanking time. For the extendable mode, the gate G5 is blocked even though the 20ms blanking time is reached if an external capacitor C BK is added to BA pin. While the 20ms blanking time is passed, the switch S1 is opened by G2. Then the 0.9V clamped voltage at BA pin is charged to 4.0V through the internal I BK constant current. Then G5 is enabled by comparator C3. After the 30us spike blanking time, the Auto Restart Mode is activated.
For example, if C BK = 0.22uF, I BK = 13.5uA
Blanking time = 20ms + C BK x (4.0 - 0.9) / I BK = 70ms
In order to make the startup properly, the maximum C BK capacitor is restricted to less than 0.65uF.
The Active Burst Mode has basic blanking mode only while the Auto Restart Mode has both the basic and the extendable blanking mode.
3.7.2Active Burst Mode
The IC enters Active Burst Mode under low load conditions. With the Active Burst Mode, the efficiency increases significantly at light load conditions while still maintaining a low ripple on V OUT and a fast response on load jumps. During Active Burst Mode, the IC is controlled by the FB signal. Since the IC is always active, it can be a very fast response to the quick change at the FB signal. The Start up Cell is kept OFF in order to minimize the power loss.
Figure 23Active Burst Mode
The Active Burst Mode is located in the Control Unit.Figure 23 shows the related components.
3.7.2.1Entering Active Burst Mode
The FB signal is kept monitoring by the comparator C5.During normal operation, the internal blanking time counter is reset to 0. When FB signal falls below 1.22V,it starts to count. When the counter reach 20ms and FB signal is still below 1.22V, the system enters the Active Burst Mode. This time window prevents a sudden entering into the Active Burst Mode due to large load jumps.
After entering Active Burst Mode, a burst flag is set and
the internal bias is switched off in order to reduce the Array current consumption of the IC to approx. 500uA.
It needs the application to enforce the VCC voltage
above the Undervoltage Lockout level of 10.5V such
that the Startup Cell will not be switched on
accidentally. Or otherwise the power loss will increase
drastically. The minimum VCC level during Active Burst
Mode depends on the load condition and the
application. The lowest VCC level is reached at no load
condition.
3.7.2.2Working in Active Burst Mode
After entering the Active Burst Mode, the FB voltage
rises as V OUT starts to decrease, which is due to the
inactive PWM section. The comparator C6a monitors
the FB signal. If the voltage level is larger than 3.6V, the
internal circuit will be activated; the Internal Bias circuit
resumes and starts to provide switching pulse. In
Active Burst Mode the gate G10 is released and the
current limit is reduced to 0.26V. In one hand, it can
reduce the conduction loss and the other hand, it can
reduce the audible noise. If the load at V OUT is still kept
unchanged, the FB signal will drop to 3.1V. At this level
the C6b deactivates the internal circuit again by
switching off the internal Bias. The gate G11 is active
again as the burst flag is set after entering Active Burst
Mode. In Active Burst Mode, the FB voltage is changing
like a saw tooth between 3.1V and 3.6V (see figure 17).
3.7.2.3Leaving Active Burst Mode
The FB voltage will increase immediately if there is a
high load jump. This is observed by the comparator C4.
As the current limit is appr. 26% during Active Burst
Mode, a certain load jump is needed so that the FB
signal can exceed 4.5V. At that time the comparator C4
resets the Active Burst Mode control which in turn
blocks the comparator C12 by the gate G10. The
maximum current can then be resumed to stabilize
V OUT.
Figure24Signals in Active Burst Mode
3.7.3Protection Modes
The IC provides Auto Restart Mode as the protection feature. Auto Restart mode can prevent the SMPS from destructive states. The following table shows the relationship between possible system failures and the chosen protection modes.
Before entering the Auto Restart protection mode, some of the protections can have extended blanking time to delay the protection and some needs to fast react and will go straight to the protection. Overload and open loop protection are the one can have extended blanking time while Vcc Overvoltage, Over temperature, Vcc Undervoltage, short opto-coupler and external auto restart enable will go to protection right away.
After the system enters the Auto-restart mode, the IC will be off. Since there is no more switching, the Vcc voltage will drop. When it hits the Vcc turn off threshold, the start up cell will turn on and the Vcc is charged by the startup cell current to Vcc turn on threshold. The IC is on and the startup cell will turn off. At this stage, it will enter the startup phase (soft start) with switching cycles. After the Start Up Phase, the fault condition is checked. If the fault condition persists, the IC will go to auto restart mode again. If, otherwise, the fault is removed, normal operation is resumed. 3.7.3.1Auto Restart mode with extended
blanking time
Figure25Auto Restart Mode
In case of Overload or Open Loop, the FB exceeds 4.5V which will be observed by comparator C4. Then the internal blanking counter starts to count. When it reaches 20ms, the switch S1 is released. Then the clamped voltage 0.9V at V BA can increase. When there is no external capacitor C
BK
connected, the V BA will reach 4.0V immediately. When both the input signals at AND gate G5 is positive, the Auto Restart Mode will be activated after the extra spike blanking time of 30us is elapsed. However, when an extra blanking time is needed, it can be achieved by adding an external
capacitor, C
BK
. A constant current source of I
BK
will start to charge the capacitor C BK from 0.9V to 4.0V after the switch S1 is released. The charging time from 0.9V to
4.0V are the extendable blanking time. If C
BK
is 0.22uF and I BK is 13.5uA, the extendable blanking time is around 50ms and the total blanking time is 70ms. In combining the FB and blanking time, there is a blanking window generated which prevents the system to enter Auto Restart Mode due to large load jumps.
VCC Overvoltage Auto Restart Mode Overtemperature Auto Restart Mode
Overload Auto
Restart
Mode
Open Loop Auto Restart Mode
VCC Undervoltage Auto Restart Mode
Short Optocoupler Auto Restart Mode
External auto restart
enable
Auto Restart Mode
3.7.3.2Auto Restart without extended blanking
time
Figure26Auto Restart mode
There are 2 modes of V CC overvoltage protection; one is during soft start and the other is at all conditions. The first one is V VCC voltage is > 20.7V and FB is > 4.5V and during soft_start period and the IC enters Auto Restart Mode. The VCC voltage is observed by comparator C1. The fault conditions are to detect the abnormal operating during start up such as open loop during light load start up, etc. The logic can eliminate the possible of entering Auto Restart mode if there is a
small voltage overshoots of V
VCC during normal
operating.
The 2nd one is V VCC >25.5V and last for 120us and the IC enters Auto Restart Mode. This 25.5V Vcc OVP protection is inactivated during burst mode.
The Thermal Shutdown block monitors the junction temperature of the IC. After detecting a junction temperature higher than 130°C, the Auto Restart Mode is entered.
In case the pre-defined auto-restart features are not sufficient, there is a customer defined external Auto-restart Enable feature. This function can be triggered by pulling down the BA pin to < 0.33V. It can simply add a trigger signal to the base of the externally added transistor, T AE at the BA pin. When the function is enabled, the gate drive switching will be stopped and then the IC will enter auto-restart mode if the signal persists. To ensure this auto-restart function will not be mis-triggered during start up, a 1ms delay time is implemented to blank the unstable signal.
VCC undervoltage is the Vcc voltage drop below Vcc turn off threshold. Then the IC will turn off and the start up cell will turn on automatically. And this leads to Auto Restart Mode.
Short Optocoupler also leads to VCC undervoltage. When the FB pin is pulled low, there is no switching pulse. Then the Vcc will drop to Vcc turn off threshold. And it leads to Auto Restart Mode.
4
Electrical Characteristics
Note:
All voltages are measured with respect to ground (Pin 5). The voltage levels are valid if other ratings are not violated.
4.1
Absolute Maximum Ratings
Note:
Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 4(V CC) is discharged before assembling the application circuit.T a =25°C unless otherwise specified.
Parameter Symbol Limit Values Unit Remarks
min.
max.Switching drain current, pulse width t p limited by max. T j =150°C
I s - 6.59A Pulse drain current, pulse width t p limited by max. T j =150°C
I D_Puls
-13A Avalanche energy, repetitive t AR limited by max. T j =150°C 1)
1)Repetitive avalanche causes additional power losses that can be calculated as P AV =E AR *f E AR -0.17mJ I D =3A
Avalanche current, repetitive t AR limited by max. T j =150°C 1)I AR -3A VCC Supply Voltage V VCC -0.327V FB Voltage V FB -0.3 5.5V BA Voltage V BA -0.3 5.5V CS Voltage
V CS -0.3 5.5V Junction Temperature T j -40150°C Controller & CoolMOS ?Storage Temperature T S -55150°C Thermal Resistance Junction -Ambient R thJA -82K/W Thermal Resistance Junction -case
R thJC
- 4.4K/W Soldering temperature, wavesoldering only allowed at leads T sold -260°C 1.6mm (0.063 in.) from case for 10s Power dissipation, T c =25°C P tot -28W Refer to Figure 57ESD Capability (incl. Drain Pin)V ESD
-
2kV Human body model 2) 2)
According to EIA/JESD22-A114-B (discharging a 100pF capacitor through a 1.5k ? series resistor)
Mounting torque
60
Ncm
M2.5 screws
4.2
Operating Range
Note:
Within the operating range the IC operates as described in the functional description.
4.3
Characteristics
4.3.1Supply Section
Note:
The electrical characteristics involve the spread of values within the specified supply voltage and junction temperature range T J from –25 °C to 125°C. Typical values represent the median values, which are related to 25°C. If not otherwise stated, a supply voltage of V CC =18V is assumed.
Parameter Symbol Limit Values Unit Remarks
min.
max.VCC Supply Voltage V VCC V VCCoff 25V Max. value limited due to Vcc OVP
Junction Temperature of Controller
T jCon -25130°C Max value limited due to thermal shut down of controller
Junction Temperature of CoolMOS ?
T jCoolMOS
-25
150
°C
Parameter Symbol
Limit Values Unit Test Condition
min.
typ.max.Start Up Current I VCCstart -150250μA V VCC =17V VCC Charge Current
I VCCcharge1-- 5.0mA V VCC = 0V I VCCcharge20.550.9 1.60mA V VCC = 1V I VCCcharge3
-0.7-mA V VCC =17V Leakage Current of
Start Up Cell and CoolMOS ?I StartLeak
-
0.2
50
μA
V Drain = 600V at T j =100°C 1)
1)
The parameter is not subjected to production test - verified by design/characterization
Supply Current with Inactive Gate
I VCCsup1- 1.5 2.5mA Supply Current with Active Gate I VCCsup2- 2.9 4.2mA I FB = 0A Supply Current in
Auto Restart Mode with Inactive Gate
I VCCrestart
-
250
-
μA
I FB = 0A
Supply Current in Active Burst Mode with Inactive Gate I VCCburst1-500950μA V FB = 2.5V
I VCCburst2-500950μA V VCC = 11.5V,V FB = 2.5V
VCC Turn-On Threshold VCC Turn-Off Threshold VCC Turn-On/Off Hysteresis
V VCCon V VCCoff V VCChys
17.09.8-
18.010.57.5
19.011.2-
V V V