My_First_Niosii

My First Nios II for Altera DE2-115 Board

- i CONTENTS

Chapter 1 Hardware Design (1)

1.1 Required Features (1)

1.2 Creation of Hardware Design (1)

1.3 Download Hardware Design to Target FPGA (44)

Chapter 2 NIOS II IDE Build Flow (47)

2.1 Create the hello_world Example Project (47)

2.2 Build and Run the Program (51)

2.3 Edit and Re-Run the Program (53)

2.4 Why the LED Blinks (55)

2.5 Debugging the Application (56)

2.6 Configure System Library (58)

Chapter 3 Programming the CFI Flash (60)

3.1 Modify the SOPC of the Project (60)

3.2 Modify the myfirst_niosii.v (71)

3.3 Re-assign pins (73)

3.4 Re-Configure System Library (75)

3.5 Programming the CFI Flash (76)

- 1 Chapter 1 Hardware Design

This tutorial provides comprehensive information that will help you understand how to create a FPGA based SOPC system implementing on your FPGA development board and run software upon it.

1.1 R e q u i r e d F e a t u r e s

The Nios II processor core is a soft-core central processing unit that you could program onto an Altera field programmable gate array (FPGA). This tutorial illustrates you to the basic flow covering hardware creation and software building. Y ou are assumed to have the latest Quartus II and NIOS II EDS software installed and quite familiar with the operation of Windows OS. If you use a different Quartus II and NIOS II EDS version, there will have some small difference during the operation. You are also be assumed to possess a DE2-115 development board (other kinds of dev. Board based on Altera FPGA chip also supported).

The example NIOS II standard hardware system provides the following necessary components:

Nios II processor core, that’s where the software will be executed

On-chip memory to store and run the software

JTAG link for communication between the host computer and target

hardware (typically using a USB-Blaster cable) LED peripheral I/O (PIO), be used as indicators

1.2 C r e a t i o n o f H a r d w a r e D e s i g n

This section describes the flow of how to create a hardware system including SOPC feature.

1. Launch Quartus II then select File ->New Project Wizard , start to create a new project. See Figure 1-1 and Figure 1-

2.

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Figure 1-1 Start to Create a New Project

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Figure 1-2 New Project Wizard

2. Choose a working directory for this project, type project name and top-level entity name as shown in Figure 1-

3. Then click Next , you will see a window as shown in Figure 1-

4.

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Figure 1-3 Input the working directory, the name of project, top-level design entity

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Figure 1-4 New Project Wizard: Add Files [page 2 of 5]

3. Click Next to next window. We choose device family and device settings. You should choose settings the same as the Figure 1-5. Then click Next to next window as shown in Figure 1-6.

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Figure 1-5 New Project Wizard: Family & Device Settings [page 3 of 5]

4. Click Next and will see a window as shown in Figure 1-7. Figure 1-7 is a summary about our new project. Click Finish to finish new project. Figure 1-8 show a new complete project.

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Figure 1-6 New Project Wizard: EDA Tool Settings [page 4 of 5]

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Figure 1-7 New Project Wizard: Summary [page 5 of 5]

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Figure 1-8 A New Complete Project

5. Choose Tools > SOPC Builder to open new SOPC system wizard .See Figure 1-9 and Figure 1-10.

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Figure 1-9 SOPC Builder Menu

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Figure 1-10 Create New SOPC System [0]

6. Rename System Name as shown in Figure 1-11. Click OK and your will see a window as shown

in Figure 1-12.

Figure 1-11 Create New System [1]

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Figure 1-12 Create New System [2]

7. Click the Name of the Clock Settings table, rename clk_0 to clk_50. Press Enter to complete the

update. See Figure 1-13.

Figure 1-13 Rename Clock Name

8. Choose Library > Processors > Nios II Processor to open wizard of adding cpu component. See Figure 1-14 and Figure 1-15.

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Figure 1-14 Add Nios II Processor

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Figure 1-15 Nios II Processor

9. Click Finish to return to main window as shown in Figure 1-16.

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Figure 1-16 Add Nios II CPU completely

10. Choose cpu_0 and right-click then choose rename , after this, you can update cpu_0 to cpu . See Figure 1-17 and Figure 1-18.

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Figure 1-17 Rename CPU name (1)

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Figure 1-18 Rename CPU Name (2)

11. Choose Library > Interface Protocols > Serial > JTAG UART to open wizard of adding JTAG UART. See Figure 1-19 and Figure 1-20.

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Figure 1-19 Add JTAG UART (1)