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MAX5166MECM+T中文资料

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General Description

The MAX5166 contains four 1-to-8 multiplexers and 32sample/hold amplifiers. The sample/hold amplifiers are organized into four octal sample/holds with separate inputs and independent TTL/CMOS-compatible hold enables for each octal set. Additional 3-bit TTL/CMOS-compatible address logic selects the 1-to-8 multiplexer channel. The MAX5166 is available with an output imped-ance of 50?, 500?, or 1k ?, allowing output filtering.

The MAX5166 operates with +10V and -5V supplies,and a separate +5V digital logic supply. Manufactured with a proprietary BiCMOS process, it provides high accuracy, fast acquisition time, low droop rate, and a low hold step. The device acquires 8V step input sig-nals to 0.01% accuracy in 2.5μs. Transitions from sam-ple mode to hold mode result in only 0.5mV of error.While in hold mode, the output voltage slowly droops at a rate of 1mV/sec. The MAX5166 is available in a 48-pin TQFP package.

Applications

Automatic Test Systems (ATE)Industrial Process Controls Arbitrary Function Generators Avionics Equipment

Features

o Quad, 8-Channel Sample/Hold o 0.01% Accuracy of Acquired Signal o 0.01% Linearity Error o Fast Acquisition Time: 2.5μs o Low Droop Rate: 1mV/sec o Low Hold Step: 0.25mV

o Wide Output Voltage Range: +7V to -4V

MAX5166

32-Channel Sample/Hold Amplifier

with Four Multiplexed Inputs

________________________________________________________________Maxim Integrated Products

1

19-1456; Rev 0; 8/99

Pin Configuration

Ordering Information

M A X 5166

32-Channel Sample/Hold Amplifier with Four Multiplexed Inputs 2_______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(V DD = +10V, V SS = -5V, V L = +5V ±5%, AGND = DGND, R L = 5k ?, C L = 50pF, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25°C.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

V DD to AGND.......................................................-0.3V to +11.0V V SS to AGND.........................................................-6.0V to +0.3V V DD to V SS ......................................................................+15.75V V L to DGND...........................................................-0.3V to +6.0V V L to AGND...........................................................-0.3V to +6.0V DGND to AGND.....................................................-0.3V to +2.0V IN_ to AGND...............................................................V SS to V DD A_, M_ to DGND....................................................-0.3V to +6.0V Maximum Current into Output Pin ....................................±10mA

Maximum Current into A_, M_..........................................±20mA Continuous Power Dissipation (T A = +70°C)

48-Pin TQFP (derate 12.5mW/°C above +70°C)..................1W Operating Temperature Ranges

MAX5166_CCM ...................................................0°C to +70°C MAX5166_ECM.................................................-40°C to +85°C Storage Temperature Range.............................-65°C to +150°C Lead Temperature (soldering, 10sec).............................+300°C

MAX5166

32-Channel Sample/Hold Amplifier

with Four Multiplexed Inputs _______________________________________________________________________________________3 ELECTRICAL CHARACTERISTICS (continued)

(V DD= +10V, V SS= -5V, V L = +5V ±5%, AGND = DGND, R L= 5k?, C L= 50pF, T A= T MIN to T MAX, unless otherwise noted. Typical

values are at T A= +25°C.)

Note 1:Guaranteed by design.

Note 2:Only one M_ input may be asserted low at a time, so only one channel is selected (see Single vs. Simultaneous Sampling).

Note 3:Do not exceed the absolute maximum rating for V DD to V SS of +15.75V (see Absolute Maximum Ratings).

M A X 5166

32-Channel Sample/Hold Amplifier with Four Multiplexed Inputs 4_______________________________________________________________________________________

Typical Operating Characteristics

(V DD = +10V, V SS = -5V, V L = +5V, IN _= +5V, R L = ∞, C L = 0, AGND = DGND, T A = +25°C, unless otherwise noted.)

042108616141218

-40

20

-20

40

60

80

100DROOP RATE vs. TEMPERATURE

M A X 5166-01

TEMPERATURE (°C)

D R O O P R A T

E (m V /s e c )

100010,000

0-10

-20-30-40-60-50-70-80-90

1

10100POWER-SUPPLY REJECTION RATIO

(HOLD MODE)

FREQUENCY (kHz)

P S R R (d B )

1000

10,000

0-10-20-30-40-60-50-70

-80-901

10

100POWER-SUPPLY REJECTION RATIO

(SAMPLE MODE)

FREQUENCY (kHz)

P S R R (d B )

25

50

75-40

20

40

-20

60

80

100

HOLD STEP vs. TEMPERATURE

M A X 5166-04

TEMPERATURE (°C)

H O L D S T E P (μV )

0-20-10

-50-40-30-60-70-90-80

-100

-5.0

-3.0

-1.0

1.0

3.0

5.0

7.0

9.0

HOLD STEP vs. INPUT VOLTAGE

M A X 5166-07

INPUT VOLTAGE (V)

H O L D S T E P (μV )

-5.0

-4.0-4.5-3.0-3.5-2.5-2.0-40

20

40

-20

60

80

100

OFFSET VOLTAGE vs. TEMPERATURE

M A X 5166-05

TEMPERATURE (°C)

O F F S E T V O L T A G E (m V )

1.00

1.101.051.201.151.301.251.35

1.451.401.50-5.0-

2.0-0.51.0-

3.5 2.5

4.0

5.58.57.010.0

DROOP RATE vs. INPUT VOLTAGE

M A X 5166-06

INPUT VOLTAGE (V)

D R O O P R A T

E (m V /s e c )-4.5

-4.3-4.4

-4.0-4.1-4.2-3.9-3.8-3.6-3.7-3.5

OFFSET VOLTAGE vs. INPUT VOLTAGE

M A X 5166-08

INPUT VOLTAGE (V)

O F F S E T V O L T A G E (m V )

-5.0

-3.0

-1.0

1.0

3.0

5.0

7.0

9.0

MAX5166

32-Channel Sample/Hold Amplifier

with Four Multiplexed Inputs

_______________________________________________________________________________________

5

_______________________________________________________________________________________

Figure 1. Functional Diagram

M A X 5166

32-Channel Sample/Hold Amplifier with Four Multiplexed Inputs 6

_______________________________________________________________________________________

_______________Detailed Description

The MAX5166 connects four separate analog inputs to four internal 1-to-8 analog multiplexers. Each multiplex-er channel connects to a buffered sample/hold circuit and a series output resistor, creating a four-input device with 32 sample/hold output channels. Three multiplexer channel-address inputs and four mode-select inputs (one for each multiplexer) control channel selection and sample/hold functions (Figure 1 and Tables 1 and 2).

Digital Interface

Three address pins and 3-to-8 address decoder logic select the channel for all four internal analog multiplex-ers. The mode-select inputs (M3–M0) independently control the sample/hold functions for each multiplexer (Tables 1 and 2).

Sample/Hold

The MAX5166 contains 32 buffered sample/hold cir-cuits with internal hold capacitors. Internal hold capaci-tors minimize leakage current, dielectric absorption,feedthrough, and required board space. The value of the hold capacitor affects acquisition time, hold step,and droop rate. Lower capacitance allows faster acqui-

sition times but increases the droop rate. Higher values increase hold time and acquisition time. The hold capacitor used in the MAX5166 provides fast 2.5μs (typ) acquisition time while maintaining a low 1mV/sec (typ) droop rate, making the sample/hold ideal for high-speed sampling.

Sample Mode

Driving M3–M0 low (one at a time) selects sample mode (Tables 1 and 2). During sample mode, the selected multiplexer channel connects to IN_ allowing the hold capacitor to acquire the input signal. To guar-antee an accurate sample, maintain sample mode for at least 4μs. Sampling for longer than 4μs results in tracking. Only the addressed channel on the selected multiplexer samples the input; all other channels remain in hold mode.

Hold Mode

Driving M3–M0 high selects hold mode. Hold mode dis-ables the multiplexer, which disconnects all eight chan-nels on the 1-to-8 multiplexer from the input. When a channel is disconnected, the hold capacitor maintains the sampled voltage at the output with a 1mV/sec droop rate (towards V DD ).

_________________________________________________________________________________________Pin Description

Hold Step

When switching between sample mode and hold mode, the voltage of the hold capacitor changes due to charge injection from stray capacitance. This voltage change, called hold step, is minimized by limiting the amount of stray capacitance seen by the hold capaci-tor. The MAX5166 limits the hold step to 0.25mV (typ).An output capacitor to ground can be used to filter out this small hold-step error.

Output

The MAX5166 contains an output buffer for each multi-plexer channel (32 total), so the hold capacitor sees a high-impedance input, reducing the droop rate. While in hold mode, the hold capacitor discharges at a rate of 1mV/sec (typ). The buffer also provides a low output impedance; however, the device contains output resis-tors in series with the buffer output (Figure 1) for select-ed output filtering. To provide greater design flexibility,the MAX5166 is available with an R O of 50?, 500?, or 1k ?.

Note: Output loads increase the analog supply cur-rent (I DD and I SS ). Excessive loading of the output(s)damages the device by consuming more power than the device will dissipate (see Absolute Maximum Ratings ). The resistor-divider formed by the output resistor (R OUT_) and load impedance (R L ) scales the sampled voltage (V SAMP ). Determine the output volt-age (V OUT_) as follows:

Voltage Gain = A V = R L /(R L + R OUT )

V OUT_= V SAMP ·A V The maximum output voltage range depends on the analog supply voltages available and the scaling factor used:

(V SS + 0.75V) ·A V ≤V OUT_≤(V DD - 2.4V) ·A V

when R L = ∞, then A V = 1, and this equation becomes (V SS + 0.75V) ≤V OUT ≤(V DD - 2.4V).

Timing Definitions

Acquisition time (t AQ ) is the amount of time the MAX5166 must remain in sample mode for the hold capacitor to acquire an accurate sample. The hold-mode settling time (t H ) is the amount of time necessary for the output voltage to settle to its final value.Aperture delay (t AP ) is the time interval required to dis-connect the input from the hold capacitor. The inhibit pulse width (t PW ) is the amount of time the MAX5166must remain in hold mode while the address is changed. The data setup time (t DS ) is the amount of time an address must be maintained before the address becomes valid. The data hold time (t DH ) is the amount of time an address must be maintained after mode select has gone from low to high (Figure 2).

MAX5166

32-Channel Sample/Hold Amplifier

with Four Multiplexed Inputs

_______________________________________________________________________________________7

0 = Logic Low, 1 = Logic High

0 = Logic Low, 1 = Logic High

*Only one M_ input asserted low; all others must be logic high to meet the timing specification (see Single vs. Simultaneous Sampling).

M A X 5166

32-Channel Sample/Hold Amplifier with Four Multiplexed Inputs 8_______________________________________________________________________________________

Figure 2. Timing Performance

__________Applications Information

Combining Inputs

The MAX5166 contains a separate input for each 1-to-8multiplexer. Externally connect the input pins to form larger multiplexers. When all four inputs are connected to the same source, the MAX5166 is functionally equiv-alent to the MAX5165, except the MAX5166 does not contain output clamping diodes.

Control-Line Reduction

The MAX5166 contains four separate 1-to-8 multiplexers and individual mode selectors for each multiplexer. When sampling one channel at a time, use an external 2-to-4decoder (with active-low outputs) to reduce the number of digital control lines from seven to five (Figure 3).

Single vs. Simultaneous Sampling

Individually control the four mode/multiplexer-select pins to simultaneously sample on four channels, the same channel for each multiplexer (Figure 4). Each mode-select pin controls sampling on one of the 1-to-8multiplexers, while the 3-bit address selects one of the eight channels on all the multiplexers (Tables 1 and 2).Setting any combination of the mode-select pin low enables sampling on the addressed channels for the selected multiplexers.

Simultaneously sampling two or more channels reduces offset voltage but increases acquisition time. Multiply the single-channel acquisition time by the number of channels sampling.

Multiplexed DAC

Figure 5 shows a typical demultiplexer application.Different digital codes are converted by the digital-to-analog converter (DAC) and then stored on eight differ-ent channels, or as many as 32 different channels when all four inputs are active. The 100mV/sec (max)droop rate requires refreshing the hold capacitors every 100ms before the voltage drops by 1/2LSB for an 8-bit DAC with a 5V full-scale voltage.

Powering the MAX5166

The MAX5166 does not require a special power-up sequence to avoid latchup. The device requires three separate supply voltages for operation; however, when one or two of the voltages are not available, DC-DC charge-pump (switched-capacitor) converters provide a simple, efficient solution. The MAX860 provides volt-age doubling or inversion, ideal for conversions from +5V to +10V or from +5V to -5V. The MAX860 also functions as a voltage divider to provide conversion from +10V to +5V.

MAX5166

32-Channel Sample/Hold Amplifier

with Four Multiplexed Inputs

_______________________________________________________________________________________

9

Figure 3. Control-Line Reduction

Figure 4. Simultaneous Sampling

M A X 5166

32-Channel Sample/Hold Amplifier with Four Multiplexed Inputs 10______________________________________________________________________________________

Chip Information

TRANSISTOR COUNT: 5077

Figure 5. Multiplexing a DAC

MAX5166

32-Channel Sample/Hold Amplifier

with Four Multiplexed Inputs

______________________________________________________________________________________11

Package Information

M A X 5166

32-Channel Sample/Hold Amplifier with Four Multiplexed Inputs Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

12____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600?1999 Maxim Integrated Products

Printed USA

is a registered trademark of Maxim Integrated Products.

NOTES

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