SILVACO-2D Process Simulation Software-ssuprem4

SSuprem4 is the state-of-the-art 1D and 2D process simulator that is widely used in semiconductor industry for design, analysis and optimization of various fabrication technologies. SSuprem4 accurately simulates all major process steps in modern technology by using a wide range of advanced physical models for diffusion, implantation, oxidation, silicidation and epitaxy. Within the ATHENA frame-work, SSuprem4 is fully integrated to Optolith for photolithography simulation, Elite for physical etching and deposition simulation and MC Implant for advanced Monte Carlo ion implantation.

? Fast and accurate simulation of all critical process steps used in CMOS, bipolar, optoelectronics and power device technologies ? Simulation of both silicon and advanced semiconductor technologies including SiGe/SiGeC, SiC, GaAs, InP , AlGaAs and InGaAs ? Accurate prediction of geometry, dopant distributions and stresses in device structure allows the elimination or substantial reduction in the number of expensive experiments ? Analysis and optimization of standard and modern isolation processes including LOCOS, SWAMI, deep and shallow trench isolation ? Analysis and fine tuning of ion implantation processes used at different stages of device fabrication including very shallow junction implants e.g. 0.2 keV, high angle implants and high energy implants for deep well formation ? Hierarchy of impurity diffusion models accurately predict dopant behavior in the bulk and near material surfaces. ? Various diffusion effects are taken into account, including tran-sient enhanced diffusion, oxidation/silicidation enhanced dif-fusion, transient activation, point defect and cluster formation/recombination, impurity segregation and transport at material interfaces ? Geometrical etch and conformal deposition as well as several structure and grid manipulating techniques allow simulation and analysis of many device geometries ? Mask formation specification through the MaskViews layout editor allows the user to efficiently analyze mask layout variation effects on individual process steps and final device structure ? Seamless interface with lithography simulator Optolith and etching and deposition simulator Elite allows analysis of realistic topology in physical processes ? Interfaces automatically with ATLAS for subsequent device

simulation

Advanced Semiconductor Process Simulation Solutions

2D Process Simulation Software

SSuprem4

SSuprem4 is applicable to all silicon IV-IV and III-V device technologies. The comprehensive capabilities of SSuprem4 include robust oxidation models, comprehensive implantation models, a hierarchy of diffusion models and general purpose deposition and etch models, enabling the simulation of complex geometries. Standard MOS and bipolar transistor, devices such as FLASH EEPROM cells, advanced geometry CCDs, HEMTs, HBT, MESFETs and all types of power devices can be modeled. Any structure created in SSuprem4 can be seamlessly passed to

device simulators for electrical analysis.

The figure above illustrates a polysilicon emitter bipolar transistor created in SSuprem4. Accurate base width control is critical to the manufacturing of such devices. The advanced diffusion models in SSuprem4 are able to simulate co-dif-

fusion effects such as emitter push.

The figure above illustrates a buried bit-line EPROM cell. The polysilicon oxidation model allows accurate simulation of important EPROM effects such as the lifting of the polysilicon floating gate and the stress in the inter-poly ONO structure.

ATHENA simulation of a 90nm CMOS process using silicides contacts, halo implants, and shallow junctions.

Device geometries are larger in power device processing, but the final transistor struc-tures are often two-dimensional in nature. The example shown above is a power DMOS transistor with a self-aligned source contact process.

For advanced CCD structures, lens shaped structures are used to provide increased optical resolution. In the above structure, symmetry is used to speed the simulation time. Only one section of the structure is simulated which is then reflected several times to produce the repeating gate structure used in the electrical analysis.

Complete Device Fabrication

MOSFET Device

Bipolar Device

EPROM Device

CCD Device

Power Device

The figure above shows simulated GaAs MESFET device structure. The doping in the gate region is formed by low dose 100 keV Be and Si implants while source/drain areas are

formed by higher dose 50 keV Si implant with subsequent anneal at 850 degrees C.

This figure to the left shows the pseudomorphic HEMT device. The device is build on the GaAs substrate. The InGaAs channel is sandwiched between two AlGaAs regions. The composition fractions of AlGaAs (0.22 for Al) and InGaAs (0.78 for In) are specified during deposition of the layers. The structure also includes 2 delta dopings above and below the channel which are used as additional carrier suppliers for better control of the threshold voltage. The source and drain regions are made from GaAs and the doping is

formed by Se diffusion.

MESFET Device

HEMT Device

The figure above shows a low-temperature transient enhanced diffusion of Boron. The significantly enhanced diffusion rate in the first five seconds is apparent.

Advanced Diffusion Simulation

Low-Temperature Transient Enhanced Diffusion This figure shows the comparison with experimental data for a very short high-temperature anneal of a PMOS source/drain profile.

Successful use of low thermal budget processes and ultra-shallow junctions are key manufacturing issues for 90nm and smaller technology nodes. Accurate simulation of low-energy implants with subsequent rapid thermal annealing (RTA) or very low-temperature furnace annealing can be done in SSUPREM4 using advanced diffusion models including point defect and defect cluster generation/recombination.

RTA Diffusion

Various process steps involve surface reaction and material transformations which result in boundary movements, volume changes and stress formation. SSuprem4 simulates two most important processes: oxidation and silicidation. Complex local oxidations together with etching and deposition are used to provide advanced isolation structures. Silicides are considered as

preferred materials for contact and interconnect metallization.

The structure above shows trench oxidation with the interstitials injected by oxidation. Interstitials injected at the oxidizing interface are “trapped” in the trench while those in the silicon diffuse around the bottom of the trench and affect diffusion in the areas to the left of the trench.

Shown left is an example of poly-buffered LOCOS isolation. The lifting of the polysili-con layer, due to stress, is clearly illustrated.

Oxidation and Silicidation Simulation

Deep Trench Isolation

Poly-Buffered Isolation

Stress related reliability and misoperation issues are very important in modern semi-conductor technologies. The figure demonstrates stresses built near the corners of a shallow trench during oxidation.

Stress in Shallow Trench Structure SSuprem4 provides unique capabilities for the simulation of silicide processes. It models the two-dimensional formation of silicides, dopant redistribution and diffusion in the silicide layer. The figure above shows the final structure from a self-aligned silicidation (salicide) process.

Self-Aligned Silicidation

Compound Semiconductor Simulations

Comparison of boron profiles for varying initial doping concentrations; structure an-nealed for 12 hours at 850 C; uniform Ge fraction of 10%. The most outstanding feature of the simulation results is the pileup of boron at the Si/SiGe interface. This occurs

because boron has a higher activation energy in silicon than in silicon germanium.

The figure above shows codiffusion of Be and Si in the gate area of GaAs MESFET. The hump in the Be profile where it intersects with the Silicon-28 profile is due to the electric field effect.

The figure above demonstrates the effect of n-type doping on Zinc diffusion in InP . It has been found that the main diffusion mechanism for Zn in A3B5 compounds is via doubly charged interstitial pairs. Therefore, high background Se (n-type ) doping concentration results in strong retardation of zinc diffusion. Also, the Zn diffusion profiles drop abruptly

when n- and p-type concentrations are close to each other near the pn-junction.

Boron Diffusion in SiGe

Dopant Codiffusion Effects GaAs MESFET Gate

All implantation and diffusion models used for silicon technology simulation are available for compound semiconductors. These include analytical and Monte Carlo implant, electric field and point defect effects, segregation and transport at material interfaces. Several specific models are implemented for diffusion in SiGe/SiGeC including the effects of Ge and C content on boron and interstitial diffusivity and intrinsic carrier concentration.

Captions: Monte Carlo simulation of Al implants into 6H-SiC at 30, 90, 195, 500 and 1000 keV with doses of 3.0 x 1013, 7.9 x 1013, 3.8 x 1014, 3.0 x 1013 ions/cm 2. The implants were 9° off-axis to avoid channeling. SIMS data are taken from Hernandez-

Mangas, et.al. Journal of Applied Physics, v.91, pp.658--667, 2002.

Aluminium Implants into 6H-SiC

Physical Models and Features

Diffusion

? Impurity diffusion fully coupled with point defect diffusion ? Oxidation enhanced/retarded diffusion

? Rapid thermal annealing and Transient Enhanced Diffusion (TED)? High concentration effects

? TED effects due to implant induced point defects and {311} interstitial clusters

? Grain based polysilicon diffusion model ? Transient impurity activation model

? Model which account for Ge and C content on B diffusion in SiGe/SiGeC

? Donor/acceptor co-diffusion effects

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Model for impurity dose loss at silicon/oxide interface

Implantation

? Experimentally verified Pearson and dual Pearson implant models ? Non-Gaussian depth-dependent lateral implant distribution functions

? Extended implant moments tables with energy, dose, rotation and oxide thickness variations

? User-defined or Monte Carlo extracted implant moments ? Seamless interface to Monte Carlo implantation module

Silicidation

? Models for titanium, tugsten, cobalt, and platinum silicides ? Experimentally verified growth rates

? Reactions and boundary motion on silicide/metal and silicide/ silicon(polysilicon) interfaces

? Accurate material consumption model

? Independent rates for silicon and polysilicon materials

Oxidation

? Compressive and viscoelastic stress-dependent models ? Separate rate coefficients for silicon and polysilicon materials ? HCL and pressure enhanced oxidation models ? Impurity concentration dependent effects

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Robust formulation models deep trenches, undercuts and ONO layers

? Accurate models for simultaneous oxidation and lifting of floating polysilicon regions

Deposition, Etching, Epitaxy

? Deposition and etch specification via MaskViews layout editor ? User defined and automatic non-uniform grid specification for deposition and eptiaxy

? Special algorithm for conformal deposition on highly non-planar structures

? 2-D epitaxy simulation including auto-doping capability ? Seamless interface with physical etching and deposition models of Elite

Structure and Grid Manipulation Features

? Structure mirroring ? Structure stretch

? Relaxation of grid density

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Seamless interface with DevEdit for interactive or

automatic structure and grid adaptation

The lightly doped drain (LDD) regions of a half micron MOSFET can be formed without spacers using a large angle tilt implant in a LATID process. This implant is rotated through 360 degrees to give a symmetrical device structure. SSuprem4 uses an extremely fast analytical method to simulate the effects of tilt and rotation. The figure above illustrates a device with a phosphorus LDD implanted at 45o as indicated by the arrows.

Ion Implant Simulation

Large Angle Implant Variety of analytical and Monte Carlo Implant models allow to accurately simulate ion implantation used in all modern semiconductor fabrication technologies.

Dose Dependence of Implant

The figure to the left illustrates simulation results using MC Implant and compares them to measured data. The lines are MC Implant simulation profiles; diamonds represent SIMS profiles. Experimental and calculated depth profiles of phosphorus implanted at 100KeV, tilt = 0o and different fluences in the range of 1013 cm -2 to 1015 cm -2. Experiments are complied from R.J. Schreutelkamp et al., “Channeling Implantation of B and P in Silicon”, Nuclear Instruments and Methods, B55, pp.

615–619, 1991.

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