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MAX5907EEE-T中文资料

General Description

The MAX5904–MAX5909 dual hot-swap controllers provide complete protection for dual-supply systems.These devices hot swap two supplies ranging from +1V to +13.2V, provided one supply is at or above 2.7V,allowing the safe insertion and removal of circuit cards into live backplanes.

The discharged filter capacitors of the circuit card pro-vide low impedance to the live backplane. High inrush currents from the backplane to the circuit card can burn up connectors and components, or momentarily col-lapse the backplane power supply leading to a system reset. The MAX5904 family of hot-swap controllers pre-vents such problems by gradually ramping up the output voltage and regulating the current to a preset limit when the board is plugged in, allowing the system to stabilize safely. After the startup cycle is completed, two on-chip comparators provide VariableSpeed/BiLevel? protec-tion against short-circuit and overcurrent faults, as well as immunity against system noise and load transients. In the event of a fault condition, the load is disconnected.The MAX5905/MAX5907/MAX5909 must be unlatched after a fault, and the MAX5904/MAX5906/MAX5908 auto-matically restart after a fault.

The MAX5904 family offers a variety of options to reduce component count and design time. All devices integrate an on-board charge pump to drive the gates of low-cost,external n-channel MOSFETs. The devices offer integrat-ed features like startup current regulation and current glitch protection to eliminate external timing resistors and capacitors. The MAX5906–MAX5909 provide an open-drain status output, an adjustable startup timer, an adjustable current limit, an uncommitted comparator,and output undervoltage/overvoltage monitoring.

The MAX5904/MAX5905 are available in 8-pin SO pack-ages. The MAX5906–MAX5909 are available in space-saving 16-pin QSOP packages.

Applications

PCI-Express ?

Applications

Basestation Line Cards Network Switches or Routers Solid-State Circuit Breaker Power-Supply Sequencing Hot Plug-In Daughter Cards RAID

Features

?Safe Hot-Swap for +1V to +13.2V Power Supplies

Requires One Input ≥2.7V

?Low 25mV Default Current-Limit Threshold ?Inrush Current Regulated at Startup ?Circuit Breaker Function

?Adjustable Circuit Breaker/Current-Limit Threshold

?VariableSpeed/BiLevel Circuit-Breaker Response ?Autoretry or Latched Fault Management ?On/Off Sequence Programming

?Status Output Indicates Fault/Safe Condition

?Output Undervoltage and Overvoltage Monitoring and/or Protection

MAX5904–MAX5909

Low-Voltage, Dual Hot-Swap Controllers/Power

Sequencers

________________________________________________________________Maxim Integrated Products

Pin Configurations

Ordering Information

19-2238; Rev 3; 9/05

For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at https://www.wendangku.net/doc/8b2307911.html,.

Selector Guide and Typical Operating Circuits appear at end of data sheet.

VariableSpeed/BiLevel is a trademark of Maxim Integrated Products, Inc.

PCI-Express is a registered trademark of PCI-SIG Corp.

M A X 5904–M A X 5909

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ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(V IN _ = +1V to +13.2V provided at least one supply is higher than +2.7V, V ON = +2.7V, T A = 0°C to +85°C , unless otherwise noted.Typical values are at V IN1= +5V, V IN2= +3.3V, and T A = +25°C.) (Note 1)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

IN_ to GND...........................................................................+14V GATE_ to GND..........................................+0.3V to (V IN _ + 6.2V)ON, PGOOD, COMP+, COMPOUT, TIM

to GND.....-0.3V to the higher of (V IN1+ 0.3V) and (V IN2+ 0.3V)SENSE_, MON_, LIM_ to GND...................-0.3V to (V IN _ + 0.3V)Current into Any Pin .........................................................±50mA

Continuous Power Dissipation (T A = +70°C)

8-Pin Narrow SO (derate 5.9mW/°C above +70°C)......471mW 16-Pin QSOP (derate 8.3mW/°C above +70°C)............667mW Operating Temperature Ranges:

MAX590_U_ _ .....................................................0°C to +85°C MAX590_E_ _ ...................................................-40°C to +85°C Storage Temperature Range.............................-65°C to +150°C Lead Temperature (soldering, 10s).................................+300°C

MAX5904–MAX5909

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_______________________________________________________________________________________3

ELECTRICAL CHARACTERISTICS (continued)

M A X 5904–M A X 5909

Sequencers 4_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS

_ = +1V to +13.2V provided at least one supply is higher than +2.7V, V = +2.7V, T = -40°C to +85°C , unless otherwise noted.

MAX5904–MAX5909

Sequencers

_______________________________________________________________________________________5

ELECTRICAL CHARACTERISTICS (continued)

_ = +1V to +13.2V provided at least one supply is higher than +2.7V, V = +2.7V, T = -40°C to +85°C , unless otherwise noted.tion tested.

Note 2:V IN rising slew rate must be less than 0.2V/μs.

Note 3:The MAX5906–MAX5909 slow-comparator threshold is adjustable. V SC,TH = R LIM x 0.25μA + 25mV (see the Typical

Operating Characteristics ).

Note 4:The current-limit slow-comparator response time is weighted against the amount of overcurrent; the higher the overcurrent

condition, the faster the response time. See the Typical Operating Characteristics .

Note 5:The startup period (t START ) is the time during which the slow comparator is ignored and the device acts as a current limiter

by regulating the sense current with the fast comparator. See the Startup Period section.

M A X 5904–M A X 5909

Sequencers 6_______________________________________________________________________________________

Typical Operating Characteristics

(Typical Operating Circuits, Q1 = Q2 = Fairchild FDB7090L, V IN1= +5V, V IN2= +3.3V, T A = +25°C, unless otherwise noted. Channels 1 and 2 are identical in performance. Where characteristics are interchangeable, channels 1 and 2 are referred to as X and Y.)

00.60.40.21.00.81.81.61.41.22.00

SUPPLY CURRENT vs. SUPPLY VOLTAGE

V INX (V)

I I N (m A )

0.60.40.21.00.81.81.61.41.22.00

1214

TOTAL SUPPLY CURRENT vs. SUPPLY VOLTAGE

V INX (V)

I I N (m A )

0.60.40.20.8

1.01.21.4

1.61.8

2.0

-40

-15

SUPPLY CURRENT vs. TEMPERATURE

TEMPERATURE (°C)

I I N (m A )

021

43560

GATE-DRIVE VOLTAGE vs.

INPUT VOLTAGE

V INX (V)

G A T E -D R I V E V O L T A G E (V )

0604020

80100120140160180200

GATE-CHARGE CURRENT vs. GATE VOLTAGE

V GATEX (V)

G A T E -C H A R G E C U R R E N T (μA )

1015

60402080100120140160180200

-40

-15

GATE-CHARGE CURRENT vs. TEMPERATURE

TEMPERATURE (°C)

G A T E -C H A R G E C U R R E N T (μA )

060402080100120140160180200

1020GATE WEAK DISCHARGE CURRENT

vs. GATE VOLTAGE

V GATEX (V)

G A T E D I S C H A R G E C U R R E N T (μA )

60402080

100120140160180200-40

-15

85GATE WEAK DISCHARGE CURRENT

vs. TEMPERATURE

TEMPERATURE (°C)

G A T E D I S C H A R G E C U R R E N T (μA )

214356

0105

GATE STRONG DISCHARGE CURRENT

vs. GATE VOLTAGE

V GATEX (V)

G A T E D I S C H A R G E C U R R E N T (m A )

MAX5904–MAX5909

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0214356-40

-15

GATE STRONG DISCHARGE CURRENT

vs. TEMPERATURE

TEMPERATURE (°C)

G A T E D I S C H A R G E C U R R E N T (m A )

0.0001

0.001

0.1

0.01

1100

100125150175200

TURN-OFF TIME vs. SENSE VOLTAGE

V IN - V SENSE (mV)

T U R N -O F F T I M E (m s )

0.1

20303525404550556065707580

TURN-OFF TIME vs. SENSE VOLTAGE

(EXPANDED SCALE)

V IN - V SENSE (mV)

T U R N -O F F T I M E (m s )

0402080

601001200

200100

300

400

SLOW-COMPARATOR THRESHOLD

vs. R LIM

M A X 5904 t o c 13

R LIM (k ?)

V S C , T H (m V )

201040305060STARTUP PERIOD vs. R TIM

M A X 5904 t o c 14

R TIM (k ?)

t S T A R T (m s )

0200300100400500600

V PGOOD 5V/div

V SENSE - V IN 100mV/div V GATE 5V/div

TURN-OFF TIME

SLOW-COMPARATOR FAULT

1ms/div V IN = 5.0V

t SCD 26mV STEP

0V V PGOOD 5V/div

V SENSE - V IN 100mV/div V GATE 5V/div

TURN-OFF TIME

FAST-COMPARATOR FAULT

400ns/div V IN = 5.0V

t FCD

125mV STEP

V ON 2V/div

V PGOOD 2V/div

I OUT 5A/div V OUT 5V/div V GATE 5V/div

STARTUP WAVEFORMS

FAST TURN-ON

MAX5904 toc17

1ms/div

V IN = 5.0V, R SENSE = 10m ?,R TIM = 27k ?, C BOARD = 1000μF

Typical Operating Characteristics (continued)

M A X 5904–M A X 5909

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I OUT 5A/div V OUT 5V/div V GATE 5V/div

AUTORETRY DELAY

MAX5904 toc19

40ms/div

V IN = 5.0V, R SENSE = 10m ?, R TIM = 47k ?,

C BOAR

D = 1000μF, R BOARD = 1.4?

V ON 2V/div V PGOOD 2V/div I OUT 5A/div V OUT 5V/div V GATE 5V/div

STARTUP WAVEFORMS

SLOW TURN-ON

MAX5904 toc18

1ms/div

V IN = 5.0V, R SENSE = 10m ?, R TIM = 47k ?,

C BOAR

D = 1000μF, C GAT

E = 22n

F Typical Operating Characteristics (continued)

The MAX5904–MAX5909 are circuit breaker ICs for hot-swap applications where a line card is inserted into a live backplane. These devices hot swap supplies rang-ing from +1V to +13.3V, provided one supply is at or above 2.7V. Normally, when a line card is plugged into a live backplane, the card’s discharged filter capacitors provide low impedance that can momentarily cause the main power supply to collapse. The MAX5904–MAX5909 reside either on the backplane or on the removable card to provide inrush current limiting and short-circuit protection. This is achieved by using exter-nal n-channel MOSF ETs, external current-sense resis-tors, and two on-chip comparators. Figure 1 shows the MAX5906–MAX5909 functional diagram.

The MAX5904/MAX5905 have a fixed startup period and current-limit threshold. The startup period and cur-rent-limit threshold of the MAX5906–MAX5909 can be adjusted with external resistors.

Startup Period R TIM sets the duration of the startup period for the MAX5906–MAX5909 from 0.4ms to 50ms (see the Setting the Startup Period, R TIM section). The duration of the startup period is fixed at 9ms for the MAX5904/ MAX5905. The startup period begins after the following three conditions are met:

1)V IN1or V IN2exceeds the UVLO threshold (2.4V) for

the UVLO to startup delay (37.5ms).

2)V ON exceeds the channel 1 ON threshold (0.825V).

V ON should be delayed from the application of a steep rising edge at IN_ by inserting a minimum RC time delay of 20μs.

Latched and Autoretry Fault Management section.) The MAX5904–MAX5909 limit the load current if an overcurrent fault occurs during startup. The slow com-parator is disabled during the startup period and the load current can be limited in two ways:

1)Slowly enhancing the MOSF ETs by limiting the

MOSFET gate charging current

2)Limiting the voltage across the external current-

sense resistor.

During the startup period, the gate drive current is typi-cally 100μA and decreases with the increase of the gate voltage (see the Typical Operating Character-istics). This allows the controller to slowly enhance the MOSF ETs. If the fast comparator detects an overcur-rent, the MAX5904–MAX5909 regulate the gate voltage to ensure that the voltage across the sense resistor does not exceed V SU,TH. This effectively regulates the inrush current during startup. Figure 2 shows the start-up waveforms. PGOOD goes high impedance 0.75ms after the startup period if no fault condition is present.

VariableSpeed/BiLevel Fault Protection VariableSpeed/BiLevel fault protection incorporates two comparators with different thresholds and response times to monitor the load current (Figure 9). During the startup period, protection is provided by limiting the load current. Protection is provided in normal operation (after the startup period has expired) by discharging both MOSF ET gates with a strong 3mA pulldown cur-rent in response to a fault condition. After a fault, PGOOD is pulled low, the MAX5905/MAX5907/ MAX5909 stay latched off and the MAX5904/MAX5906/ MAX5908 automatically restart.

MAX5904–MAX5909Sequencers

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M A X 5904–M A X 5909

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Figure 1. MAX5906–MAX5909 Functional Diagram

Slow-Comparator Startup Period

The slow comparator is disabled during the startup period while the external MOSF ETs are turning on.Disabling the slow comparator allows the device to ignore the higher-than-normal inrush current charging the board capacitors when a card is first plugged into a live backplane.

Slow-Comparator Normal Operation

After the startup period is complete the slow compara-tor is enabled and the device enters normal operation.The comparator threshold voltage (V SC,TH)is fixed at 25mV for the MAX5904/MAX5905 and is adjustable from 25mV to 100mV for the MAX5906–MAX5909. The slow-comparator response time decreases to a mini-mum of 110μs with a large overdrive voltage (Figure 9).Response time is 3ms for a 1mV overdrive. The variable speed response time allows the MAX5904–MAX5909 to ignore low-amplitude momentary glitches, thus increas-ing system noise immunity. After an extended overcur-rent condition, a fault is generated, PGOOD is pulled low, and the MOSF ET gates are discharged with a strong 3mA pulldown current.

Fast-Comparator Startup Period

During the startup period the fast comparator regulates the gate voltage to ensure that the voltage across the sense resistor does not exceed V SU,TH . The startup

fast-comparator threshold voltage (V SU,TH ) is scaled to two times the slow-comparator threshold (V SC,TH ).Fast-Comparator Normal Operation

In normal operation, if the load current reaches the fast-comparator threshold, a fault is generated, PGOOD is pulled low, and the MOSFET gates are discharged with a strong 3mA pulldown current. This happens in the event of a serious current overload or a dead short. The fast-comparator threshold voltage (V FC,TH ) is scaled to four times the slow-comparator threshold (V SC,TH ). This comparator has a fast response time of 260ns (Figure 9).

Undervoltage Lockout (UVLO)

The undervoltage lockout prevents the MAX5904–MAX5909 from turning on the external MOSF ETs until one input voltage exceeds the UVLO threshold (2.4V)for t D,UVLO . The MAX5904–MAX5909 use power from the higher input voltage rail for the charge pumps. This allows for more efficient charge-pump operation. The UVLO protects the external MOSF ETs from an insuffi-cient gate drive voltage. t D,UVLO ensures that the board is fully inserted into the backplane and that the input voltages are stable. Any input voltage transient on both supplies below the UVLO threshold will reinitiate the t D,UVLO and the startup period.

Latched and Autoretry Fault Management

The MAX5905/MAX5907/MAX5909 latch the external MOSF ETs off when a fault is detected. Toggling ON below 0.4V or one of the supply voltages below the UVLO threshold for at least 100μs clears the fault latch and reinitiates the startup period. Similarly, the MAX5904/MAX5906/MAX5908 turn the external MOSFETs off when a fault is detected then automatical-ly restart after the autoretry delay that is internally set to 64 times t START . During the autoretry delay, toggling ON below 0.4V does not clear the fault. The autoretry can be overridden causing the startup period to begin immediately by toggling one of the supply voltages below the UVLO threshold.

MAX5904–MAX5909

Sequencers

______________________________________________________________________________________11

Figure 2. Startup Waveforms

M A X 5904–M A X 5909

Sequencers 12______________________________________________________________________________________

Figure 3. Power-Up with ON Pin Control (At Least One V IN_is > V UVLO )

Timing Diagrams

MAX5904–MAX5909

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Figure 4. Power-Down when an Overcurrent Fault Occurs

Figure 5. Power-Down when a Short-Circuit Fault Occurs

Timing Diagrams (continued)

M A X 5904–M A X 5909

Sequencers 14______________________________________________________________________________________

Figure 6. Power-Down when an Undervoltage/Overvoltage Fault Occurs (MAX5906/MAX5907)

Figure 7. Fault Report when an Undervoltage/Overvoltage Fault Occurs (MAX5908/MAX5909)

Timing Diagrams (continued)

MAX5904–MAX5909

Sequencers

______________________________________________________________________________________15

Figure 8. Power-Up with Undervoltage Lockout Delay (V ON = 2.7V, the Other V IN_is Below V UVLO )

Timing Diagrams (continued)

M A X 5904–M A X 5909

Output Voltage Monitor

The MAX5905–MAX5909 monitor the output voltages with the MON1 and MON2 window comparator inputs.These voltage monitors are enabled after the startup period. Once enabled, the voltage monitor detects a fault if V MON _ is less than 543mV or greater than 687mV. If an output voltage fault is detected PGOOD pulls low. When the MAX5906/MAX5907 detect an out-put voltage fault on either MON1 or MON2, the fault is latched and both external MOSF ET gates are dis-charged at 3mA. When the MAX5908/MAX5909 detect an output voltage fault the external MOSFET gates are not affected. The MAX5908/MAX5909 PGOOD goes high impedance when the output voltage fault is removed. The voltage monitors do not react to output glitches of less than 20μs. A capacitor from MON_ to GND increases the effective glitch filter time. Connect MON1 to IN1 and MON2 to IN2 to disable the output voltage monitors.

Status Output (PGOOD)

The status output is an open-drain output that pulls low in response to one of the following conditions:? Forced off (ON < 0.8V)

? Overcurrent fault ? Output voltage fault

PGOOD goes high impedance 0.75ms after the device enters normal operation and no faults are present (Table 1).

Applications Information

Component Selection

n-Channel MOSFET

Select the external MOSFETs according to the applica-tion’s current levels. Table 2 lists some recommended components. The MOSF ET’s on-resistance (R DS(ON))

should be chosen low enough to have a minimum volt-age drop at full load to limit the MOSFET power dissipa-tion. High R DS(ON)causes output ripple if there is a pulsating load. Determine the device power rating to accommodate a short-circuit condition on the board at startup and when the device is in automatic-retry mode (see the MOSFET Thermal Considerations section).

Using the MAX5905/MAX5907/MAX5909 in latched mode allows the use of MOSFETs with lower power rat-ings. A MOSFET typically withstands single-shot pulses with higher dissipation than the specified package rat-ing. Table 3 lists some recommended manufacturers and components.

Sense Resistor

The slow-comparator threshold voltage is set at 25mV for the MAX5904/MAX5905 and is adjustable from 25mV to 100mV for the MAX5906–MAX5909. Select a sense resistor that causes a drop equal to the slow-comparator threshold voltage at a current level above the maximum normal operating current. Typically, set the overload current at 1.2 to 1.5 times the nominal load current. The fast-comparator threshold is four times the slow-comparator threshold in normal operating mode.Choose the sense resistor power rating to be greater than (I OVERLOAD )2x V SC,TH .

Slow-Comparator Threshold, R LIM

The slow-comparator threshold voltage of the MAX5904/MAX5905 is fixed at 25mV and adjustable from 25mV to 100mV for the MAX5906–MAX5909.

The adjustable slow-comparator threshold of the MAX5906–MAX5909 allows designers to fine-tune the current-limit threshold for use with standard value sense resistors. Low slow-comparator thresholds allow for increased efficiency by reducing the power dissipat-ed by the sense resistor. F urthermore, the low 25mV

Sequencers

slow-comparator threshold is beneficial when operating with supply rails down to 1V because it allows a small percentage of the overall output voltage to be used for current sensing. The VariableSpeed/BiLevel fault pro-tection feature offers inherent system immunity against load transients and noise. This allows the slow-com-parator threshold to be set close to the maximum nor-mal operating level without experiencing nuisance faults. Typically, set the overload current at 1.2 to 1.5 times the nominal load current. To adjust the slow-com-parator threshold calculate R LIM as follows:

where V TH is the desired slow-comparator threshold voltage.

Setting the Startup Period, R TIM The startup period (t START) of the MAX5904/MAX5905 is fixed at 9ms, and adjustable from 0.4ms to 50ms for the MAX5906–MAX5909. The adjustable startup period of the MAX5906–MAX5909 systems can be customized for MOSF ET gate capacitance and board capacitance (C BOARD). The startup period is adjusted with the resis-tance connected from TIM to GND (R TIM). R TIM must be between 4k?and 500k?. The MAX5906–MAX5909 start-up period has a default value of 9ms when TIM is left floating. Calculate R TIM with the following equation:

where t START is the desired startup period.

There are two ways of completing the startup sequence. Case A describes a startup sequence that slowly turns on the MOSF ETs by limiting the gate charge. Case B uses the current-limiting feature and turns on the MOSF ETs as fast as possible while still preventing a high inrush current. The output voltage ramp-up time (t ON) is determined by the longer of the two timings, case A and case B. Set the MAX5906–MAX5909 startup timer t START to be longer than t ON to guarantee enough time for the output voltage to settle.

Case A: Slow Turn-On (Without Current Limit) There are two ways to turn on the MOSF ETs without reaching the fast-comparator current limit:

If the board capacitance (C BOARD) is small, the inrush current is low.

If the gate capacitance is high, the MOSF ETs turn on slowly.

In both cases, the turn-on time is determined only by the charge required to enhance the MOSF ET. The small gate-charging current of 100μA effectively limits the out-put voltage dV/dt. Connecting an external capacitor between GATE and GND extends turn-on time. The time required to charge/discharge a MOSFET is as follows:

where:

C GATE is the external gate to ground capacitance (Figure 4)

?V GATE

is the change in gate voltage

MAX5904–MAX5909Sequencers

M A X 5904–M A X 5909

Q GATE is the MOSFET total gate charge I GATE is the gate charging/discharging current

In this case, the inrush current depends on the MOSFET gate-to-drain capacitance (C rss ) plus any additional capacitance from gate to GND (C GATE ), and on any load current (I LOAD ) present during the startup period.

Example: Charging and discharging times using the Fairchild FDB7030L MOSFET

If V IN1= 5V then GATE1 charges up to 10.4V (V IN1+V DRIVE ), therefore ?V GATE = 10.4V. The manufacturer’s data sheet specifies that the F DB7030L has approxi-mately 60nC of gate charge and C rss = 600pF. The MAX5904–MAX5909 have a 100μA gate-charging cur-rent and a 100μA weak discharging current or 3mA strong discharging current.

C BOAR

D = 6μF and the load does not draw any current during the startup period.

With no gate capacitor the inrush current, charge, and discharge times are:

With a 22nF gate capacitor the inrush current, charge,and discharge times are:Case B: Fast Turn-On (With Current Limit)

In applications where the board capacitance (C BOARD )is high, the inrush current causes a voltage drop across R SENSE that exceeds the startup fast-comparator threshold. The fast comparator regulates the voltage across the sense resistor to V SU,TH . This effectively regulates the inrush current during startup. In this case,the current charging C BOARD can be considered con-stant and the turn-on time is:

The maximum inrush current in this case is:

F igures 2–8 show the waveforms and timing diagrams

for a startup transient with current regulation. (See the Typical Operating Characteristics.) When operating under this condition, an external gate capacitor is not required.

ON Comparator

The ON comparator controls the on/off function of the MAX5904–MAX5909. ON is the input to a precision three-level voltage comparator that allows individual control over channel 1 and channel 2. Drive ON high (> 2.025V) to enable channel 1 and channel 2. Pull ON low (<0.4V) to disable both channels. To enable chan-nel 1 only, V ON must be between the channel 1 ON threshold (0.825V) and the channel 2 ON threshold (2.025V). The device can be turned off slowly, reducing inductive kickback, by forcing ON between 0.4V and 0.825V until the gates are discharged. The ON com-parator is ideal for power sequencing (Figure 11).

Note that a minimum RC time delay of 20μs is applied to the steeply rising voltage at IN_ before the input volt-age reaches the ON_ terminal. This allows internal cir-cuits to stabilize prior to the signal arriving at the ON_terminal.

Uncommitted Comparator

The MAX5906–MAX5909 feature an uncommitted com-parator that increases system flexibility. This compara-tor can be used for voltage monitoring, or for generating a power-on reset signal for on-card micro-processors (Figure 12).

The uncommitted comparator output (OUTC) is open drain and is pulled low when the comparator input volt-age (V INC+

) is below its threshold voltage (1.236V).

Sequencers 18______________________________________________________________________________________

OUTC is high impedance when V INC+is greater than 1.236V.

Using the MAX5904–MAX5909 on the

Backplane

Using the MAX5904–MAX5909 on the backplane allows multiple cards with different input capacitance to be inserted into the same slot even if the card does not

have on-board hot-swap protection. The startup period can be triggered if IN is connected to ON through a trace on the card (Figure 13).

Input Transients

The voltage at IN1 or IN2 must be above the UVLO dur-ing inrush and fault conditions. When a short-circuit condition occurs on the board, the fast comparator trips causing the external MOSF ET gates to be dis-charged at 3mA. The main system power supply must be able to sustain a temporary fault current, without dropping below the UVLO threshold of 2.4V, until the external MOSFET is completely off. If the main system power supply collapses below UVLO, the MAX5904–MAX5909 will force the device to restart once the supply has recovered. The MOSFET is turned off in a very short time resulting in a high di/dt. The backplane delivering the power to the external card must have low inductance to minimize voltage tran-sients caused by this high di/dt.

MOSFET Thermal Considerations

During normal operation, the external MOSF ETs dissi-pate little power. The MOSFET R DS(ON)is low when the MOSF ET is fully enhanced. The power dissipated in normal operation is P D = I LOAD 2x R DS(ON). The most power dissipation occurs during the turn-on and turn-off transients when the MOSF ETs are in their linear regions. Take into consideration the worst-case sce-nario of a continuous short-circuit fault, consider these two cases:

1)The single turn-on with the device latched after a fault (MAX5905/MAX5907/MAX5909)

2)The continuous automatic retry after a fault (MAX5904/MAX5906/MAX5908)

MOSF ET manufacturers typically include the package thermal resistance from junction to ambient (R θJA ) and thermal resistance from junction to case (R θJC ) which determine the startup time and the retry duty cycle (d =t START / t RETRY ). Calculate the required transient ther-mal resistance with the following equation:

where I START = V SU,TH / R SENSE

Layout Considerations

To take full tracking advantage of the switch response time to an output fault condition, it is important to keep all traces as short as possible and to maximize the high-current trace dimensions to reduce the effect of

undesirable parasitic inductance. Place the MAX5904–

MAX5904–MAX5909

Sequencers

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Figure 9. VariableSpeed/BiLevel Response

Figure 10. Operating with an External Gate Capacitor

M A X 5904–M A X 5909

MAX5909 close to the card’s connector. Use a ground

plane to minimize impedance and inductance. Minimize the current-sense resistor trace length (<10mm), and ensure accurate current sensing with Kelvin connec-tions (Figure 14).

When the output is short circuited, the voltage drop across the external MOSF ET becomes large. Hence,the power dissipation across the switch increases, as does the die temperature. An efficient way to achieve

good power dissipation on a surface-mount package is to lay out two copper pads directly under the MOSFET package on both sides of the board. Connect the two pads to the ground plane through vias, and use enlarged copper mounting pads on the top side of the board. See MAX5908 EV Kit.

Sequencers 20

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Figure 11. Power Sequencing: Channel 2 Turns On t DELAY After Channel 1