IRL1404PBF中文资料
IRL1404PbF
HEXFET ? Power MOSFET
Seventh Generation HEXFET ? power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to
its wide acceptance throughout the industry.
Parameter
Max.
Units
I D @ T C = 25°C Continuous Drain Current, V GS @ 10V 160 I D @ T C = 100°C Continuous Drain Current, V GS @ 10V 110 A I DM
Pulsed Drain Current 640P
D @T C = 25°C Power Dissipation 200W Linear Derating Factor 1.3W/°C V GS Gate-to-Source Voltage
± 20V E AS Single Pulse Avalanche Energy 620mJ I AR Avalanche Current
95A E AR Repetitive Avalanche Energy 20mJ dv/dt Peak Diode Recovery dv/dt 5.0
V/ns T J Operating Junction and
-55 to + 175T STG
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case)°C
Mounting torque, 6-32 or M3 srew
10 lbf?in (1.1N?m)
Absolute Maximum Ratings
Thermal Resistance
l Advanced Process Technology l Ultra Low On-Resistance l Dynamic dv/dt Rating
l 175°C Operating Temperature l Fast Switching
l Fully Avalanche Rated l
Lead-Free
Description
07/20/04
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Parameter
Typ.
Max.
Units
R θJC Junction-to-Case
–––0.75R θCS Case-to-Sink, Flat, Greased Surface 0.50–––°C/W
R θJA
Junction-to-Ambient (PCB Mounted)
–––
62
TO-220AB
PD - 95588
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Electrical Characteristics @ T J = 25°C (unless otherwise specified)
Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11). Starting T J = 25°C, L = 0.35mH
R G = 25?, I AS = 95A. (See Figure 12). I SD ≤ 95A, di/dt ≤ 160A/μs, V DD ≤ V (BR)DSS , T J ≤ 175°C.
Pulse width ≤ 300μs; duty cycle ≤ 2%.
Notes:
C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS.
Calculated continuous current based on maximum allowable junction temperature; for recommended current-handing of the package refer to Design Tip # 93-4.
Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A.
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Vs. Temperature
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Gate-to-Source Voltage
Drain-to-Source Voltage Forward Voltage
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Case Temperature
V V d(on)
r
d(off)
f
V DD
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V
DS
Current Sampling Resistors
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
I V DD
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Peak Diode Recovery dv/dt Test Circuit
V DD
* Reverse Polarity of D.U.T for P-Channel
V GS
*** V GS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For N-channel HEXFET ? power MOSFETs
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233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
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TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
Note: For the most current drawings please refer to the IR website at:
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