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DATA SHEET

PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS

PM5347

S/UNI-

155-PLUS

SATURN USER NETWORK INTERFACE (155.52 MBIT/S & 51.84 MBIT/S, "PLUS")

DATA SHEET

ISSUE 6: JUNE 1998

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS

PUBLIC REVISION HISTORY

Issue No.Issue Date Details of Change

6June, 1998Data Sheet Reformatted — No Change in

T echnical Content.

Generated R6 data sheet from PMC-

940306, P8

Revision to Eng Doc P7

5Sept 24,

1996

Revision to Eng Doc P5

4Sept 29,

1995

3June 1995

2Nov. 1994

1April, 1994Creation of Document

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS CONTENTS

1FEA TURES (1)

2APPLICA TIONS (1)

3REFERENCES (1)

4APPLICA TION EXAMPLES (1)

5BLOCK DIAGRAM (1)

6DESCRIPTION (1)

7PIN DIAGRAM (1)

8PIN DESCRIPTION (1)

9FUNCTIONAL DESCRIPTION (1)

9.1CLOCK RECOVERY (1)

9.2SERIAL TO P ARALLEL CONVERTER (1)

9.3RECEIVE SECTION OVERHEAD PROCESSOR (1)

9.4RECEIVE LINE OVERHEAD PROCESSOR (1)

9.5TRANSPORT OVERHEAD EXTRACT PORT (1)

9.6RECEIVE P A TH OVERHEAD PROCESSOR (1)

9.7P A TH OVERHEAD EXTRACT (1)

9.8RECEIVE A TM CELL PROCESSOR (1)

9.9CLOCK SYNTHESIS (1)

9.10P ARALLEL TO SERIAL CONVERTER (1)

9.11TRANSMIT SECTION OVERHEAD PROCESSOR (1)

9.12TRANSMIT LINE OVERHEAD PROCESSOR (1)

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS

9.13TRANSPORT OVERHEAD INSERT PORT (1)

9.14TRANSMIT P A TH OVERHEAD PROCESSOR (1)

9.15P A TH OVERHEAD INSERT (1)

9.16TRANSMIT A TM CELL PROCESSOR (1)

9.17SONET/SDH SECTION AND P A TH TRACE BUFFERS (1)

9.17.1RECEIVE TRACE BUFFER (RTB) (1)

9.17.2TRANSMIT TRACE BUFFER (TTB) (1)

9.18DROP SIDE INTERFACE (1)

9.18.1RECEIVE INTERFACE (1)

9.18.2TRANSMIT INTERFACE (1)

9.19P ARALLEL I/O PORT (1)

9.20JT AG TEST ACCESS PORT (1)

9.21MICROPROCESSOR INTERFACE (1)

9.22REGISTER MEMORY MAP (1)

10NORMAL MODE REGISTER DESCRIPTION (1)

11TEST FEA TURES DESCRIPTION (1)

11.1TEST MODE REGISTER MEMORY MAP (1)

11.2TEST MODE 0 DET AILS (1)

11.3JT AG TEST PORT (1)

12OPERA TION (1)

12.1BOARD DESIGN RECOMMENDA TIONS (1)

12.2INTERFACING TO ECL OR PECL DEVICES (1)

12.3DRIVING DIFFERENTIAL INPUTS SINGLE ENDED (1)

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS

12.4CLOCK RECOVERY (1)

12.5A TM MAPPING AND OVERHEAD BYTE USAGE (1)

12.6CELL DA T A STRUCTURE (1)

12.7BIT ERROR RA TE MONITOR (1)

12.8JT AG SUPPORT (1)

13FUNCTIONAL TIMING (1)

13.1OVERHEAD ACCESS (1)

13.2GFC ACCESS (1)

13.3DROP SIDE RECEIVE INTERFACE (1)

13.4DROP SIDE TRANSMIT INTERFACE (1)

14ABSOLUTE MAXIMUM RA TINGS (1)

15 D.C. CHARACTERISTICS (1)

16MICROPROCESSOR INTERFACE TIMING CHARACTERISTICS (1)

17S/UNI-PLUS TIMING CHARACTERISTICS (1)

18ORDERING AND THERMAL INFORMA TION (1)

19MECHANICAL INFORMA TION (1)

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS LIST OF REGISTERS

REGISTER 0X05: S/UNI-PLUS CLOCK SYNTHESIS CONTROL AND ST A TUS1 REGISTER 0X06: S/UNI-PLUS CLOCK RECOVERY CONTROL AND ST A TUS1 REGISTER 0X07: S/UNI-PLUS P ARALLEL I/O PORT (1)

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS REGISTER 0X14: TSOP CONTROL (1)

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS REGISTER 0X35: RPOP POINTER LSB (1)

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS REGISTER 0X51: RACP INTERRUPT ST A TUS (1)

P A TTERN (1)

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS REGISTER 0X6A: SPTB INDIRECT ADDRESS REGISTER (1)

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS LIST OF FIGURES

FIGURE 1- TYPICAL STS-3C A TM SWITCH PORT INTERFACE (1)

FIGURE 2- APPLICA TION WITH CLOCK RECOVERY & CLOCK SYNTHESIS

BYP ASSED (1)

FIGURE 3- STS-3C/STM-1 AND STS-1 JITTER TOLERANCE (1)

FIGURE 4- POINTER INTERPRET A TION ST A TE DIAGRAM (1)

FIGURE 5- CELL DELINEA TION ST A TE DIAGRAM (1)

FIGURE 6- HCS VERIFICA TION ST A TE DIAGRAM (1)

FIGURE 7- STS-3C DEFAUL T TRANSPORT OVERHEAD VALUES (1)

FIGURE 8- STS-1 DEFAUL T TRANSPORT OVERHEAD VALUES (1)

FIGURE 9- DEFAUL T P A TH OVERHEAD VALUES (1)

FIGURE 10- INTERFACING S/UNI-PLUS TO ECL OR PECL (1)

FIGURE 11- SINGLE ENDED DRIVING DIFFERENTIAL INPUTS (1)

FIGURE 12- (1)

FIGURE 13- STS-1 MAPPING (1)

FIGURE 14- STS-3C (STM-1) MAPPING (1)

FIGURE 15- 16-BIT WIDE, 27 WORD STRUCTURE (1)

FIGURE 16- 8-BIT WIDE, 53 WORD STRUCTURE (1)

FIGURE 17- BOUNDARY SCAN ARCHITECTURE (1)

FIGURE 18- T AP CONTROLLER FINITE ST A TE MACHINE (1)

FIGURE 19- INPUT OBSERVA TION CELL (IN_CELL) (1)

FIGURE 20- OUTPUT CELL (OUT_CELL) (1)

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS FIGURE 21- BIDIRECTIONAL CELL (IO_CELL) (1)

FIGURE 22- TRANSPORT OVERHEAD EXTRACTION (1)

FIGURE 23- TRANSPORT OVERHEAD ORDERWIRE AND USER CHANNEL

EXTRACTION (1)

FIGURE 24- TRANSPORT OVERHEAD DA T A LINK CLOCK AND DA T A

EXTRACTION (1)

FIGURE 25- P A TH OVERHEAD EXTRACTION (1)

FIGURE 26- TRANSPORT OVERHEAD INSERTION (1)

FIGURE 27- TRANSPORT OVERHEAD ORDERWIRE AND USER CHANNEL

INSERTION (1)

FIGURE 28- TRANSPORT OVERHEAD DA T A LINK CLOCK AND DA T A

INSERTION (1)

FIGURE 29- P A TH OVERHEAD INSERTION (1)

FIGURE 30- GFC EXTRACTION PORT (1)

FIGURE 31- GFC INSERTION PORT (1)

FIGURE 32- RECEIVE SYNCHRONOUS FIFO, TSEN=0 (1)

FIGURE 33- RECEIVE SYNCHRONOUS FIFO, TSEN=1 (1)

FIGURE 34- TRANSMIT SYNCHRONOUS FIFO (1)

FIGURE 35- MICROPROCESSOR INTERFACE READ TIMING (1)

FIGURE 36- MICROPROCESSOR INTERFACE WRITE TIMING (1)

FIGURE 37- LINE SIDE RECEIVE INTERFACE TIMING (1)

FIGURE 38- RECEIVE ALARM OUTPUT TIMING (1)

FIGURE 39- RECEIVE OVERHEAD ACCESS TIMING (1)

FIGURE 40- RECEIVE GFC ACCESS TIMING (1)

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS FIGURE 41- LINE SIDE TRANSMIT INTERFACE TIMING (1)

FIGURE 42- TRANSMIT ALARM INPUT TIMING (1)

FIGURE 43- TRANSMIT OVERHEAD ACCESS TIMING (1)

FIGURE 44- TRANSMIT GFC ACCESS TIMING (1)

FIGURE 45- DROP SIDE RECEIVE INTERFACE TIMING, TSEN = 0 (1)

FIGURE 46- DROP SIDE RECEIVE INTERFACE TIMING, TSEN = 1 (1)

FIGURE 47- DROP SIDE TRANSMIT INTERFACE (1)

FIGURE 48- JT AG PORT INTERFACE TIMING (1)

FIGURE 49- 208 PIN PLASTIC QUAD FLA T P ACK (R SUFFIX): (1)

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS LIST OF TABLES

T ABLE 1- (1)

T ABLE 2- (1)

T ABLE 3- (1)

T ABLE 5- (1)

T ABLE 6- (1)

T ABLE 7- (1)

T ABLE 8- (1)

T ABLE 9- (1)

T ABLE 10- INSTRUCTION REGISTER (1)

T ABLE 11- (1)

T ABLE 12- S/UNI-PLUS ABSOLUTE MAXIMUM RA TINGS (1)

T ABLE 13- S/UNI-PLUS D.C. CHARACTERISTICS (1)

T ABLE 14- MICROPROCESSOR INTERFACE READ ACCESS (FIGURE 35).

(1)

T ABLE 15- MICROPROCESSOR INTERFACE WRITE ACCESS (FIGURE 36) (1)

T ABLE 16- LINE SIDE RECEIVE INTERFACE (FIGURE 37) (1)

T ABLE 17- RECEIVE ALARM OUTPUT (FIGURE 38) (1)

T ABLE 18- RECEIVE OVERHEAD ACCESS (FIGURE 39) (1)

T ABLE 19- RECEIVE GFC ACCESS (FIGURE 40) (1)

T ABLE 20- LINE SIDE TRANSMIT INTERFACE (FIGURE 41) (1)

T ABLE 21- TRANSMIT ALARM INPUT (FIGURE 42) (1)

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS T ABLE 22- TRANSMIT OVERHEAD ACCESS (FIGURE 43) (1)

T ABLE 23- TRANSMIT GFC ACCESS (FIGURE 44) (1)

T ABLE 24- DROP SIDE RECEIVE INTERFACE (FIGURE 45, FIGURE 46) (1)

T ABLE 25- DROP SIDE TRANSMIT INTERFACE (FIGURE 47) (1)

T ABLE 26- JT AG PORT INTERFACE (FIGURE 48) (1)

T ABLE 27- S/UNI-PLUS ORDERING INFORMA TION (1)

T ABLE 28- S/UNI-PLUS THERMAL INFORMA TION (1)

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS 1FEATURES

?Monolithic Saturn User Network Interface that implements the A TM physical layer for Broadband ISDN according to ANSI, ITU, and A TM Forum

specifications.

?Processes duplex 155.52 Mbit/s STS-3c/STM-1 or 51.84 Mbit/s STS-1 data streams with on-chip clock and data recovery and clock synthesis.

?Provides Saturn Compliant Interface - PHYsical layer (SCI-PHY?) FIFO buffers in both transmit and receive paths with parity support.

?Provides a generic 8-bit microprocessor bus interface for configuration, control, and status monitoring.

?Provides a standard 5 signal IEEE 1149.1 JT AG test port for boundary scan board test purposes.

?Low power, +5 Volt, CMOS technology.

?208 pin high performance plastic quad flat pack (PQFP) 28 mm x 28 mm package.

?Industrial temperature range operation (-40°C to +85°C).

The receiver section:

?Provides a serial interface at 155.52 or 51.84 Mbit/s.

?Recovers the clock and data.

?Frames to and descrambles the recovered stream.

?Filters and captures the automatic protection switch channel (K1, K2) bytes in readable registers and detects APS byte failure.

?Captures the synchronization status (S1) byte in a readable register.

?Interprets the received payload pointer (H1, H2) and extracts the STS-3c/1 (STM-1) synchronous payload envelope and path overhead.

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS ?Extracts A TM cells from the received STS-3c/1 (STM-1) synchronous payload envelope using A TM cell delineation and provides optional A TM cell payload

descrambling, header check sequence (HCS) error detection and correction,

and idle/unassigned cell filtering.

?Provides a generic 16 bit or 8 bit wide datapath interface to read extracted cells from an internal four cell FIFO buffer.

?Extracts all transport overhead bytes and serializes them at 5.184 Mbit/s for optional external processing.

?Extracts the section user channel (F1) and the orderwire channels (E1, E2) and serializes them into three independent 64 kbit/s streams for optional

external processing.

?Extracts the data communication channels (D1-D3, D4-D12) and serializes them at 192 kbit/s (D1-D3) and 576 kbit/s (D4-D12) for optional external

processing.

?Extracts all path overhead bytes and serializes them at 576 kbit/s for optional external processing.

?Extracts the 16 or 64 byte section trace (J0) sequence and the 16 or 64 byte path trace (J1) sequence into internal register banks.

?Detects loss of signal (LOS), out of frame (OOF), loss of frame (LOF), line alarm indication signal (LAIS), line remote defect indication (LRDI), loss of

pointer (LOP), path alarm indication signal (P AIS), path remote defect

indication signal (PRDI) and loss of cell delineation (LCD).

?Counts received section BIP-8 (B1) errors, received line BIP-24/8 (B2) errors, line far end block errors (M0 or M1), received path BIP-8 (B3) errors and path

far end block errors (G1) for performance monitoring purposes.

?Counts received cells written into the receive FIFO, received HCS errored cells that are discarded, and received HCS errored cells that are corrected

and passed through the receive FIFO.

?Extracts and serializes the GFC field from all received cells (including idle/unassigned cells) for external processing.

DATA SHEET

PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS The transmitter section:

?Provides an internal four cell FIFO into which cells are written using a generic 16-bit or 8-bit wide datapath interface.

?Inserts the generic flow control (GFC) bits via a simple serial interface and provides a transmit XOFF function to allow for local flow control.

?Counts transmit cells read from the transmit FIFO.

?Provides idle/unassigned cell insertion, HCS generation/insertion, and A TM cell payload scrambling.

?Inserts A TM cells into the transmitted STS-3c/1 (STM-1) synchronous payload envelope.

?Inserts a register programmable path signal label (C2).

?Generates the transmit payload pointer (H1, H2) and inserts the path overhead.

?Optionally inserts the 16 or 64 byte section trace (J0) sequence and the 16 or

64 byte path trace (J1) sequence from internal register banks.

?Optionally inserts externally generated path overhead bytes received via a 576 kbit/s serial interface.

?Optionally inserts externally generated data communication channels (D1-D3, D4-D12) via a 192 kbit/s (D1-D3) serial stream and a 576 kbit/s (D4-D12)

serial stream.

?Optionally inserts externally generated section user channel (F1) and externally generated orderwire channels (E1, E2) via three 64 kbit/s serial

interfaces.

?Optionally inserts externally generated transport overhead bytes received via

a 5.184 Mbit/s serial interface.

?Scrambles the transmitted STS-3c/1 (STM-1) stream and inserts the framing bytes (A1, A2).

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PMC-941033ISSUE 6SATURN USER NETWORK INTERFACE PLUS ?Synthesizes the 155.52 MHz or 51.84 MHz transmit clock from a 19.44 MHz or 6.48 MHz reference.

?Provides a serial interface at 155.52 Mbit/s or 51.84 Mbit/s.

?Optionally inserts path alarm indication signal (P AIS), path remote defect indication (PRDI), line alarm indication signal (LAIS) and line remote defect

indication (LRDI) indication.

?Optionally inserts register programmable APS (K1, K2) and synchronization status (S1) bytes.

?Inserts path BIP-8 codes (B3), path far end block error (G1) indications, line BIP-24/8 codes (B2), line far end block error (M0 or M1) indications, section

BIP-8 codes (B1) to allow performance monitoring at the far end.

?Allows forced insertion of all zeros data (after scrambling), the corruption of the framing bytes or the corruption of the section, line, or path BIP-8 codes for

diagnostic purposes.