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OV9710 Camera Module Hardware Application Notes1.0 Sida

OV9710 Camera Module Hardware Application Notes

Last Modified: May 25th , 2009

Document Revision: 1.0

OmniVision Technologies, Inc. reserves the right to make changes without further notice to any product herein to improve reliability, function or design. OmniVision does not assume any liability arising out of the application or use of any project, circuit described herein; neither does it convey any license under its patent nor the right of others.

Sensor datasheet is the official document of OmniVision. Software/hardware/dual camera applicaton notes are application guide lines for reference. If there are any difference between sensor datasheet and application notes, please follow sensor datasheet and kindly report the difference to OVT FAE.

This document contains information of a proprietary nature. None of this information shall be divulged to persons other than OmniVision Technologies, Inc. employee authorized by the nature of their duties to receive such information, or individuals or organizations authorized by OmniVision Technologies, Inc.O V

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Table of Contents

1. OV9710 Camera Module Reference Design....................................................................................32. OV9710 Camera Interface Reference...............................................................................................42.1 Pin Definition.............................................................................................................................42.2 Power Supply.............................................................................................................................43. OV9710 Camera Operation..............................................................................................................63.1 Power Saving Modes.................................................................................................................63.2 Camera Operation in Power Down Mode..................................................................................63.2.1 Battery On, Hardware Reset..............................................................................................63.2.2 Battery On, Software Reset................................................................................................73.2.3 Wake up From Power Down..............................................................................................83.3 Camera Operation in Power Off Mode......................................................................................93.3.1 Battery On..........................................................................................................................93.3.2 Camera On, Hardware Reset..............................................................................................93.3.3 Camera On, Software Reset.............................................................................................103.3.4 Camera Off.......................................................................................................................114. SCCB Bus sharing..........................................................................................................................115. Timing Considerations for Phone PCB Design..............................................................................125.1 Sample with PCLK..................................................................................................................125.2 Sample with XCLK.................................................................................................................135.3 Using EMI/ESD Device...........................................................................................................136. Hardware Check List......................................................................................................................146.1 Check Hardware Design..........................................................................................................146.1.1 Module Function..............................................................................................................146.1.2 Check Camera Interface of Phone....................................................................................146.2 Check if Camera Module is Working......................................................................................146.3 Check SCCB............................................................................................................................156.4 Check Camera Interface...........................................................................................................156.5 Some Typical Issues................................................................................................................166.6 Image Direction.......................................................................................................................176.6.1 Sensor 16:9, LCD 9:16.....................................................................................................176.6.2 Sensor 9:16, LCD 9:16.....................................................................................................176.7 Check Color.............................................................................................................................176.8 Check Image Center.. (18)

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1. OV9710 Camera Module Reference Design

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2. OV9710 Camera Interface Reference

2.1 Pin Definition

The video port of OV9710 has 10-bit, D[9:0]. For 10-bit RGB raw output, please use D[9:0]. For 8-bit RGB raw, please use D[9:2].

The Href and Hsyn signal is on the same pin – Href. The function of this pin could be either Href or Hsync selected by SCCB setting.

The SIO_C and SIO_D bus should have external pull up resistors, the typical value of the pull up resistors is 4.7K ~ 5.1K. If no pull-up resistor is installed, the SCCB bus may not work correctly. Reset# is active low. It can be controlled by a GPIO, or connected to DOVDD if not used. If Reset# is connected to DOVDD, the OV9710 camera module could be reset by SCCB reset.

2.2 Power Supply

If DOVDD uses different power supply than AVDD, then 3 regulators should be used.

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If DOVDD uses the same voltage as AVDD, then only 2 regulators are required. R/C filter is used to separate AVDD from DOVDD.

Please note that:

a. The AGND and DGND should be separate inside module, and connected together on phone PCB very close to camera module connector.

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3. OV9710 Camera Operation

3.1 Power Saving Modes

There are 2 types of power saving modes: power down mode and power off mode.

Power down mode means that in power saving mode, all the power supplies to camera module are kept. The cameras is set into power down mode by pull high PWDN.

Power off mode means that in power saving mode, all the power supplies to camera module are cut.

3.2 Camera Operation in Power Down Mode

3.2.1 Battery On, Hardware Reset

t1: from powers on to Reset# pull high, >= 3ms

t2: from Reset# pull high to SCCB initialization, >= 3ms Step 1:

Reset# is applied to OV9710 camera module.

Step 2:

DOVDD, DVDD and AVDD powers are applied. The 3 powers could be applied simultaneously. Reset#

PDWN

SIO_C SIO_D DOVDD

DVDD

AVDD

XCLK

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If applied separately, the power on sequence should be DOVDD first, DVDD second and AVDD last.

Step 3:

after 3ms of last power applied, pull high Reset#.

Step 4:

After 3ms, initialize OV9710 by SCCB initialization. Please find initialization settings from “OV9710 Camera Module Software Application Notes” or contact OmniVision local FAE.Step 5:

Sensor output image data from DVP port.Step 6:

Pull high PWDN. Set OV9710 to power down mode.Step 7:

Pull XCLK low.

3.2.2 Battery On, Software Reset

t1: from powers on to SCCB software reset, >= 3ms t2: from software reset to SCCB initialization, >= 2ms

Step 1:

DOVDD, DVDD and AVDD powers are applied. The 3 powers could be applied simultaneously. If applied separately, the power on sequence should be DOVDD first, DVDD second and AVDD last.

Step 2:

after 3ms of last power applied, reset OV9710 camera module by SCCB write.

Reset#PDWN SIO_C

SIO_D

DOVDD

DVDD

AVDD

XCLK

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Step 3:

After 2ms, initialize OV9710 by SCCB initialization. Please find initialization settings from “OV9710 Camera Module Software Application Notes” or contact OmniVision local FAE.Step 4:

Sensor output image data from DVP port.

Step 5:

Pull high PWDN. Set OV9710 to power down mode.Step 6:

Pull low XCLK.

After battery on, OV9710 camera should be set to power down mode to minimize power

consumption. The camera should be initialized first, then set to power down mode. If camera is set to power down mode without initialization, in addition to the bigger power consumption, other

issue called “Memory Effect Issue” may also happen. If the power down sequence above is applied, the “Memory Effect Issue” is avoided.

3.2.3 Wake up From Power Down

Step 1:

Apply XCLK

Step 2:

after 10ms, Pull Low PWDN Step 3:

Initialize all registers.

PWDN

SIO_C

SIO_D

XCLK

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3.3 Camera Operation in Power Off Mode

3.3.1 Battery On

No operation. Camera module is power off.

3.3.2 Camera On, Hardware Reset

t1: from powers on to SCCB software reset, >= 3ms t2: from software reset to SCCB initialization, >= 2ms

Step 1:

Reset# is applied to OV9710 Camera Module.

Step 2:

DOVDD, DVDD and AVDD powers are applied. The 3 powers could be applied simultaneously. If applied separately, the power on sequence should be DOVDD first, DVDD second and AVDD last.

Step 3:

after 3ms of last power applied, pull high Reset#.

Step 5:

After 3ms, initialize OV97105 by SCCB initialization. Please find initialization settings from “OV9710 Camera Module Software Application Notes” or contact OmniVision local FAE.

Reset#PDWN

SIO_C

SIO_D DOVDD

DVDD

AVDD

XCLK

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3.3.3 Camera On, Software Reset

t1: from powers on to SCCB software reset, >= 3ms t2: from software reset to SCCB initialization, >= 2ms

Step 1:

DOVDD, DVDD and AVDD powers are applied. The 3 powers could be applied simultaneously. If applied separately, the power on sequence should be DOVDD first, DVDD second and AVDD last.

Step 2:

after 3ms of last power applied, reset OV9710 camera module by SCCB write.

Step 3:

After 2ms, initialize OV9710 by SCCB initialization. Please find initialization settings from “OV9710 Camera Module Software Application Notes” or contact OmniVision local FAE.

Reset#PDWN

SIO_C

SIO_D

DOVDD DVDD

AVDD

XCLK

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3.3.4 Camera Off

Step 1.

Pull low XCLK,

Step 2.

Turn off AVDD, DVDD and DOVDD. The 3 powers could be turned off simultaneously. If turned off separately, AVDD should be turned off first, DVDD second and DOVDD third.Step 3.

Pull Low PWDN and RESET#

4. SCCB Bus sharing

The SCCB bus of OV9710 camera module could share with other SCCB device. When OV9710 is working, the read/write operation is separated by device address. The device address of OV9710 is 0x60. SCCB read/write to address other than the 2 address above will not affect SCCB registers of OV9710.

It is recommended to use power down mode when SCCB bus is shared with other device. When OV9710 camera module is power down, the SCCB Bus is leave free. The power down of OV9710 doesn't affect the read/write of other SCCB device.

It is not recommended to use power off mode when SCCB bus is shared with other device. When OV9710 camera module is power off, all the inputs to OV9710 should be pulled low. The inputs include XCLK, RESET#, PWDN. If any if the input is not pulled low, the input would leak current to DVDD/DOVDD of OV9710, then the SIO_D and SIO_C may be pulled to unknown state and caused SCCB malfunction.

DOVDD DVDD AVDD XCLK Reset

PWDN

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5. Timing Considerations for Phone PCB Design

There are 2 clock signal for OV9710 camera module. One is the main clock (input clock) XCLK, the other is the pixel clock (output clock) PCLK. Some backend/baseband chips may use XCLK as pixel sample clock, some backend/baseband chips may use PCLK as pixel sample clock. It is recommended to use PCLK as pixel sample clock. Let's look at the clock distribution first.

So the delay of video data to clock at backend/baseband side is very critical for timing design. If the delay is over the spec. of backend/baseband chip, the backend/baseband chip can not get video data correctly. The incorrect video data may have wrong color, fixed or moving horizontal lines.

From the clock distribution diagram above, the delays are: Delay_XCLK = 0

Delay_PCLK = PCB_Delay_XCLK + Internal_Delay + PLL_Delay + PCB_Delay_PCLK

Delay_Data = PCB_Delay_XCLK + Internal_Delay + PLL_Delay + PCLK_to_Data_Delay + PCB_Delay_Data

5.1 Sample with PCLK

If Backend/baseband sample video data with PCLK, the clock data delay is clock_data_delay = Delay_Data – Delay_PCLK

= PCLK_to_Data_Delay + PCB_Delay_Data – PCB_Delay_PCLK

The clock data delay is not related with PCB delay of XCLK.

If PCB is carefully designed so that the wire length of PCLK and Data are same, then

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PCB_Delay_Data = PCB_Delay_PCLK, the clock data delay is clock_data_delay = PCLK_to_Data_Delay, not related to PCB layout

5.2 Sample with XCLK

If Backend/baseband sample video data with PCLK, the clock data delay is clock_data_delay = Delay_Data – Delay_XCLK

= PCB_Delay_XCLK + Internal_Delay + PLL_Delay + PCLK_to_Data_Delay + PCB_Delay_Data

The data to clock delay at Baseband/Backend chip are much bigger than sampled with PCLK.

And the delay is highly depend on PCB layout. So if XCLK is used to sample video data, it is very likely to have timing issue which would cause incorrect video data.

5.3 Using EMI/ESD Device

If EMI/ESD device are used in phone design, the PCB delay increase very much. It should be very careful to manipulate the delays to meet timing spec. of backend/baseband chips.

1.Try to use PCLK as sample clock of video data.

2.XCLK and PCLK should not share ESD/EMI device with other signals. Use dedicate ESD/EMI device or R/C filters for XCLK and PCLK. So that the delay on XCLK and PCLK could be adjusted later.

3.For dual camera module, use single ESD/EMI device or single R/C filter for XCLK and PCLK to minimize clock delay.

4.Carefully layout PCB to keep XCLK wire as short as possible, PCLK wire the same length as data lines.

5.Minimize the length of FPC of camera module.

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6. Hardware Check List

6.1 Check Hardware Design 6.1.1 Module Function

Check camera module function with USB 2.0 test board (Module interface board may be needed, please contact with module maker). The module should display image correctly on PC.

Check module schematic design, pin definition match with camera interface of phone. Analog ground and digital ground are separated inside camera module.

6.1.2 Check Camera Interface of Phone

Pin definition matches with camera module design.

AVDD is supplied by separate regulator. DVDD and DOVDD could be supplied by separate regulator or shared regulator with other circuits. The voltage of each power supplied are within sensor specification.

If there is a long flex cable to connect camera module to main board of phone, please make sure the ground of camera module is not shared with other circuits. For flip type phone, share camera ground with LCD module would cause very strong power/ground noise.

6.2 Check if Camera Module is Working

Evidence of camera module working

PCLK running HREF, VSYNC outputs

D[9:0] output Check procedures

a. Voltages of power supplies are within sensor specification

b. input clock is correct

c. all input signals are in correct state

PWDN = Low, Reset = High, SIO_D = H, SIO_C = H

If all the check are passed, the camera module still can not work, please check if the camera module is damaged or contact OmniVision local FAE.

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6.3 Check SCCB

a. Check SCCB connection: Pull up resistors exist. Recommended value is around 4.7K.

b. SCCB write speed should not be too fast for first debug. Recommended not over 100K. The write speed could be increased up to 400K later on.

c. Simple ways to check SCCB

SCCB read could be verified by read register 0x0a, 0x0b (version).

SCCB write could be verified by write register 0x11 and check PCLK frequency.

The PCLK frequency should change with different values are written into register 0x11.d. To make sure SCCB read/write are correct, please use oscilloscope to capture whole waveforms of SCCB initialization.

e. Make sure the SCCB device ID is correct for read/write operation.

SCCB address is 0x60/0x61 for 1.3M and above sensors

f. If SCCB soft reset is used, please wait at least 2~5ms after SCCB soft rest before write other registers. If write other registers immediately after SCCB soft reset, some registers may not be written.

6.4 Check Camera Interface

a. Check polarity of HREF(HSYCN), VSYNC, PCLK, make sure the polarity of camera module matches with backend or baseband side.

b. Check sample clock. Please pay attention to baseband/backend sample with MCLK. In this case, the clock divider inside sensor could not be turned on. Please also pay attention to possible timing issues listed in section 5.

c. check window position.

If camera interface uses HREF, then the window position is defined by sensor.

If camera interface uses HSYNC, then the window position is defined by backend / baseband.

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6.5 Some Typical Issues

Line width to big

In sufficient output lines

Line width to small

Wrong Window Position

Horizontal Sync Issue Vertical Sync Issue Sample Rate

too High

Sample rate too

low

Timing Issue

6.6 Image Direction 6.6.1 Sensor 16:9, LCD 9:16

Full screen display is not full view angle Full view angle display is not full screen

Full view angle Full Screen

Camera module

6.6.2 Sensor 9:16, LCD 9:16

Sensor rotate 90 degree in camera module

Picture scan line direction should be changed by phone (rotate 90 degree by backend or baseband).

Full Screen and Full view angle on LCD

Full view angle & Full Screen

Change scan line direction of camera

6.7 Check Color

9710 's output is RGB Raw , the interpolation is done by backend, if the color is not right, pls check the process of the backend.

a. If there are only red/green color in picture

check if Y and U/V exchanged.b. R/B exchange

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U/V exchange

c. color/brightness not continuous

check connection of d[9:0]

6.8 Check Image Center

place an object in front of camera module, check if the picture is on center of LCD. If not, the output window of camera is not correct.

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