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S71PL032J0ABFW0Z3中文资料

S71PL-J Based MCPs

Stacked Multi-Chip Product (MCP) Flash Memory and

RAM 256M/128/64/32 Megabit (16/8/4/2M x 16-bit) CMOS 3.0

Volt-only Simultaneous Operation Page Mode Flash

Memory and 64/32/16/8/4 Megabit (4M/2M/1M/512K/256K x

16-bit) Static RAM/Pseudo Static RAM

Data Sheet ADVANCE

INFORMATION

Notice to Readers: The Advance Information status indicates that this

document contains information on one or more products under development

at Spansion LLC. The information is intended to help you evaluate this product.

Do not design in this product without contacting the factory. Spansion LLC

reserves the right to change or discontinue work on this proposed product

without notice.

Publication Number S71PL-J_00Revision B Amendment3Issue Date March 17, 2006

A d v a n c e I n f o r m a t i o n

Notice On Data Sheet Designations

Spansion LLC issues data sheets with Advance Information or Preliminary designations to advise

readers of product information or intended specifications throughout the product life cycle, in-

cluding development, qualification, initial production, and full production. In all cases, however,

readers are encouraged to verify that they have the latest information before finalizing their de-

sign. The following descriptions of Spansion data sheet designations are presented here to high-

light their presence and definitions.

Advance Information

The Advance Information designation indicates that Spansion LLC is developing one or more spe-

cific products, but has not committed any design to production. Information presented in a doc-

ument with this designation is likely to change, and in some cases, development on the product

may discontinue. Spansion LLC therefore places the following conditions upon Advance Informa-

tion content:

“This document contains information on one or more products under development at Spansion LLC. The

information is intended to help you evaluate this product. Do not design in this product without con-

tacting the factory. Spansion LLC reserves the right to change or discontinue work on this proposed

product without notice.”

Preliminary

The Preliminary designation indicates that the product development has progressed such that a

commitment to production has taken place. This designation covers several aspects of the prod-

uct life cycle, including product qualification, initial production, and the subsequent phases in the

manufacturing process that occur before full production is achieved. Changes to the technical

specifications presented in a Preliminary document should be expected while keeping these as-

pects of production under consideration. Spansion places the following conditions upon Prelimi-

nary content:

“This document states the current technical specifications regarding the Spansion product(s) described

herein. The Preliminary status of this document indicates that product qualification has been completed,

and that initial production has begun. Due to the phases of the manufacturing process that require

maintaining efficiency and quality, this document may be revised by subsequent versions or modifica-

tions due to changes in technical specifications.”

Combination

Some data sheets will contain a combination of products with different designations (Advance In-

formation, Preliminary, or Full Production). This type of document will distinguish these products

and their designations wherever necessary, typically on the first page, the ordering information

page, and pages with DC Characteristics table and AC Erase and Program table (in the table

notes). The disclaimer on the first page refers the reader to the notice on this page.

Full Production (No Designation on Document)

When a product has been in production for a period of time such that no changes or only nominal

changes are expected, the Preliminary designation is removed from the data sheet. Nominal

changes may include those affecting the number of ordering part numbers available, such as the

addition or deletion of a speed option, temperature range, package type, or V IO range. Changes

may also include those needed to clarify a description or to correct a typographical error or incor-

rect specification. Spansion LLC applies the following conditions to documents in this category:

“This document states the current technical specifications regarding the Spansion product(s) described

herein. Spansion LLC deems the products to have been in sufficient production volume such that sub-

sequent versions of this document are not expected to change. However, typographical or specification

corrections, or modifications to the valid combinations offered may occur.”

Questions regarding these document designations may be directed to your local AMD or Fujitsu

sales office.

ii S71PL-J Based MCPs S71PL-J_00_B3March 17, 2006

This document contains information on one or more products under development at Spansion LLC. The information is intended to help you eval-uate this product. Do not design in this product without contacting the factory. Spansion LLC reserves the right to change or discontinue work on this proposed product without notice.

Publication Number S71PL-J_00Revision B Amendment 3Issue Date March 17, 2006

Distinctive Characteristics

MCP Features

Power supply voltage of 2.7V to 3.1V High performance

—65ns (65ns Flash, 70ns pSRAM)

Packages

—7 x 9 x 1.2mm 56 ball FBGA —8 x 11.6 x 1.2mm 64 ball FBGA —8 x 11.6 x 1.4mm 84 ball FBGA

Operating Temperature —–25°C

to +85°C —–40°C to

+85°C

General Description

The S71PL series is a product line of stacked Multi-Chip Product (MCP) packages and consists of:

One or more S29PL (Simultaneous Read/Write) Flash memory die pSRAM or SRAM (See “Referenced Data Sheets” on page 2)

The 256Mb Flash memory consists of two S29PL127J devices. In this case, CE#f2 is used to access the second Flash and no extra address lines are required.The products covered by this document are listed in the table below:

Notes:

1.Not recommended for new designs; use pSRAM based MCPs instead.

2.Not recommended for new designs: use S71PL127N and S71PL256N instead.

S71PL-J Based MCPs

Stacked Multi-Chip Product (MCP) Flash Memory and RAM 256M/128/64/32 Megabit (16/8/4/2M x 16-bit) CMOS 3.0 Volt-only Simultaneous Operation Page Mode Flash

Memory and 64/32/16/8/4 Megabit (4M/2M/1M/512K/256K x 16-bit) Static RAM/Pseudo Static RAM

Data Sheet

ADVANCE INFORMATION

Flash Memory Density

32Mb

64Mb

128Mb (Note 2)

256Mb (Note 2)

pSRAM Density

4 Mb S71PL032J408Mb

S71PL032J80S71PL064J8016Mb S71PL032JA0

S71PL064JA032Mb S71PL064JB0

S71PL127JB064Mb

S71PL127JC0S71PL254JC0

Flash Memory Density

32Mb

64Mb

SRAM Density (Note 1)

4 Mb

S71PL032J048 Mb S71PL032J08

S71PL064J0816 Mb

S71PL064J0A

A d v a n c e I n f o r m a t i o n

For detailed specifications, please refer to the individual data sheets listed in the following table.

Referenced Data Sheets

Document Publication Identification Number (PID)

S29PL-J S29PL-J_M0

pSRAM Type 1psram_12

pSRAM Type 2psram_15

8 Mb pSRAM Type 3psram_25

16 Mb pSRAM Type 3psram_06

pSRAM Type 4psram_18

pSRAM Type 5psram_21

pSRAM Type 6psram_14

pSRAM Type 7psram_13

4Mb/8Mb SRAM Type1sram_02

16Mb SRAM Type 1sram_06

SRAM Type 4sram_07

2S71PL-J Based MCPs S71PL-J_00_B3March 17, 2006

A d v a n c e I n f o r m a t i o n

Product Selector Guide

32Mb Flash Memory

Device-Model#Flash Access time (ns)(p)SRAM density(p)SRAM Access time (ns)pSRAM type Package S71PL032J04-0B654M SRAM70SRAM1TSC056 S71PL032J04-0K654M SRAM70SRAM4TSC056 S71PL032J40-0K654M pSRAM70pSRAM4TLC056 S71PL032J08-0B658M SRAM70SRAM1TSC056 S71PL032J80-0F658M pSRAM70pSRAM5TSC056 S71PL032J80-Q7658M pSRAM70pSRAM1TSC056 S71PL032J80-QF658M pSRAM70pSRAM3TSC056 S71PL032JA0-0K6516Mb pSRAM70pSRAM1TSC056 S71PL032JA0-QF6516Mb pSRAM70pSRAM3TSC056 S71PL032JA0-0Z6516M pSRAM70pSRAM7TLC056

64Mb Flash Memory

Device-Model#Flash Access time (ns)(p)SRAM density(p)SRAM Access time (ns)(p)SRAM type Package S71PL064J08-0B658M SRAM70SRAM1TLC056 S71PL064J80-0K658M pSRAM70pSRAM1TSC056 S71PL064J0A-0S 65 16M SRAM70 SRAM1 TLC056 S71PL064JA0-0Z6516M pSRAM70pSRAM7TLC056 S71PL064JA0-0B6516M pSRAM70pSRAM3TLC056 S71PL064JA0-076516M pSRAM70pSRAM1TLC056 S71PL064JA0-0P6516M pSRAM70pSRAM7TLC056 S71PL064JB0-QB6532M pSRAM70pSRAM2TLC056 S71PL064JB0-0U6532M pSRAM70pSRAM6TLC056

March 17, 2006S71PL-J_00_B3S71PL-J Based MCPs3

A d v a n c e I n f o r m a t i o n

128Mb Flash Memory (Not recommended for new designs; use S71PL127N instead)

Device-Model#Flash Access time (ns)pSRAM density pSRAM Access time (ns)pSRAM type Package S71PL127JB0-9Z6532M pSRAM70pSRAM7TLA064 S71PL127JB0-9U6532M pSRAM70pSRAM6TLA064 S71PL127JB0-9B6532M pSRAM70pSRAM2TLA064 S71PL127JC0-9B6564M pSRAM70pSRAM2TLA064 S71PL127JC0-9Z6564M pSRAM70pSRAM7TLA064 S71PL127JC0-9U6564M pSRAM70pSRAM6TLA064

256Mb Flash Memory (2xS29PL127J) (Not recommended for new designs: use

S71PL256N instead)

Device-Model#Flash Access time (ns)pSRAM density pSRAM Access time (ns)pSRAM type Package S71PL254JC0-TB6564M pSRAM70pSRAM2FTA084 S71PL254JC0-TZ6564M pSRAM70pSRAM7FTA084

4S71PL-J Based MCPs S71PL-J_00_B3March 17, 2006

March 17, 2006S71PL-J_00_B3S71PL-J Based MCPs 5

A d v a n c e I n f o r m a t i o n

MCP Block Diagram

Notes:

1.For 1 Flash + pSRAM, CE#f1=CE#. For 2 Flash + pSRAM, CE#=CE#f1 and CE#f2 is the chip-enable for the second

Flash.2.For 256Mb only, Flash 1 = Flash 2 = S29PL127J.

V SS

RESET#

Flash 1

IO 15-IO 0

V CC f

DQ 15 to DQ 0

RY/BY#

WP#/ACC V CC

CE#f1Flash-only Address Shared Address

OE#WE#

Flash 2(Note 2)CE#f2 (Note 1)

V CCS

V CC CE#s UB#s LB#s CE#UB#LB#

pSRAM/SRAM

CE2

6S71PL-J Based MCPs S71PL-J_00_B3March 17, 2006

A d v a n c e I n f o r m a t i o

Connection Diagram (S71PL032J)

Notes:

1.May be shared depending on density.

—A19 is shared for the 16M pSRAM configuration.

—A18 is shared for the 8M pSRAM and above configurations.

2.Connecting all V CC and V SS balls to V CC and V SS is recommended.

MCP

Flash-only Addresses

Shared Addresses

S71PL032JA0A20A19-A0S71PL032J80A20-A19A18-A0S71PL032J08A20-A19A18-A0S71PL032J40A20-A18A17-A0S71PL032J04

A20-A18

A17-A0

56-ball Fine-Pitch Ball Grid Array (Top View, Balls Facing Down)

March 17, 2006S71PL-J_00_B3S71PL-J Based MCPs 7

A d v a n c e I n f o r m a t i o

Connection Diagram (S71PL064J)

Notes:

1.May be shared depending on density.

—A20 is shared for the 32M pSRAM configuration.

—A19 is shared for the 16M pSRAM and above configurations.—A18 is shared for the 8M pSRAM and above configurations.

2.Connecting all V CC and V SS balls to V CC and V SS is recommended.

MCP

Flash-only Addresses

Shared Addresses

S71PL064JB0A21A20-A0S71PL064JA0A21-A20A19-A0S71PL064J0A A21-A20A19-A0S71PL064J80A21-A19A18-A0S71PL064J08

A21-A19

A18-A0

56-ball Fine-Pitch Ball Grid Array (Top View, Balls Facing Down)

8S71PL-J Based MCPs S71PL-J_00_B3March 17, 2006

A d v a n c e I n f o r m a t i o

Connection Diagram (S71PL127J)

Notes:

1.May be shared depending on density.

—A21 is shared for the 64M pSRAM configuration.

—A20 is shared for the 32M pSRAM and above configurations.

2.A19 is shared for the 16M pSRAM and above configurations.

3.Connecting all V CC and V SS balls to Vcc & Vss is recommended.

4.Ball L5 will be V CC F in the 84-ball density upgrades. Do not connect to V SS or any other signal.

MCP

Flash-only Addresses

Shared Addresses

S71PL127JC0A22A21-A0S71PL127JB0

A22-A21

A20-A0

64-ball Fine-Pitch Ball Grid Array (Top View, Balls Facing Down)

March 17, 2006S71PL-J_00_B3S71PL-J Based MCPs 9

A d v a n c e I n f o r m a t i o

Connection Diagram (S71PL254J)

Notes:

1.May be shared depending on density.

—A21 is shared for the 64M pSRAM configuration.—A20 is shared for the 32M pSRAM configuration.

2.Connecting all Vcc & Vss balls to Vcc & Vss is recommended.

Special Handling Instructions For FBGA Package

Special handling is required for Flash Memory products in FBGA packages.Flash memory devices in FBGA packages may be damaged if exposed to ultra-sonic cleaning methods. The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150°C for prolonged peri-ods of time.

MCP

Flash-only Addresses

Shared Addresses

S71PL254JC0

A22

A21-A0

84-ball Fine-Pitch Ball Grid Array (Top View, Balls Facing Down)

A d v a n c e I n f o r m a t i o

Pin Description

A21–A0=22 Address Inputs (Common)

DQ15–DQ0=16 Data Inputs/Outputs (Common)

CE1#f=Chip Enable 1 (Flash)

CE#f2=Chip Enable 2 (Flash)

CE1#ps=Chip Enable 1 (pSRAM)

CE2ps=Chip Enable 2 (pSRAM)

OE#=Output Enable (Common)

WE#=Write Enable (Common)

RY/BY#=Ready/Busy Output (Flash 1)

UB#=Upper Byte Control (pSRAM)

LB#=Lower Byte Control (pSRAM)

RESET#=Hardware Reset Pin, Active Low (Flash 1)

WP#/ACC=Hardware Write Protect/Acceleration Pin (Flash)

V CC f=Flash 3.0 volt-only single power supply (see Product

Selector Guide for speed options and voltage supply

tolerances)

V CC ps=pSRAM Power Supply

V SS=Device Ground (Common)

NC=Pin Not Connected Internally

Logic Symbol

10S71PL-J Based MCPs S71PL-J_00_B3March 17, 2006

A d v a n c e I n f o r m a t i o n

Ordering Information

The order number is formed by a valid combinations of the following:

S71PL127J B0BA W9Z0

PACKING TYPE

0=Tray

2=7” Tape and Reel

3=13” Tape and Reel

MODEL NUMBER

See the Valid Combinations table.

PACKAGE MODIFIER

0=7 x 9mm, 1.2mm height, 56 balls (TLC056 or TSC065)

9=8 x 11.6mm, 1.2mm height, 64 balls (TLA064 or TSB064)

T=8 x 11.6mm, 1.4mm height, 84 balls (FTA084)

TEMPERATURE RANGE

W=Wireless (-25°C to +85°C)

PACKAGE TYPE

BA=Fine-pitch BGA Lead (Pb)-free compliant package

BF=Fine-pitch BGA Lead (Pb)-free package

pSRAM DENSITY

C0=64Mb pSRAM

B0=32Mb pSRAM

A0=16Mb pSRAM

80=8Mb pSRAM

40=4Mb pSRAM

0A=16Mb pSRAM

08=8Mb SRAM

04=4Mb SRAM

PROCESS TECHNOLOGY

J=110 nm, Floating Gate Technology

FLASH DENSITY

254=256Mb

127=128Mb

064=64Mb

032=32Mb

PRODUCT FAMILY

S71PL Multi-chip Product (MCP)

3.0-volt Simultaneous Read/Write, Page Mode Flash Memory and RAM March 17, 2006S71PL-J_00_B3S71PL-J Based MCPs11

A d v a n c e I n f o r m a t i o n

S71PL032J Valid Combinations

Speed Options

(ns)

(p)SRAM

Type/Access

Time (ns)

Package

Marking

Base Ordering Part Number

Package &

Temperature

Package Modifier/

Model Number Packing Type

S71PL032J04

BAW 0B

0, 2, 3 (Note 1)65

SRAM2 / 70

(Note 2)

S71PL032J040K SRAM4 / 70 S71PL032J400K pSRAM4 / 70 S71PL032J800F pSRAM5 / 70 S71PL032J080B SRAM2 / 70 S71PL032J80Q7pSRAM1 / 70 S71PL032J80QF pSRAM3 / 70 S71PL032JA007pSRAM1 / 70 S71PL032JA0QF pSRAM3 / 70 S71PL032JA00Z pSRAM2 / 70

S71PL032J04

BFW 0B

0, 2, 3 (Note 1)65

SRAM2 / 70

(Note 2)

S71PL064J Valid Combinations

Speed Options

(ns)(p)SRAM Type/

Access Time

(ns)

Package

Marking

Base Ordering Part Number

Package &

Temperature

Package Modifier/

Model Number Packing Type

S71PL064J08

BAW 0B

0, 2, 3 (Note 1)65

SRAM1 / 70

(Note 2)

S71PL064J800K pSRAM1 /70 S71PL064J0A0S SRAM1 / 70 S71PL064JA00B pSRAM3 / 70 S71PL064JA007pSRAM1 / 70 S71PL064JA00P pSRAM7 / 70 S71PL064JB0QB pSRAM2 / 70 S71PL064JB00U pSRAM6 / 70

S71PL064J08

BFW 0B

0, 2, 3 (Note 1)65

SRAM1 / 70

(Note 2)

S71PL064J800K pSRAM1 /70 S71Pl064J0A0S SRAM1 / 70 S71PL064JA00B pSRAM3 / 70 S71PL064JA007pSRAM1 / 70 S71PL064JA00P pSRAM7 / 70 S71PL064JB0QB pSRAM2 / 70 S71PL064JB00U pSRAM6 / 70

Notes:

1.Type 0 is standard. Specify other options as required.

2.BGA package marking omits leading “S” and packing type

designator from ordering part number.

Valid Combinations

Valid Combinations list configurations planned to be supported in vol-ume for this device. Consult your local sales office to confirm avail-ability of specific valid combinations and to check on newly released combinations.

12S71PL-J Based MCPs S71PL-J_00_B3March 17, 2006

March 17, 2006S71PL-J_00_B3S71PL-J Based MCPs 13

A d v a n c e I n f o r m a t i o n

S71PL127J Valid Combinations

Speed Options

(ns)

(p)SRAM Type/Access Time

(ns)Package Marking Base Ordering Part Number Package & Temperature

Package Modifier/Model

Number

Packing Type

S71PL127JB0BAW 9Z 0, 2, 3 (Note 1)

pSRAM7 / 70(Note 2)

S71PL127JB09U pSRAM6 /70S71PL127JC09B pSRAM2 /70S71PL127JC09Z pSRAM7 / 70S71PL127JC09U pSRAM6 / 70S71PL127JB09B pSRAM2 / 70S71PL127JB0BFW 9Z 0, 2, 3 (Note 1)

pSRAM7 / 70(Note 2)S71PL127JB09U pSRAM6 / 70S71PL127JC09B pSRAM2 /70S71PL127JC09Z pSRAM7 / 70S71PL127JC09U pSRAM6 / 70S71PL127JB0

pSRAM2 / 70

S71PL254J Valid Combinations

Speed Options

(ns)

(p)SRAM Type/Access Time (ns)Package Marking Base Ordering Part Number Package & Temperature

Model Number

Packing Type S71PL254JC0BAW

TB 0, 2, 3 (Note1)

pSRAM2 / 70(Note 2)

S71PL254JC0TZ pSRAM7 / 70S71PL254JC0BFW TB 0, 2, 3 (Note1)65pSRAM2 / 70(Note 2)

S71PL254JC0

pSRAM7 / 70

Notes:

1.Type 0 is standard. Specify other options as required.

2.BGA package marking omits leading “S” and packing type

designator from ordering part number.

Valid Combinations

Notes:

1.Type 0 is standard. Specify other options as required.

2.BGA package marking omits leading “S” and packing type

designator from ordering part number.

Valid Combinations

14S71PL-J Based MCPs S71PL-J_00_B3March 17, 2006

A d v a n c e I n f o r m a t i o

Physical Dimensions

TLC056—56-ball Fine-Pitch Ball Grid Array (FBGA) 9 x 7mm Package

March 17, 2006S71PL-J_00_B3S71PL-J Based MCPs 15

A d v a n c e I n f o r m a t i o

TSC056—56-ball Fine-Pitch Ball Grid Array (FBGA) 9 x 7mm Package

16S71PL-J Based MCPs S71PL-J_00_B3March 17, 2006

A d v a n c e I n f o r m a t i o

TLA064—64-ball Fine-Pitch Ball Grid Array (FBGA) 8 x 11.6mm Package

March 17, 2006S71PL-J_00_B3S71PL-J Based MCPs 17

A d v a n c e I n f o r m a t i o

TSB064—64-ball Fine-Pitch Ball Grid Array (FBGA) 8 x 11.6 mm Package

18S71PL-J Based MCPs S71PL-J_00_B3March 17, 2006

A d v a n c e I n f o r m a t i o

FT A084—84-ball Fine-Pitch Ball Grid Array (FBGA) 8 x 11.6mm Package