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5962D9569402VEC中文资料

File Number3543.3 HS-0548RH, HS-0549RH

Radiation Hardened Single8/Differential4 Channel CMOS Analog Multiplexers with Active Overvoltage Protection

The HS-0548RH and HS-0549RH are radiation hardened analog multiplexers with Active Overvoltage Protection and guaranteed r ON matching. Analog input levels may greatly exceed either power supply without damaging the device or disturbing the signal path of other channels. Active protection circuitry assures that signal ?delity is maintained even under fault conditions that would destroy other multiplexers. Analog inputs can withstand constant 70V peak-to-peak levels with±15V supplies and digital inputs will sustain continuous faults up to4V greater than either supply. In addition,signal sources are protected from short circuiting should multiplexer supply loss occur: each input presents

1k?of resistance under this condition.These features make the HS-0548RH and HS-0549RH ideal for use in systems where the analog inputs originate from external equipment or separately powered circuitry. Both devices are fabricated with 44V dielectrically isolated CMOS technology. The

HS-0548 is an 8 channel device and the HS-0549 is a

4channel differential version. If input overvoltage protection is not needed, the HS-0508 and HS-509 multiplexers are recommended.

Speci?cations for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus(DSCC).The SMD numbers listed here must be used when ordering. Detailed Electrical Speci?cations for these devices are contained in SMD 5962-95694. A “hot-link” is provided on our homepage for downloading.

https://www.wendangku.net/doc/c31267300.html,/spacedefense/space.htm Features

?Electrically Screened to SMD # 5962-95694

?QML Quali?ed per MIL-PRF-38535 Requirements ?Gamma Dose. . . . . . . . . . . . . . . . . . . . . . 1 x 104RAD(Si)?No Latch-Up

?No Channel Interaction During Overvoltage ?Guaranteed r ON Matching

?Maximum Power Supply. . . . . . . . . . . . . . . . . . . . . . . 44V ?Break-Before-Make Switching

?Analog Signal Range . . . . . . . . . . . . . . . . . . . . . . . .±15V ?Access Time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0μs Applications

?Data Acquisition Systems

?Control Systems

?Telemetry

Pinouts

HS-0548RH GDIP1-T16 (CERDIP)

OR CDIP2-T16 (SBDIP)

TOP VIEW

HS-0549RH GDIP1-T16 (CERDIP)

OR CDIP2-T16 (SBDIP)

TOP VIEW

Ordering Information

ORDERING NUMBER

INTERNAL

MKT. NUMBER

TEMP. RANGE

(o C)

5962D9569401VEA HS1-0548RH-Q-55 to 125 5962D9569401VEC HS1B-0548RH-Q-55 to 125 5962D9569402VEA HS1-0549RH-Q-55 to 125 5962D9569402VEC HS1B-0549RH-Q-55 to 125

ENABLE

-V SUPPL Y

IN 1

IN 2

IN 3

OUT

IN 4

GND

+V SUPPL Y

IN 5

IN 6

IN 7

IN 8

ENABLE

-V SUPPL Y

IN 1A

IN 2A

IN 3A

OUTA

IN 4A

+V SUPPL Y

IN 1B

IN 2B

IN 3B

IN 4B

OUT B

GND

Data Sheet August 1999元器件交易网https://www.wendangku.net/doc/c31267300.html,

Functional Diagrams

HS-0548

HS-0549

HS-0548 TRUTH TABLE

A2A1A0EN “ON”CHANNEL X X X L NONE L L L H 1L L H H 2L H L H 3L H H H 4H L L H 5H L H H 6H H L H 7H

? DIGITAL INPUT PROTECTION

LEVEL SHIFT

OVER-CLAMP AND SIGNAL ISOLATION

VOLTAGE DRIVER

DECODER/1K

1K IN1

IN2

IN8

A0A1A2EN

OUT

????

5V REF HS-0549 TRUTH TABLE

A1A0EN “ON”CHANNEL PAIR X X L NONE L L H 1L H H 2H L H 3H

IN1B

? DIGITAL INPUT PROTECTION

LEVEL SHIFT

OVER-CLAMP AND SIGNAL ISOLATION

VOLTAGE 5V REF

IN1A

IN4A

IN4B

A0A1EN

OUT A

DRIVER

DECODER/OUT B

???

Switching Waveforms

FIGURE 1.ACCESS TIME

ADDRESS

DRIVE (V A )

OUTPUT A

V AH = 4.0V AL = 0V -10V

-8V

+10V

1/2V AH t A

EN V AH

OUT

IN 1

10K

IN 8

IN 2 THRU IN 7

GND

V A

A1A0V OUT

10V

±±10V

200ns/DIV.

V A INPUT 2V/DIV.OUTPUT A 5V/DIV .

CH 8 ON

CH 1 ON

FIGURE 2.BREAK-BEFORE-MAKE DELAY (t OPEN )

FIGURE 3.ENABLE DELAY t ON(EN), t OFF(EN)

50%

ADDRESS DRIVE (VA)

50%

V AH = 4.0

t OPEN

OUTPUT

EN V AH

OUT

+5V

IN 1

IN 8IN 2 THRU IN 7

GND

V A

A2A1A0

V OUT

VA INPUT 2V/DIV .OUTPUT 1V/DIV .

100ns/DIV.

CH 1 ON

CH8 ON

0V OUTPUT

50%

90%

V AH = 4.0

t ON(EN)

(EN)

t OFF

+10V

IN 2 THRU IN 8

GND

OUT

IN 1

V A

A2A1

A0ENABLE DRIVE 2V/DIV .

OUTPUT 4V/DIV.

100ns/DIV .

CH 1 OFF

CH 1 ON Schematic Diagrams

FIGURE 4.ADDRESS INPUT BUFFER AND LEVEL SHIFTER

V-

V+

LEVEL SHIFTER

ADD IN.

200?V-V+

D 1

D 2R 1N

R 5

R 6R 7

R 8

R 2

R 3R 4

OVERVOLTAGE PROTECTION

V+

R 10

R 9Q 1

Q 4D 3

TTL REFERENCE CIRCUIT

LEVEL SHIFTED ADDRESS TO

DECODE P

LEVEL SHIFTED ADDRESS TO

DECODE

FIGURE 5.ADDRESS DECODER FIGURE 6.MULTIPLEX SWITCH

ENABLE

N N

A0 OR A0

A1 OR A1

A2 OR A2

TO P-CHANNEL DEVICE OF THE SWITCH PAIR

TO N-CHANNEL DEVICE OF THE SWITCH PAIR V-D 6

D 7

D 4

D 5

OUT

R 11

FROM DECODE

OVERVOLTAGE

PROTECTION

V+Q 6

Q 5P

Burn-In/Life Test Circuits

HS-0548RH

DYNAMIC BURN-IN AND LIFE TEST CIRCUIT

V 1=-15V maximum, -16V minimum V 2=+15V minimum, +16V maximum R 1=10k ? ±5% 1/4W

C 1=C 2 = 0.01μF minimum (per socket) or 0.1μF minimum (per row)

D 1=D 2 = 1N4002 (or equivalent)

F 0=100kHz 50% duty cycle; V IL = 0.8V Max; V IH = 4.0V Min.F 1=F 0/2F 2=F 1/2F 3

F 2/2

HS-0548RH

STATIC BURN-IN TEST CIRCUIT

V 1=5V minimum, 6V maximum V 2=-15V maximum, -16V minimum V 3=+15V minimum, +16V maximum R 1=10k ?±5% 1/4W

C 1

C 2 = 0.01μF minimum (per socket) or 0.1μF minimum (per row)

D 1=D 2 = 1N4002 (or equivalent)

1415169

1312111012345768

F 0F 3

V 1D 1

C 1

R 1

F 1F 2

V 2

D 2

C 2

1415169

1312111012345768

V 2D 1

C 1

R 1

V 1

V 3

D 2

C 2

HS-0549RH

DYNAMIC BURN-IN AND LIFE TEST CIRCUIT

V 2=+15.5V ,±.0.5V V 3=-15.5V ,±0.5V R 1=10k ?,±5%

C 1=0.01μF minimum (per socket)

D 1=1N4002 or equivalent (per board)F 0

100kHz,±10%; F 1 = F 0/2; F 2 = F 1/2,

50% duty cycle, V IL = 0.8V Max; V IH = 4.0V Min

HS-0549RH

STATIC BURN-IN TEST CIRCUIT

V 1=+5.5V ,±0.5V V 2=+15.5V ,±0.5V V 3=-15.5V ,±0.5V R 1=10k ?, ±10%

C 1=0.01μF minimum (per socket)

D 1

1N4002 or equivalent (per board)

Burn-In/Life Test Circuits

(Continued)

1415169

1312111012345768

F 0F 2

V 2

V 3

D 1

C 1

R 1R 1D 1C 1

F 1

1415169

1312111012

5768

V 2

V 3

D 1

C 1

R 1R 1

D 1

C 1

V 1

Irradiation Circuits

HS-0549RH R 1 = R 2 = 10k ? ±5%

HS-0548RH R 1 = 10k ? ±5%

1415169

1312111012

345768+5V -15V +1V

R 1

R 2

+1V

+15V 1415169

1312111012

345768+5V -15V +1V

R 1

+1V

+15V

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certi?cation.

Intersil semiconductor products are sold by description only.Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-out notice.Accordingly,the reader is cautioned to verify that data sheets are current before placing https://www.wendangku.net/doc/c31267300.html,rmation furnished by Intersil is believed to be accurate and reliable.However,no responsibility is assumed by Intersil or its subsidiaries for its use;nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site https://www.wendangku.net/doc/c31267300.html,

Die Characteristics

DIE DIMENSIONS:

83 mils x 108 mils x 19 mils INTERFACE MATERIALS:Glassivation:

T ype: Nitride

Thickness: 7k ?±0.7k ?Top Metallization:T ype: Al

Thickness: 16k ?±2k ?

Substrate:CMOS, DI

ASSEMBL Y RELATED INFORMATION:Substrate Potential:Floating

ADDITIONAL INFORMATION:Worst Case Current Density:1.4 x 105 A/cm 2Transistor Count:253

Metallization Mask Layout

HS-0548RH

HS-0549RH

NOTE:Pad Numbers Correspond to DIP Pin Numbers Only

IN 6IN 7IN 8OUT IN 4IN 3IN 5+V GND

IN 2IN 1-V

A2A1A0EN IN3B IN4B OUT B OUT A IN4A IN3A

IN2A IN1A V-

IN2B IN1B +V

GND A1A0EN