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WSF512K16-35H2IA中文资料

White Electronic Designs

WSF512K16-XXX

512K X 16 SRAM/FLASH MODULE, SMD 5962-96901

FEATURES

Access Times of 35ns (SRAM) and 90ns (FLASH) Access Times of 70ns (SRAM) and 120ns (FLASH) Packaging

? 66 pin, PGA Type, 1.385" square HIP , Hermetic Ceramic HIP (Package 402)? 68 lead, Hermetic CQFP (G2), 22mm (0.880") square (Package 500). Designed to ? t JEDEC 68 lead 0.990” CQFJ footprint (FIGURE 2) 512Kx16 SRAM 512Kx16 5V FLASH

Organized as 512Kx16 of SRAM and 512Kx16 of

Flash Memory with separate Data Busses Both blocks of memory are User Con? gurable as

1Mx8 Low Power CMOS

Commercial, Industrial and Military Temperature

Ranges

TTL Compatible Inputs and Outputs

Built-in Decoupling Caps and Multiple Ground Pins

for Low Noise Operation Weight - 13 grams typical

FLASH MEMORY FEATURES

100,000 Erase/Program Cycles Sector Architecture

? 8 equal size sectors of 64K bytes each

? Any combination of sectors can be concurrently

erased. Also supports full chip erase 5 Volt Programming; 5V ± 10% Supply Embedded Erase and Program Algorithms Hardware Write Protection

Page Program Operation and I

nternal Program

Control Time.

Note: Programming information available upon request.

White Electronic Designs WSF512K16-XXX FIGURE 2 – PIN CONFIGURATION FOR WSF512K16-XG2X

White Electronic Designs

WSF512K16-XXX

DC CHARACTERISTICS

V CC = 5.0V, V SS = 0V, -55°C ≤ T A ≤ +125°C

Parameter

Symbol Conditions Min Max Unit Input Leakage Current I LI V CC = 5.5, V IN = GND to V CC

10μA Output Leakage Current

I LO SCS# = V IH , OE# = V IH , V OUT = GND to V CC

10μA SRAM Operating Supply Current x 16 Mode I CCx16SCS# = V IL , OE# = FCS# = V IH , f = 5MHz, V CC = 5.5 330mA Standby Current

I SB FCS# = SCS# = V IH , OE# = V IH , f = 5MHz, V CC = 5.5 45mA SRAM Output Low Voltage V OL I OL = 6mA, V CC = 4.50.4V SRAM Output High Voltage

V OH I OH = -1.0mA, V CC = 4.5 2.4V Flash V CC Active Current for Read (1)

I CC1FCS# = V IL , OE# = SCS# = V IH 130mA Flash V CC Active Current for Program or Erase (2)I CC2FCS# = V IL , OE# = SCS# = V IH 150mA Flash Output Low Voltage V OL I OL = 8.0mA, V CC = 4.50.45V Flash Output High Voltage

V OH1I OH = -2.5 mA, V CC = 4.50.85 x V CC

V Flash Low V CC Lock Out Voltage

V LKO

3.2

4.2

V

NOTES: 1. The I

CC current listed includes both the DC operating current and the frequency dependent component (@ 5 MHz).

The frequency component typically is less than 2 mA/MHz, with OE# at V IH .2. I

CC active while Embedded Algorithm (program or erase) is in progress.3. DC test conditions: V IL = 0.3V, V IH = V CC - 0.3V

ABSOLUTE MAXIMUM RATINGS

Parameter Symbol Min Max Unit Operating Temperature T A -55+125°C Storage Temperature T STG -65+150°C Signal Voltage Relative to GND V G -0.57.0V Junction Temperature T J 150°C Supply Voltage V CC -0.5

7.0

V

Parameter

Flash Data Retention

20 years Flash Endurance (write/erase cycles)

100,000

NOTES: 1. S tresses above the absolute maximum rating may cause permanent

damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability.

RECOMMENDED OPERATING CONDITIONS

Parameter Symbol Min Max Unit Supply Voltage V CC 4.5 5.5V Input High Voltage V IH 2.2V CC + 0.3V Input Low Voltage

V IL

-0.5

+0.8

V

SRAM TRUTH TABLE

SCS#OE#SWE#Mode Data I/O Power H X X Standby High Z Standby L L H Read Data Out Active L H H Read High Z Active L

X

L

Write

Data In

Active

CAPACITANCE

T A = +25°C

Test

Symbol Condition Max Unit OE# Capacitance

C OE V IN = 0V, f = 1.0MHz 50pF F/S WE1-2# Capacitance C WE V IN = 0V, f = 1.0MHz 20pF F/S CS1-2# Capacitance C CS V IN = 0V, f = 1.0MHz 20pF Data I/O Capacitance

C I/O V IN = 0V, f = 1.0MHz 20pF Address Input Capacitance

C AD

V IN = 0V, f = 1.0MHz 50pF

This parameter is guaranteed by design but not tested.

White Electronic Designs WSF512K16-XXX SRAM AC CHARACTERISTICS

V CC = 5.0V, -55°C ≤ T A ≤ +125°C

Parameter Read Cycle Symbol

-35-70

Unit

Min Max Min Max

Read Cycle Time t RC3570ns Address Access Time t AA3570ns Output Hold from Address Change t OH05ns Chip Select Access Time t ACS3570ns Output Enable to Output Valid t OE2535ns Chip Select to Output in Low Z t CLZ1410ns Output Enable to Output in Low Z t OLZ105ns Chip Disable to Output in High Z t CHZ11525ns Output Disable to Output in High Z t OHZ11525ns 1. This parameter is guaranteed by design but not tested.

SRAM AC CHARACTERISTICS

V CC = 5.0V, -55°C ≤ T A ≤ +125°C

Parameter

Write Cycle

Symbol

-35-70

Unit

Min Max Min Max Write Cycle Time t WC3570ns Chip Select to End of Write t CW2560ns Address Valid to End of Write t AW2560ns Data Valid to End of Write t DW2030ns Write Pulse Width t WP2550ns Address Setup Time t AS00ns Address Hold Time t AH05ns Output Active from End of Write t OW105ns Write Enable to Output in High Z t WHZ11525ns Data Hold from Write Time t DH00ns 1. This parameter is guaranteed by design but not tested.

White Electronic Designs WSF512K16-XXX FIGURE 4 – SRAM TIMING WAVEFORM — READ CYCLE

White Electronic Designs WSF512K16-XXX FLASH AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, FWE# CONTROLLED

V CC = 5.0V, -55°C ≤ T A ≤ +125°C

Parameter Symbol

-90-120

Unit Min Max Min Max

Write Cycle Time t AVAV t WC90120ns Chip Select Setup Time t ELWL t CS00ns Write Enable Pulse Width t WLWH t WP4550ns Address Setup Time t AVWL t AS00ns Data Setup Time t DVWH t DS4550ns Data Hold Time t WHDX t DH00ns Address Hold Time t WLAX t AH4550ns Write Enable Pulse Width High t WHWL t WPH2020ns Duration of Byte Programming Operation (1)t WHWH1300300μs Sector Erase Time (2)t WHWH21515sec Read Recovery Time Before Write t GHWL00μs V CC Set-up Time t VCS5050μs Chip Programming Time 1111sec Chip Select Hold Time t OEH1010ns Chip Erase Time (3)6464sec NOTES:

1. Typical value for t WHWH1 is 7ns.

2. Typical value for t WHWH2 is 1sec.

3. Typical value for Chip Erase Time is 8sec.

FLASH AC CHARACTERISTICS – READ ONLY OPERATIONS

V CC = 5.0V, -55°C ≤ T A ≤ +125°C

Parameter Symbol

-90-120

Unit Min Max Min Max

Read Cycle Time t AVAV t RC90120ns Address Access Time t AVQV t ACC90120ns Chip Select Access Time t ELQV t CE90120ns OE# to Output Valid t GLQV t OE3550ns Chip Select to Output High Z (1)t EHQZ t DF2030ns OE# High to Output High Z (1)t GHQZ t DF2030ns Output Hold from Address, CS# or OE# Change, whichever is ? rst t AXQX t OH00ns 1. Guaranteed by design, not tested.

White Electronic Designs WSF512K16-XXX FLASH AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, FCS# CONTROLLED

V CC = 5.0V, -55°C ≤ T A ≤ +125°C

Parameter Symbol

-970-120

Unit Min Max Min Max

Write Cycle Time t AVAV t WC90120ns FWE# Setup Time t WLEL t WS00ns FCS# Pulse Width t ELEH t CP4550ns Address Setup Time t AVEL t AS00ns Data Setup Time t DVEH t DS4550ns Data Hold Time t EHDX t DH00ns Address Hold Time t ELAX t AH4550ns FCS# Pulse Width High t EHEL t CPH20 20ns Duration Of Programming Operation (1)t WHWH1300300μs Sector Erase Time (2)t WHWH21515sec Read Recovery Time t GHEL00ns Chip Programming Time1111sec Chip Erase Time (3)6464sec NOTES:

1. Typical value for t WHWH1 is 7ns.

2. Typical value for t WHWH2 is 1sec.

3. Typical value for Chip Erase Time is 8sec.

White Electronic Designs WSF512K16-XXX FIGURE 7 – AC WAVEFORMS FOR FLASH MEMORY READ OPERATIONS

White Electronic Designs WSF512K16-XXX FIGURE 8 – WRITE/ERASE/PROGRAM OPERATION, FLASH MEMORY FWE# CONTROLLED

White Electronic Designs WSF512K16-XXX FIGURE 9 – AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS FOR FLASH MEMORY

White Electronic Designs WSF512K16-XXX FIGURE 10 – AC WAVEFORMS FOR DATA# POLLING DURING EMBEDDED ALGORITHM

White Electronic Designs WSF512K16-XXX FIGURE 11 – WRITE/ERASE/PROGRAM OPERATION FOR FLASH MEMORY, CS# CONTROLLED

White Electronic Designs WSF512K16-XXX PACKAGE 402: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H2)

ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES

White Electronic Designs WSF512K16-XXX PACKAGE 500: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2)

ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES

White Electronic Designs WSF512K16-XXX

ORDERING INFORMATION

W S F 512K16 - XXX X X X

LEAD FINISH:

Blank = Gold plated leads

A = Solder dip leads

DEVICE GRADE:

M = Military Screened -55°C to +125°C

= I ndustrial -40°C to +85°C

C = Commercial 0°C to +70°C

PACKAGE TYPE:

H2 = Ceramic Hex In-line Package, HIP (Package 402)

G2 = 22 mm Ceramic Quad Flat Pack, CQFP (Package 500)

ACCESS TIME (ns)

39 = 35ns SRAM and 90ns FLASH

72 = 70ns SRAM and 120ns FLASH also available

ORGANIZATION, 512K x 16

FLASH

SRAM

WHITE ELECTRONIC DESIGNS CORP.

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