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L296PHT中文资料

L296L296P

June 2000

HIGH CURRENT SWITCHING REGULATORS

.4 A OUTPUT CURRENT

.5.1 V TO 40 V OUTPUT VOLTAGE RANGE .0 TO 100 % DUTY CYCLE RANGE

.PRECISE (±2 %) ON-CHIP REFERENCE .SWITCHING FREQUENCY UP TO 200 KHz .VERY HIGH EFFICIENCY (UP TO 90 %).VERY FEW EXTERNAL COMPONENTS .SOFT START .RESET OUTPUT

.EXTERNAL PROGRAMMABLE LIMITING CURRENT (L296P)

.CONTROL CIRCUIT FOR CROWBAR SCR .INPUT FOR REMOTE INHIBIT AND SYNCHRONUS PWM .

THERMAL SHUTDOWN

DESCRIPTION

The L296 and L296P are stepdown power switching regulators delivering 4 A at a voltage variable from 5.1 V to 40 V.

Features of the devices include soft start, remote in-hibit, thermal protection, a reset output for micro-processors and a PWM comparator input for syn-chronization in multichip configurations.

The L296P incudes external programmable limiting current.

The L296 and L296P are mounted in a 15-lead Mul-tiwatt ? plastic power package and requires very few external components.

Efficient operation at switching frequencies up to 200 KHz allows a reduction in the size and cost of external filter components. A voltage sense input and SCR drive output are provided for optional crowbar overvoltage protection with an external SCR.

Multiwatt ?(15 lead)

ORDERING NUMBERS :

L296 (Vertical)L296HT (Horizontal)L296P (Vertical)L296PHT (Horizontal)

PIN CONNECTION

(top view)

1/22

PIN FUNCTIONS

N°Name Function

1CROWBAR INPUT Voltage Sense Input for Crowbar Overvoltage Protection. Normally connected to the

feedback input thus triggering the SCR when V out exceeds nominal by 20 %. May

also monitor the input and a voltage divider can be added to increase the threshold.

Connected to ground when SCR not used.

2OUTPUT Regulator Output

3SUPPLY VOLTAGE Unrergulated Voltage Input. An internal Regulator Powers the L296s Internal Logic.

4CURRENT LIMIT A resistor connected between this terminal and ground sets the current limiter

threshold. If this terminal is left unconnected the threshold is internally set (see

electrical characteristics).

5SOFT START Soft Start Time Constant. A capacitor is connected between this terminal and ground

to define the soft start time constant. This capacitor also determines the average

short circuit output current.

6INHIBIT INPUT TTL – Level Remote Inhibit. A logic high level on this input disables the device.

7SYNC INPUT Multiple L296s are synchronized by connecting the pin 7 inputs together and omitting

the oscillator RC network on all but one device.

8GROUND Common Ground Terminal

9FREQUENCY

COMPENSATION A series RC network connected between this terminal and ground determines the regulation loop gain characteristics.

10FEEDBACK INPUT The Feedback Terminal on the Regulation Loop. The output is connected directly to

this terminal for 5.1V operation ; it is connected via a divider for higher voltages.

11OSCILLATOR A parallel RC networki connected to this terminal determines the switching frequency.

This pin must be connected to pin 7 input when the internal oscillator is used.

12RESET INPUT Input of the Reset Circuit. The threshold is roughly 5 V. It may be connected to the

feedback point or via a divider to the input.

13RESET DELAY A capacitor connected between this terminal and ground determines the reset signal

delay time.

14RESET OUTPUT Open collector reset signal output. This output is high when the supply is safe.

15CROWBAR OUTPUT SCR gate drive output of the crowbar circuit.

BLOCK DIAGRAM

CIRCUIT OPERATION (refer to the block diagram)

The L296 and L296P are monolithic stepdown switching regulators providing output voltages from 5.1V to 40V and delivering 4A.

The regulation loop consists of a sawtooth oscillator,error amplifier, comparator and the output stage. An error signal is produced by comparing the output voltage with a precise 5.1V on-chip reference (zener zap trimmed to ± 2 %). This error signal is then com-pared with the sawtooth signal to generate the fixed frequency pulse width modulated pulses which drive the output stage. The gain and frequency stability of the loop can be adjusted by an external RC network connected to pin 9. Closing the loop directly gives an output voltage of 5.1V. Higher voltages are obtained by inserting a voltage divider.

Output overcurrents at switch on are prevented by the soft start function. The error amplifier output is initially clamped by the external capacitor Css and allowed to rise, linearly, as this capacitor is charged by a constant current source.

Output overload protection is provided in the form of a current limiter. The load current is sensed by an internal metal resistor connected to a comparator.When the load current exceeds a preset threshold this comparator sets a flip flop which disables the output stage and discharges the soft start capacitor.A second comparator resets the flip flop when the voltage across the soft start capacitor has fallen to 0.4V. The output stage is thus re-enabled and the output voltage rises under control of the soft start network. If the overload condition is still present the limiter will trigger again when the threshold current is reached. The average short circuit current is lim-ited to a safe value by the dead time introduced by the soft start network.

The reset circuit generates an output signal when the supply voltage exceeds a threshold pro-grammed by an external divider. The reset signal is generated with a delay time programmed by an ex-ternal capacitor. When the supply falls below the threshold the reset output goes low immediately.The reset output is an open collector.

The scrowbar circuit senses the output voltage and the crowbar output can provide a current of 100mA to switch on an external SCR. This SCR is triggered when the output voltage exceeds the nominal by 20%. There is no internal connection between the output and crowbar sense input therefore the crow-bar can monitor either the input or the output.

A TTL - level inhibit input is provided for applications such as remote on/off control. This input is activated by high logic level and disables circuit operation. Af-ter an inhibit the L296 restarts under control of the soft start network.

The thermal overload circuit disables circuit opera-tion when the junction temperature reaches about 150 °C and has hysteresis to prevent unstable con-

ditions.

Figure 1 :

Reset Output Waveforms

Figure 2 : Soft Start Waveforms

Figure 3 : Current Limiter Waveforms

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit V i Input Voltage (pin 3)50V V i – V2Input to Output Voltage Difference50V

V2Output DC Voltage

Output Peak Voltage at t = 0.1 μsec f = 200KHz – 1

– 7

V1, V12Voltage at Pins 1, 1210V V15Voltage at Pin 1515V V4, V5, V7, V9, V13Voltage at Pins 4, 5, 7, 9 and 13 5.5V V10, V6Voltage at Pins 10 and 67V V14Voltage at Pin 14 (I14≤ 1 mA)V i

I9Pin 9 Sink Current1mA I11Pin 11 Source Current20mA I14Pin 14 Sink Current (V14 < 5 V)50mA P tot Power Dissipation at T case≤ 90 °C20W T j, T stg Junction and Storage Temperature– 40 to 150°C

THERMAL DATA

Symbol Parameter

Value Unit R th j-case Thermal Resistance Junction-case Max.3°C/W R th j-amb

Thermal Resistance Junction-ambient

Max.

°C/W

ELECTRICAL CHARACTERISTICS

(refer to the test circuits T j = 25o C, V i = 35V, unless otherwise specified)

Symbol Parameter

Test Conditions

Min.Typ.Max.

Unit Fig.DYNAMIC CHARACTERISTICS (pin 6 to GND unless otherwise specified)

V o Output Voltage Range V i = 46V, I o = 1A V ref 40V 4V i Input Voltage Range V o = V ref to 36V, I o ≤

46V 4V i Input Voltage Range Note (1), V o = V REF to 36V I o = 4A 46V 4?V o Line Regulation V i =10V to 40V, V o = V ref , I o = 2A 1550mV 4?V o Load Regulation

V o = V ref

I o = 2A to 4A I o = 0.5A to 4A

153045mV

V ref Internal Reference Voltage (pin 10)V i = 9V to 46V, I o = 2A 5

5.1 5.2

V 4

? V ref ? T Average Temperature Coefficient of Reference Voltage

T j = 0°C to 125°C, I o = 2A 0.4mV/°C V d Dropout Voltage Between Pin 2and Pin 3

I o = 4A I o = 2A

21.3

3.22.1V V 44I 2L

Current Limiting Threshold (pin 2)

L296 - Pin 4 Open,

V i = 9V to 40V, V o = V ref to 36V 4.5

7.5

A 4L296P - V i = 9V to 40V, V o = V ref

Pin 4 Open R Iim = 22k ?

52.5

74.5A

I SH Input Average Current V i = 46V, Output Short-circuited 60100

mA 4ηEfficiency

I o = 3 A

V o = V ref V o = 12V

7585

%4SVR Supply Voltage Ripple Rejection ?V i = 2 V rms , f ripple = 100Hz V o = V ref , I o = 2A 5056dB

4f Switching Frequency 85

100115kHz 4? f ? V i Voltage Stability of Switching Frequency

V i = 9V to 46V 0.5%4? f ? T j Temperature Stability of Switching Frequency

T j = 0°C to 125°C 1

%4f max Maximum Operating Switching Frequency

V o = V ref , I o = 1A 200kHz –T sd

Thermal Shutdown Junction Temperature

Note (2)

135

145

°C

–

DC CHARACTERISTICS

I 3Q Quiescent Drain Current

V i = 46V, V 7 = 0V, S1 : B, S2 : B

V 6 = 0V V 6 = 3V 66308540mA

– I 2L

Output Leakage Current V i = 46V, V 6 = 3V, S1 : B, S2 : A,V 7 = 0V

Note

(1) :Using min. 7 A schottky diode.

(2) :Guaranteed by design, not 100 % tested in production.

ELECTRICAL CHARACTERISTICS (continued)

Symbol Parameter Test Conditions Min.Typ.Max.Unit Fig. SOFT START

I5 so Source Current V6 = 0V, V5 = 3V80130150μA6b I5 si Sink Current V6 = 3V, V5 = 3V5070120μA6b INHIBIT

V6L V6H Input Voltage

Low Level

High Level

V i = 9V to 46V, V7 = 0V,

S1 : B, S2 : B– 0.3

0.8

5.5

V6a

– I6L – I6H Input Current

with Input Voltage

Low Level

High Level

V i = 9V to 46V, V7 = 0V,

S1 : B, S2 : B

V6 = 0.8V

V6 = 2V

μA6a

ERROR AMPLIFIER

V9H High Level Output Voltage V10 = 4.7V, I9 = 100μA,

S1 : A, S2 : A

3.5V6c

V9L Low Level Output Voltage V10 = 5.3V, I9 = 100μA,

S1 : A, S2 : E

0.5V6c

I9 si Sink Output Current V10 = 5.3V, S1 : A, S2 : B100150μA6c – I9 so Source Output Current V10 = 4.7V, S1 : A, S2 : D100150μA6c

I10Input Bias Current V10 = 5.2V, S1 : B

V10 = 6.4V, S1 : B, L296P 2

μA

G v DC Open Loop Gain V9 = 1V to 3V, S1 : A, S2 : C4655dB6c OSCILLATOR AND PWM COMPARATOR

– I7Input Bias Current of

PWM Comparator

V7 = 0.5V to 3.5V5μA6a – I11Oscillator Source Current V11 = 2V, S1 : A, S2 : B5mA RESET

V12 R Rising Threshold Voltage

V i = 9V to 46V,

S1 : B, S2 : B

V ref

-150mV

V ref

-100mV

V ref

-50mV

V6d

V12 F Falling Threshold Voltage 4.75V ref

-150mV

V ref

-100mV

V6d

V13 D Delay Thershold Voltage

V12 = 5.3V, S1 : A, S2 : B 4.3 4.5 4.7V6d

V13 H Delay Threshold Voltage

Hysteresis

100mV6d V14 S Output Saturation Voltage I14 = 16mA, V12 = 4.7V, S1, S2 : B0.4V6d I12Input Bias Current V12 = 0V to V ref, S1 : B, S2 : B13μA6d

– I13 so I13 si Delay Source Current

Delay Sink Current

V13 = 3V, S1 : A, S2 : B

V12 = 5.3V

V12 = 4.7V

110140μA

I14Output Leakage Current V i = 46V, V12 = 5.3V, S1 : B, S2 : A100μA6d CROWBAR

V1Input Threshold Voltage S1 : B 5.56 6.4V6b V15Output Saturation Voltage V i = 9V to 46V, V i = 5.4V,

I15 = 5mA, S1 : A

0.20.4V6b

I1Input Bias Current V1 = 6V, S1 : B10μA6b – I15Output Source Current V i = 9V to 46V, V1 = 6.5V,

V15 = 2V, S1 : B

70100mA

Figure 4 : Dynamic Test Circuit

C7, C8 : EKR (ROE)

L1 : L = 300 μH at 8 A Core type : MAGNETICS 58930 - A2 MPP

N° turns : 43 Wire Gauge : 1 mm (18 AWG) COGEMA 946044

(*) Minimum suggested value (10 μF) to avoid oscillations. Ripple consideration leads to typical value of 1000 μF or higher. Figure 5 : PC. Board and Component Layout of the Circuit of Figure 4 (1:1 scale)

Figure 6 : DC Test Circuits.Figure 6a.

Figure 6b.

Figure 6c.

Figure 6d.

1 - Set V 10 FOR V 9 = 1 V

2 - Change V 10 to obtain V 9 =

3 V 3 - G V =

DV 9 =

?V 10 ?V

Figure 7 : Quienscent Drain Current vs. Supply

Voltage (0 % Duty Cycle - see fig. 6a).

Figure 8 : Quienscent Drain Current vs. Supply

Voltage (100 % Duty Cycle see fig. 6a).

Figure 9 : Quiescent Drain Current vs. Junction Temperature (0 % Duty Cycle -

see fig. 6a).Figure 10 : Quiescent Drain Current vs. Junction Temperature (100 % Duty Cycle -

see fig. 6a).

Figure 11 : Reference Voltage (pin 10) vs. V I

(see fig. 4).

Figure 12 : Reference Voltage (pin 10) vs. Junction

Temperature (see fig. 4).

Figure 13 : Open Loop Frequency and Phase

Response of Error Amplifier

(see fig. 6c).

Figure 14 : Switching Frequency vs. Input

Voltage (see fig. 4).

Figure 15 : Switching Frequency vs. Junction

Temperature (see fig. 4).

Figure 16 : Switching Frequency vs. R1

(see fig. 4).

Figure 17 : Line Transient Response (see fig. 4).Figure 18 :

Load Transient Response (see fig. 4).

Figure 19 : Supply Voltage Ripple Rejection vs. Frequency (see fig. 4).Figure 20 : Dropout Voltage Between Pin 3 and Pin 2 vs. Current at Pin 2.

Figure 21 : Dropout Voltage Between Pin 3 and

Pin 2 vs. Junction Temperature.

Figure 22 : Power Dissipation Derating Curve.

Figure 23 : Power Dissipation (device only) vs. Input Voltage.Figure 24 : Power Dissipation (device only) vs. Input voltage.

Figure 25 : Power Dissipation (device only) vs.

Output Voltage (see fig. 4).

Figure 26 : Power Dissipation (device only) vs.

Output Voltage (see fig. 4).

Figure 28 :

Efficiency vs. Output Current. Figure 29 : Efficiency vs. Output Voltage.Figure 30 :

Efficiency vs. Output Voltage. Figure 27 : Voltage and Current Waveforms at Pin 2

(see fig. 4).

Figure 31 : Current Limiting Threshold vs. R pin 4 (L296P only).Figure 32 : Current Limiting Threshold vs. Junction Temperature.

Figure 33 : Current Limiting Threshold vs. Supply Voltage.

APPLICATION INFORMATION

Figure 34 : Typical Application Circuit.

(*) Minimum value (10 μF) to avoid oscillations ; ripple consideration leads to typical value of 1000 μF or higher L1 : 58930 - MPP COGEMA 946044 ; GUP 20 COGEMA 946045

SUGGESTED INDUCTOR (L1)

Core Type No Turns Wire Gauge Air Gap Magnetics 58930 – A2MPP43 1.0 mm–Thomson GUP 20 x 16 x 7650.8 mm 1 mm Siemens EC 35/17/10 (B6633& – G0500 – X127)40 2 x 0.8 mm–

VOGT 250 μH Toroidal Coil, Part Number 5730501800

Resistor Values for Standard Output Voltages

V0R8R7

12 V 15 V 18 V 24 V 4.7 K?

4.7 K?

6.2 K?

9.1 K?

12 K?

18 K

Figure 35 : P.C. Board and Component Layout of the Circuit of fig. 34 (1:1 scale)

SELECTION OF COMPONENT VALUES (see fig. 34)

Component Recommended

Value Purpose Allowed Rage

Notes Min.Max.

R1 R2

–

100 k?

Set Input Voltage

Threshold for Reset.

–

220k?R1/R2

V i min

? 1

If output voltage is sensed R1 and

R2 may be limited and pin 12

connected to pin 10.

R3 4.3 k?Sets Switching Frequency 1 k?100k?

R410 k?Pull-down Resistor22k?May be omitted and pin 6 grounded

if inhibit not used.

R515 k?Frequency Compensation10k?

R6Collector Load For Reset

Output

V O

0.05A

Omitted if reset function not used.

R7 R8

–

4.7 k?

Divider to Set Output

Voltage

–

1k?R7/R8 =

V O? V REF

V REF

R iim–Sets Current Limit Level7.5k?If R iim is omitted and pin 4 left open

the current limit is internally fixed. C110 μF Stability 2.2μF

C2 2.2 μF Sets Reset Delay––Omitted if reset function not used. C3 2.2 nF Sets Switching Frequency 1 nF 3.3nF

C4 2.2 μF Soft Start 1 μF–Also determines average short

circuit current.

C533 nF Frequency Compensation

C6390 pF High Frequency

Compensation

––Not required for 5 V operation.

C7, C8

L1100 μF

300 μH

Output Filter–

100μH

–

Q1Crowbar Protection The SCR must be able to withstand

the peak discharge current of the

output capacitor and the short

circuit current of the device.

D1Recirculation Diode7A Schottky or 35 ns t rr Diode.

Figure 36 : A Minimal 5.1 V Fixed Regulator. Very Few Components are Required.

Figure 37 : 12 V/10 A Power Supply.

Figure 38 : Programmable Power Supply.

V o = 5.1 to 15 V

I o = 4 A max. (min. load current = 100 mA)

ripple ≤ 20 mV

load regulation (1 A to 4 A) = 10 mV (V o = 5.1 V)

line regulation (220 V ± 15 % and to I o = 3 A) = 15 mV (V o = 5.1 V)

Figure 39 : Preregulator for Distributed Supplies.

(*) L2 and C2 are necessary to reduce the switching frequency spikes.

Figure 41 : Voltage Sensing for Remote Load. Figure 40 : In Multiple Supplies Several L296s

can be Synchronized As Shown.

Figure 42 : A 5.1 V/15 V/24 V Multiple Supply. Note the Synchronization of the Three L296s.

Figure 43 : 5.1V/2A Power Supply using External

Limiting Current Resistor and Crow-bar Protection on the Supply Voltage (L296P only)

SOFT-START AND REPETITIVE POWER-ON When the device is repetitively powered-on, the soft-start capacitor, C SS , must be discharged rapidly to ensure that each start is "soft". This can be achieved economically using the reset circuit, as shown in Fig-ure 44.

In this circuit the divider R1, R2 connected to pin 12determines the minimum supply voltage, below which the open collector transistor at the pin 14 out-put discharges C SS

Figure 44

Figure 45

Figure 46

The approximate discharge times obtained with this circuit are :

CSS (μF)tDIS (μs)2.24.710

200300600

If these times are still too long, an external PNP tran-

sistor may be added, as shown in Figure 45 ; with this circuit discharge times of a few microseconds may be obtained.HOW TO OBTAIN BOTH RESET AND POWER FAIL

Figure 46 illustrates how it is possible to obtain at the same time both the power fail and reset functions simply by adding one diode (D) and one resistor (R).In this case the Reset delay time (pin 13) can only start when the output voltage is V O ≥ V REF - 100mV and the voltage accross R2 is higher than 4.5V.With the hysteresis resistor it is possible to fix the in-put pin 12 hysteresis in order to increase immunity to the 100Hz ripple present on the supply voltage.Moreover, the power fail and reset delay time are automatically locked to the soft-start. Soft-start and delayed reset are thus two sequential functions.The hysteresis resistor should be In the range of aboit 100k ? and the pull-up resistor of 1 to 2.2k ?

Multiwatt15 V

DIM.mm

inch MIN.

TYP.

MAX.MIN.

TYP.

MAX.A 50.197B 2.650.104C 1.6

0.063

D 1

0.039

E 0.490.550.0190.022

F 0.660.750.0260.030

G 1.02 1.27 1.520.0400.0500.060G117.5317.78

18.03

0.6900.700

0.710H119.6

0.772H220.2

0.795

L 21.922.222.50.8620.8740.886L121.722.1

22.50.8540.8700.886L217.6518.10.6950.713L317.2517.517.750.6790.6890.699L410.310.710.90.4060.4210.429L7 2.65 2.90.1040.114M 4.25 4.55 4.850.1670.1790.191M1 4.63 5.08 5.530.1820.200

0.218S 1.9 2.60.0750.102S1 1.9 2.60.0750.102Dia1

3.65

3.85

0.144

0.152

OUTLINE AND

MECHANICAL DATA