Document No. U13917EJ1V1DS00 (1st edition)
Date Published August 2001 N CP(K)The mark shows major revised points.
?1999, 2000
ORDERING INFORMATION
Part Number Package
μPD789860MC-×××-5A420-pin plastic SSOP (7.62 mm (300))μPD789861MC-×××-5A420-pin plastic SSOP (7.62 mm (300)) Remark××× indicates ROM code suffix.
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Data Sheet U13917EJ1V1DS
Data Sheet U13917EJ1V1DS
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78K/0S SERIES LINEUP
The products in the 78K/0S Series are listed below. The names enclosed in boxes are subseries names.
Remark VFD (Vacuum Fluorescent Display) is referred to as “FIP TM
” (Fluorescent Indicator Panel) in some
documents, but the functions of the two are the same.
PD789426 with enhanced A/D converter (10 bits)
PD789446 with enhanced A/D converter (10 bits)
SIO, 8-bit A/D converter, and on-chip voltage booster type LCD (15 × 4)SIO, 8-bit A/D converter, and on-chip voltage booster type LCD (5 × 4)RC oscillation version of the PD789306SIO and on-chip voltage booster type LCD (24 × 4)
64-pin 64-pin 64-pin 64-pin 64-pin 64-pin 52-pin
52-pin SIO and resistance division type LCD (24 × 4)
8-bit A/D converter and on-chip voltage booster type LCD (23 × 4)μμμ
Products under development
Products in mass production Small-scale package, general-purpose applications
78K/0S Series
28-pin
PD789014 with enhanced timer and increased ROM, RAM capacity On-chip UART and capable of low voltage (1.8 V) operation
PD789074 with added subsystem clock
LCD drive
Inverter control
44-pin On-chip inverter controller and UART
USB
On-chip bus controller
Keyless entry
80-pin 80-pin SIO, 8-bit A/D converter, and resistance division type LCD (28 × 4) PD789407A with enhanced A/D converter (10 bits)
44-pin
Small-scale package, general-purpose applications and A/D converter
44-pin 30-pin 30-pin 30-pin 30-pin
30-pin 30-pin PD789167 with enhanced A/D converter (10 bits)
PD789104A with enhanced timer PD789124A with enhanced A/D converter (10 bits)RC oscillation version of the PD789104A PD789104A with enhanced A/D converter (10 bits) PD789026 with added A/D converter and multiplier
PD789104A with added EEPROM TM
PD789146 with enhanced A/D converter (10 bits)
Y Subseries products support SMB.
20-pin 30-pin
44-pin 20-pin
On-chip POC and key return circuit
On-chip CAN controller
For PC keyboard, on-chip USB function
RC oscillation version of the PD78986042-/44-pin 44-pin 30-pin PD789026 with enhanced timer
VFD drive
52-pin
On-chip VFD controller (Display output T otal: 25)
SIO, 10-bit A/D converter, and on-chip voltage booster type LCD (28 × 4)80-pin SIO, 8-bit A/D converter, and resistance division type LCD (28 × 4)80-pin 64-pin For PC keyboard, on-chip USB HUB function
μμμμμμμμμμμμ
μUART and resistance division type LCD (26 × 4)
64-pin 30-pin PD789074 with enhanced timer and increased ROM and RAM capacity μUART , 8-bit A/D converter, and dot LCD (Display output total: 96)
144-pin
UART and dot LCD (40 × 16)
88-pin Meter control
The major functional differences among the subseries are listed below.
Note10-bit timer: 1 channel
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Data Sheet U13917EJ1V1DS
Notes 1.10-bit timer: 1 channel
2.Flash memory version:
3.0 V
Data Sheet U13917EJ1V1DS5
OVERVIEW OF FUNCTIONS
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Data Sheet U13917EJ1V1DS
CONTENTS
1.PIN CONFIGURATION (TOP VIEW) (9)
2.BLOCK DIAGRAM (10)
3.PIN FUNCTIONS (11)
3.1Port Pins (11)
3.2Non-Port Pins (11)
3.3Pin I/O Circuits and Recommended Connection of Unused Pins (12)
4.MEMORY SPACE (13)
5. EEPROM (14)
6.PERIPHERAL HARDWARE FUNCTIONS (15)
6.1Ports (15)
6.2Clock Generator (16)
6.3Timer (17)
6.4Power-On-Clear Circuits (21)
6.5Bit Sequential Buffer (23)
6.6Key Return Circuit (23)
7.INTERRUPT FUNCTIONS (24)
7.1Types of Interrupt Functions (24)
7.2Sources and Configuration of Interrupts (24)
8.STANDBY FUNCTION (26)
9.RESET FUNCTION (26)
10.MASK OPTIONS (27)
11.INSTRUCTION SET SUMMARY (28)
11.1Conventions (28)
11.1.1Operand identifiers and description methods (28)
11.1.2Explanation of operation column (29)
11.1.3Explanation of flags column (29)
11.2List of Operations (30)
12.ELECTRICAL SPECIFICATIONS (35)
13.EXAMPLE OF RC OSCILLATION FREQUENCY CHARACTERISTICS (REFERENCE VALUES) (47)
14.PACKAGE DRAWING (48)
15.RECOMMENDED SOLDERING CONDITIONS (49)
Data Sheet U13917EJ1V1DS7
APPENDIX A. DEVELOPMENT TOOLS (50)
APPENDIX B. RELATED DOCUMENTS (52)
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Data Sheet U13917EJ1V1DS
1.PIN CONFIGURATION (TOP VIEW)
?20-pin plastic SSOP (7.62 mm (300))
μPD789860MC-×××-5A4
μPD789861MC-×××
RESET X1(CL1) X2(CL2)
V SS
IC
V DD
P00
P01
P02
P03P21/TMI
P20/TMO/BSFO P07
P06
P05
P04
P43/KR13
P42/KR12
P41/KR11
P40/KR10
Caution Connect the IC (Internally Connected) pin directly to V66.
Remark Pin connections in parentheses apply to the μPD789861.
BSFO:Bit sequential buffer output RESET:Reset
CL1, CL2:RC oscillator TMI:Timer input
IC:Internally connected TMO:Timer output
KR10 to KR13:Key return V'':Power supply
P00 to P07:Port 0V66:Ground
P20, P21:Port 2X1, X2:Crystal/ceramic oscillator
P40 to P43:Port 4
Data Sheet U13917EJ1V1DS9
Data Sheet U13917EJ1V1DS
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2.BLOCK DIAGRAM
TMO/P20/BSFO
TMI/P21KR13/P43
RESET X1 (CL1)X2 (CL2)
Remark Items in parentheses apply to the μPD789861.
Data Sheet U13917EJ1V1DS
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3.PIN FUNCTIONS
3.1
Port Pins
Pin Name I/O Function
After Reset Alternate Function P00 to P07
I/O
Port 0
8-bit I/O port
Input/output can be specified in 1-bit units.Input
–
P20TMO/BSFO P21I/O Port 2
2-bit I/O port
Input/output can be specified in 1-bit units.
Input TMI
P40 to P43
Input Port 4
4-bit input-only port.
An on-chip pull-up resistor can be specified by the mask option.
Input KR10 to KR13
3.2Non-Port Pins
Notes 1.μPD789860 only.
2.μPD789861 only.
3.3Pin I/O Circuits and Recommended Connection of Unused Pins
The I/O circuit type for each pin and recommended connections of unused pins are shown in Table 3-1.
For the I/O circuit configuration of each type, refer to Figure 3-1.
Table 3-1. Types of Pin I/O Circuits and Recommended Connection of Unused Pins
Figure 3-1. Pin I/O Circuits
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Data Sheet U13917EJ1V1DS
4.MEMORY SPACE
The μPD789860 and μPD789861 can each access a 64 KB memory space. Figure 4-1 shows the memory map.
Figure 4-1. Memory Map
Data Sheet U13917EJ1V1DS13
5. EEPROM
Besides internal high-speed RAM, the μPD789860 and μPD789861 have 32 × 8 bits of electrically erasable PROM (EEPROM) on-chip as data memory.
Unlike normal RAM, EEPROM can maintain its contents even if its power supply is cut. In addition, unlike EPROM, its electrical contents can be erased without using ultraviolet rays.
Figure 5-1. EEPROM Block Diagram
/28 Remark f&/.: f; or f&&
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Data Sheet U13917EJ1V1DS
Data Sheet U13917EJ1V1DS
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6.PERIPHERAL HARDWARE FUNCTIONS
6.1
Ports
The μPD789860 and μPD789861 are provided with the ports shown in Table 6-1, by which many kinds of control are possible. Moreover, these have a variety of alternate functions besides their functions as digital I/O ports. Refer to 3 PIN FUNCTIONS for details of the alternate functions.
Table 6-1. Port Functions
Name Pin Name Function
Port 0P00 to P07I/O port. Input/output can be specified in 1-bit units.Port 2P20, P21I/O port. Input/output can be specified in 1-bit units.
Port 4
P40 to P43
Input-only port. Use of an on-chip pull-up resistor can be specified by the mask option.
Figure 6-1. Basic Configuration of CMOS Port
Caution Figure 6-1 is the basic configuration of a CMOS I/O port. The configuration varies according to
the functions of alternate-function pins.
Remarks PMmn:Bit n of port mode register m (m = 0, 2 n = 0 to 7)
Pmn:Bit n of port m (m = 0, 2 n = 0 to 7)RD:Port read signal WR:
Port write signal
Pmn
6.2Clock Generator
The clock generator specifications differ as follows for the μPD789860 and μPD789861.
?Ceramic/crystal oscillation: μPD789860
Oscillates at frequency from 1.0 to 5.0 MHz. Minimum instruction execution time can be switched between 0.4μs and 1.6 μs (@ 5.0 MHz operation).
?RC oscillation: μPD789861
Oscillates at frequency of 1.0 MHz ±15%. Minimum instruction execution time can be switched between 2.0 μs and 8.0 μs (@ 1.0 MHz operation).
Figure 6-2. Clock Generator Block Diagram
X1
X2
CPU clock
(f CPU)
Remark Items in the parentheses apply to the RC oscillation version (μPD789861).
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Data Sheet U13917EJ1V1DS
6.3Timer
Three channels of timers are incorporated.
?8-bit timer: 2 channels
?Watchdog timer: 1 channel
Table 6-2. Timer Operation
Data Sheet U13917EJ1V1DS17
Figure 6-5. Block Diagram of Output Controller (Timer 40)
TMO/P20/
BSFO
Carrier clock
(in carrier generator mode)
or timer 40 output signal
(in other than carrier generator mode)
Figure 6-6. Watchdog Timer Block Diagram
INTWDT
maskable
interrupt request
RESET
INTWDT
non-maskable
interrupt request Remark f&/.: f; or f&&
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Data Sheet U13917EJ1V1DS