KMM5328000CK/CKG & KMM5328100CK/CKG with Fast Page Mode 8M x 32 DRAM SIMM using 4Mx4, 4K/2K Refresh, 5V
The Samsung KMM53280(1)00CK is a 8Mx32bits Dynamic RAM high density memory module. The Samsung KMM53280(1)00CK consists of sixteen CMOS 4Mx4bits DRAMs in 24-pin SOJ package mounted on a 72-pin glass-epoxy substrate. A 0.1 or 0.22uF decoupling capacitor is mounted on the printed circuit board for each DRAM. The KMM53280(1)00CK is a Single In-line Memory Module with edge connections and is intended for mounting into 72 pin edge connector sockets.
? Part Identification
- KMM5328000CK(4096 cycles/64ms Ref, SOJ, Solder) - KMM5328000CKG(4096 cycles/64ms Ref, SOJ, Gold) - KMM5328100CK(2048 cycles/32ms Ref, SOJ, Solder) - KMM5328100CKG(2048 cycles/32ms Ref, SOJ, Gold)? Fast Page Mode Operation ? CAS-before-RAS refresh capability ? RAS-only and Hidden refresh capability ? TTL compatible inputs and outputs ? Single +5V ±10% power supply ? JEDEC standard PDPin & pinout
? PCB : Height(1000mil), double sided component
GENERAL DESCRIPTION
FEATURES
PERFORMANCE RANGE
Speed t RAC
t CAC
t RC
-550ns 13ns 90ns -6
60ns
15ns
110ns
PIN NAMES
Pin Name Function
A0 - A11Address Inputs(4K Ref)A0 - A10Address Inputs(2K Ref)DQ0 - DQ31Data In/Out W
Read/Write Enable RAS0, RAS1Row Address Strobe CAS0 - CAS3Column Address Strobe PD1 -PD4Presence Detect Vcc Power(+5V)Vss Ground NC
No Connection
PRESENCE DETECT PINS (Optional)
* Pin connection changing available
Pin 50NS 60NS PD1PD2PD3PD4
NC Vss Vss Vss
NC Vss NC NC
PIN CONFIGURATIONS
Pin 123456789101112131415161718192021222324252627282930313233343536
Symbol V SS DQ0DQ16DQ1DQ17DQ2DQ18DQ3DQ19Vcc NC A0A1A2A3A4A5A6A10DQ4DQ20DQ5DQ21DQ6DQ22DQ7DQ23A7A11Vcc A8A9RAS1RAS0NC NC
Pin 373839404142434445464748495051525354555657585960616263646566676869707172
Symbol NC NC Vss CAS0CAS2CAS3CAS1RAS0RAS1NC W NC DQ8DQ24DQ9DQ25DQ10DQ26DQ11DQ27DQ12DQ28Vcc DQ29DQ13DQ30DQ14DQ31DQ15NC PD1PD2PD3PD4NC Vss
* NOTE : A11 is used for only KMM5328000CK/CKG (4K ref.)
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
FUNCTIONAL BLOCK DIAGRAM
DQ1DQ2
DQ3DQ4CAS
RAS
OE
W A0-Vcc Vss
.1 or .22uF Capacitor for each DRAM
To all DRAMs
A11(A10)DQ1 DQ2DQ3
DQ4CAS
RAS OE
W
A0-A11(A10)DQ1DQ2DQ3DQ4CAS RAS
OE
W
A0-A11(A10)DQ1
DQ2
DQ3
DQ4 CAS RAS OE
W
A0-A11(A10)
W
A0-A11(A10)
DQ1
DQ2DQ3DQ4CAS
RAS
OE
W A0-A11(A10)DQ1
DQ2
DQ3
DQ4CAS RAS OE
W A0-A11(A10)DQ1DQ2
DQ3DQ4
CAS RAS
OE
W A0-A11(A10)DQ1
DQ2
DQ3
DQ4CAS RAS OE
W
A0-A11(A10)DQ1DQ2DQ3DQ4CAS
RAS
OE
W A0-A11(A10)DQ1
DQ2
DQ3
DQ4CAS RAS OE
W A0-A11(A10)DQ1DQ2DQ3DQ4
CAS RAS
OE
W A0-A11(A10)DQ1
DQ2
DQ3
DQ4CAS RAS OE
W
A0-A11(A10)DQ1DQ2DQ3DQ4CAS
RAS
OE
W A0-A11(A10)DQ1
DQ2
DQ3
DQ4CAS RAS OE
W A0-A11(A10)DQ1
DQ2
DQ3DQ4
CAS RAS OE
W A0-A11(A10)DQ1
DQ2
DQ3
DQ4CAS RAS OE
W
A0-A11(A10)DQ0-DQ3
DQ4-DQ7
DQ8-DQ11
DQ12-DQ15
DQ16-DQ19
DQ20-DQ23
DQ24-DQ27
DQ28-DQ31
RAS1
CAS0
RAS0
CAS1
CAS2
CAS3
U0U1U2U3
U4U5
U6U7U8U9U10U11U12U13U14U15