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MAX4747EUD+T中文资料

General Description

The MAX4747–MAX4750 low-voltage, quad single-pole single-throw (SPST)/dual single-pole/double-throw (SPDT) analog switches operate from a single +2V to +11V supply and handle rail-to-rail analog signals.These switches exhibit low leakage current (0.1nA) and consume less than 0.5nW (typ) of quiescent power,making them ideal for battery-powered applications.When powered from a +3V supply, these switches fea-ture 50?(max) on-resistance (R ON ), with 3.5?(max)matching between channels and 9?(max) flatness over the specified signal range.

The MAX4747 has four normally open (NO) switches, the MAX4748 has four normally closed (NC) switches, and the MAX4749 has two NO and two NC switches. The MAX4750 has two SPDT switches. These switches are available in 14-pin TSSOP, 16-pin thin QFN (4mm x 4mm), and 16-bump chip-scale packages (UCSP?). This tiny chip-scale package occupies a 2mm ?2mm area and significantly reduces the required PC board area.

Applications

Battery-Powered Systems Audio/Video-Signal Routing

Low-Voltage Data-Acquisition Systems Cell Phones

Communications Circuits Glucose Meters PDAs

Features

o 2mm ?2mm UCSP

o Guaranteed On-Resistance (R ON )

25?(max) at +5V 50?(max) at +3V

o On-Resistance Matching

3?(max) at +5V 3.5?(max) at +3V

o Guaranteed < 0.1nA Leakage Current at T A = +25°C

o Single-Supply Operation from +2.0V to +11V o TTL/CMOS-Logic Compatible o -84dB Crosstalk (1MHz)o -72dB Off-Isolation (1MHz)

o Low Power Consumption: 0.5nW (typ)o Rail-to-Rail Signal Handling

MAX4747–MAX4750

50?,Low-Voltage, Quad SPST/Dual SPDT Analog

Switches in UCSP

________________________________________________________________Maxim Integrated Products

Ordering Information

19-2646; Rev 2; 12/06

For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at https://www.wendangku.net/doc/0f15309277.html,.

Pin Configurations/Truth Tables

UCSP is a trademark of Maxim Integrated Products, Inc.

Ordering Information continued at end of data sheet.*EP = Exposed paddle.

M A X 4747–M A X 4750

Switches in UCSP 2_______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS —Single +3V Supply

(V+ = +3V ±10%, V IH = +2.0V, V IL = +0.8V, T A = T MIN to T MAX , unless otherwise noted. Typical values are at V+ = +3V, T A = +25°C.)(Notes 3, 4)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

(All voltages referenced to GND.)

V+...........................................................................-0.3V to +12V IN_, COM_, NO_, NC_ (Note 1)....................-0.3V to (V+ + 0.3V)Continuous Current (any pin)...........................................±10mA Peak Current (any pin, pulsed at 1ms, 10% duty cycle)...±20mA Continuous Power Dissipation (T A = +70°C)

14-Pin TSSOP (derate 6.3mW/°C above +70°C).........500mW 16-Pin Thin QFN (derate 16.9mW/°C above +70°C).....1349mW 16-Bump UCSP (derate 8.3mW/°C above +70°C)......659mW

Operating Temperature Range...........................-40°C to +85°C Storage Temperature Range.............................-65°C to +150°C Maximum Junction Temperature.....................................+150°C Bump Temperature (soldering)

Infrared (15s)...............................................................+220°C Vapor Phase (60s).......................................................+215°C Lead Temperature (soldering, 10s).................................+300°C

Note 1:Signals on IN_, NO_, NC_, or COM_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to

maximum current rating.

MAX4747–MAX4750

Switches in UCSP

_______________________________________________________________________________________3

ELECTRICAL CHARACTERISTICS —Single +3V Supply (continued)

(V+ = +3V ±10%, V IH = +2.0V, V IL = +0.8V, T A = T MIN to T MAX , unless otherwise noted. Typical values are at V+ = +3V, T A = +25°C.)(Notes 3, 4)

M A X 4747–M A X 4750

Switches in UCSP 4_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS —Single +5V Supply

MAX4747–MAX4750

Switches in UCSP

_______________________________________________________________________________________5

Note 3:

The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in this data sheet.

Note 4:UCSP parts are 100% tested at +25°C only, and are guaranteed by design over temperature. TSSOP and Thin QFN parts

are 100% tested at +85°C and guaranteed by design over temperature.

Note 5:?R ON = R ON(MAX)- R ON(MIN).

Note 6:UCSP and Thin QFN on-resistance matching between channels is guaranteed by design.

Note 7:Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the

specified analog signal range.

Note 8:Guaranteed by design.

Note 9:Off-isolation = 20 log 10(V NO_/V COM_), V NO_= output, V COM_= input to off switch.Note 10:Between any two switches.

ELECTRICAL CHARACTERISTICS —Single +5V Supply (continued)

(V+ = +5V ±10%, V IH = +2.0V, V IL = +0.8V, T A = T MIN to T MAX , unless otherwise noted. Typical values are at V+ = +5V, T A = +25°C.)(Notes 3, 4)

Typical Operating Characteristics

(T A = +25°C, unless otherwise noted.)

ON-RESISTANCE vs. V COM

V COM (V)

R O N (?)

ON-RESISTANCE vs. V COM

V COM (V)

R O N (?)

1216

ON-RESISTANCE vs. V COM

V COM (V)

R O N (?)

2.5

2.0

1.51.0

0.5

1520253000

3.0

M A X 4747–M A X 4750

Switches in UCSP 6_______________________________________________________________________________________

ON-RESISTANCE vs. V COM

V COM (V)

R O N (?)

2.01.51.0

0.5

510

1520253000

2.5

SUPPLY CURRENT vs. TEMPERATURE

TEMPERATURE (°C)

S U P P L Y C U R R E N T (p A

)

-15

100

100010,000

0.1-40

100

0.01

-40

-15

LEAKAGE vs. TEMPERATURE

0.1

TEMPERATURE (°C)

L E A K A G E C U R R E N T (p A )

IN LOGIC THRESHOLD vs. SUPPLY VOLTAGE

SUPPLY VOLTAGE (V)

L O G I C T H R E S H O L D (V )

108

0.51.01.52.02.53.03.54.0

0.01

0.11101001000

-10-20-30-40-50-60-70-80-90-100-110

FREQUENCY RESPONSE

FREQUENCY (MHz)

G A I N (d B )/P H A S E (D E G R E E S )

Typical Operating Characteristics (continued)

(T A = +25°C, unless otherwise noted.)

CHARGE INJECTION vs. V COM

V COM (V)

C H A R G E (p C )

2030405060

TURN-ON/OFF TIME vs. TEMPERATURE

TEMPERATURE (°C)

T U R N -O N /O F F T I M E (n s )

-15

10203040506070800-40

TURN-ON/OFF TIME vs. SUPPLY VOLTAGE

SUPPLY VOLTAGE (V)

T U R N -O N /O F F T I M E (n s )

204060

80100120

TOTAL HARMONIC DISTORTION

vs. FREQUENCY

FREQUENCY (kHz)

T H D (%)

0.1

0.01

0.11

0.001

0.01

100

MAX4747–MAX4750

Switches in UCSP

_______________________________________________________________________________________7

Pin Description—UCSP

M A X 4747–M A X 4750

Switches in UCSP 8_______________________________________________________________________________________

MAX4747–MAX4750

Switches in UCSP

_______________________________________________________________________________________9

Applications Information

Operating Considerations for

High-Voltage Supply

The MAX4747–MAX4750 operate to +11V with some precautions. The absolute maximum rating for V+ is +12V (referenced to GND). When operating near this region, bypass V+ with a minimum 0.1μF capacitor to ground as close to the IC as possible.

Logic Levels

The MAX4747–MAX4750 are TTL compatible when powered from a single +3V supply. When powered from other supply voltages, the logic inputs should be driven rail-to-rail. For example, with a +11V supply, IN_ should be driven low to 0V and high to 11V. With a +3.3V sup-ply, IN_ should be driven low to 0V and high to 3.3V.Driving IN_ rail-to-rail minimizes power consumption.

Analog Signal Levels

Analog signals that range over the entire supply volt-age (GND to V+) pass with very little change in R ON (see the Typica l Opera ting Cha ra cteristics ). The bidi-rectional switches allow NO_, NC_, and COM_ connec-tions to be used as either inputs or outputs.

Power-Supply Sequencing and

Overvoltage Protection

CAUTION: Do not exceed the absolute maximum ratings. Stresses beyond the listed ratings can cause permanent damage to the devices.

Proper power-supply sequencing is recommended for all CMOS devices. Always apply V+ before applying analog signals, especially if the analog signal is not current limited. If this sequencing is not possible, and if the analog inputs are not current limited to < 20mA, add small-signal diode D1 as shown in Figure 1. If the ana-log signal can dip below GND, add D2. Adding protec-tion diodes reduces the analog signal range to a diode drop (about 0.7V) below V+ (for D1), and to a diode drop above ground (for D2). Leakage is unaffected by adding the diodes. On-resistance increases slightly at low supply voltages. Maximum supply voltage (V+) must not exceed +11V.

Adding protection diodes causes the logic thresholds to be shifted relative to the power-supply rails. The most significant shift occurs when using low supply voltages (+5V or less). With a +5V supply, TTL compatibility is not guaranteed when protection diodes are added.Driving IN_ and IN_ all the way to the supply rails (i.e., to a diode drop higher than the V+ pin, or to a diode drop lower than the GND pin) is always acceptable.

Protection diodes D1 and D2 also protect against some overvoltage situations. Using the circuit in Figure 1, no damage results if the supply voltage is below the absolute maximum rating (+12V) and if a fault voltage up to the absolute maximum rating (V+ + 0.3V) is applied to an analog signal terminal.

UCSP Applications Information

For the latest application details on UCSP construction,dimensions, tape carrier information, PC board tech-niques, bump-pad layout, and recommended reflow temperature profile, as well as the latest information on reliability testing results, refer to the Application Note:UCSP —A Wafer-Level Chip-Scale Package on Maxim ’s web site at https://www.wendangku.net/doc/0f15309277.html,/ucsp.

Figure 1. Overvoltage Protection Using External Blocking Diodes

M A X 4747–M A X 4750

Switches in UCSP 10

______________________________________________________________________________________

Test Circuits/Timing Diagrams (continued)

Figure 2. Switching Time

Figure 3. Break-Before-Make Interval

Figure 4. Charge Injection

MAX4747–MAX4750

Switches in UCSP

______________________________________________________________________________________11

Figure 5. Off-Isolation/On-Channel Bandwidth

Figure 6. Crosstalk

Figure 7. Channel Off-/On-Capacitance

Chip Information

TRANSISTOR COUNT: 130PROCESS: CMOS

Test Circuits/Timing Diagrams (continued)

Ordering Information (continued)

*EP = Exposed paddle.

M A X 4747–M A X 4750

Switches in UCSP

Pin Configurations/Truth Tables (continued)

MAX4747–MAX4750

Switches in UCSP

______________________________________________________________________________________13

Package Information

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to https://www.wendangku.net/doc/0f15309277.html,/packages .)

M A X 4747–M A X 4750

Switches in UCSP

Package Information (continued)

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to https://www.wendangku.net/doc/0f15309277.html,/packages .)

Package Information (continued)

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to https://www.wendangku.net/doc/0f15309277.html,/packages.)MAX4747–MAX4750

Switches in UCSP

Ma xim ca nnot a ssume responsibility for use of a ny circuitry other tha n circuitry entirely embodied in a Ma xim product. No circuit pa tent licenses a re implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________15

?2006 Maxim Integrated Products

is a registered trademark of Maxim Integrated Products, Inc.

Revision History Pages changed at Rev 2: 1, 2, 8, 9, 11, 13, 14, 15