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CDCLVC1112PW;中文规格书,Datasheet资料

GND

CLKIN Y1

VDD

GND

Y11

GND

Y6Y7

VDD Y8

GND

GND Y10

VDD

CLKIN

CDCLVC11xx

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3.3V and2.5V LVCMOS High-Performance Clock Buffer Family

Check for Samples:CDCLVC11xx

FEATURES?Operating Temperature Range:–40°C to85°C ?High-Performance1:2,1:3,1:4,1:6,1:8,1:10,?Available in8-,14-,16-,20-,24-Pin TSSOP 1:12LVCMOS Clock Buffer Family Package(all pin compatible)

?Very Low Pin-to-Pin Skew<50ps

APPLICATIONS

?Very Low Additive Jitter<100fs

?General Purpose Communication,Industrial ?Supply Voltage:3.3V or2.5V and Consumer Applications

?f max=250MHz for3.3V

f max=180MHz for2.5V

DESCRIPTION

The CDCLVC11xx is a modular,high-performance,low-skew,general purpose clock buffer family from Texas Instruments.

The whole family is designed with a modular approach in mind.It is intended to round up TI's series of LVCMOS clock generators.

There are7different fan-out variations,1:2to1:12,available.All of the devices are pin compatible to each other for easy handling.

All family members share the same high performing characteristics like low additive jitter,low skew,and wide operating temperature range.

The CDCLVC11xx supports an asynchronous output enable control(1G)which switches the outputs into a low state when1G is low.Also,versions with synchronized enable control for glitch free switching and three-state outputs are planned in future device options.

The CDCLVC11xx operate in a2.5V and3.3V environment and are characterized for operation from–40°C to 85°C.

Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.Copyright?2010,Texas Instruments Incorporated Products conform to specifications per the terms of the Texas

Instruments standard warranty.Production processing does not

necessarily include testing of all parameters.

1G GND CLKIN Y 1Y 2VDD VDD Y 3Y 4VDD

GND Y 0Y 5

GND

1G GND CLKIN Y 1Y 2VDD VDD Y 3Y 4VDD GND Y 0Y 5GND Y 6Y

1G GND CLKIN Y1Y2VDD VDD Y3Y 4VDD GND Y 0Y5GND Y 6Y7Y 9VDD Y8GND

Y 1NC

VDD NC Y

Y 1Y 2

VDD Y 3Y Y 1Y 2VDD

NC Y

1G GND CLKIN Y1Y2VDD VDD Y3Y 4VDD GND Y 0Y11Y5GND Y 6Y7Y 9VDD Y8GND GND Y10VDD

CDCLVC11xx

SCAS895–MAY 2010

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These devices have limited built-in ESD protection.The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

PACKAGE OPTIONS

PIN FUNCTIONS

LVCMOS CLOCK OUTPUT

SUPPLY LVCMOS CLOCK OUTPUT

GROUND CLOCK INPUT

ENABLE

VOLTAGE

DEVICES CLKIN 1G Y0,Y1,…Y11

V DD GND CDCLVC1102123,864CDCLVC1103123,8,564CDCLVC1104123,8,5,764CDCLVC1106123,14,11,13,6,95,8,124,7,10CDCLVC1108123,16,13,15,6,11,8,95,10,144,7,12CDCLVC1110123,20,17,19,6,15,8,13,105,9,14,184,7,11,16CDCLVC1112

3,24,21,23,6,19,8,17,16,10,14,12

5,9,13,18,22

4,7,11,15,20

OUTPUT LOGIC TABLE

INPUTS

OUTPUTS

CLKIN 1G Yn X L L L H L H

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ABSOLUTE MAXIMUM RATINGS(1)

over operating free-air temperature range(unless otherwise noted)

VALUE/UNIT

V DD Supply voltage range–0.5V to4.6V

V IN Input voltage range(2)–0.5V to V DD+0.5V

V O Output voltage range(2)–0.5V to V DD+0.5V

I IN Input current±20mA

I O Continuous output current±50mA

T J Maximum junction temperature125°C

T ST Storage temperature range–65°C to150°C

(1)Stresses beyond those listed under"absolute maximum ratings"may cause permanent damage to the device.These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under"recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)This value is limited to4.6V maximum.

THERMAL INFORMATION

DCDLVC1102/03/04CDCLVC1106CDCLVC1108CDCLVC11010CDCLVC1112 THERMAL METRIC(1)PW PW PW PW PW UNITS

8PINS14PINS16PINS20PINS24PINS

q JA Junction-to-ambient thermal resistance(2)149.4112.6108.483.087.9

°C/W q JC(top)Junction-to-case(top)thermal resistance(3)69.448.033.632.326.5

(1)For more information about traditional and new thermal metrics,see the IC Package Thermal Metrics application report,SPRA953.

(2)The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard,high-K board,as

specified in JESD51-7,in an environment described in JESD51-2a.

(3)The junction-to-case(top)thermal resistance is obtained by simulating a cold plate test on the package top.No specific

JEDEC-standard test exists,but a close description can be found in the ANSI SEMI standard G30-88.

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range(unless otherwise noted)

MIN NOM MAX UNIT

3.3V supply 3.0 3.3 3.6

V DD Supply voltage range V

2.5V supply 2.3 2.5 2.7

V DD=3.0V to3.6V V DD/2–600

V IL Low-level input voltage mV

V DD=2.3V to2.7V V DD/2–400

V DD=3.0V to3.6V V DD/2+600

V IH High-level input voltage mV

V DD=2.3V to2.7V V DD/2+400

V th Input threshold voltage V DD=2.3V to3.6V V DD/2mV

t r/t f Input slew rate14V/ns

V DD=3.0V to3.6V 1.8

Minimum pulse width at

t w ns CLKIN V

=2.3V to2.7V 2.75

V DD=3.0V to3.6V DC250 LVCMOS clock Input

f CLK MHz

Frequency V

=2.3V to2.7V DC180

T A Operating free-air temperature–4085°C

Product Folder Link(s):CDCLVC11xx

CDCLVC11xx

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DEVICE CHARACTERISTICS

over recommended operating free-air temperature range(unless otherwise noted)

PARAMETER CONDITION MIN TYP(1)MAX UNIT OVERALL PARAMETERS FOR ALL VERSIONS

1G=V DD;CLKIN=0V or V DD;I O=0mA;V DD=3.6V610mA

I DD Static device current(2)

1G=V DD;CLKIN=0V or V DD;I O=0mA;V DD=2.7V36mA

I PD Power down current1G=0V;CLKIN=0V or V DD;I O=0mA;V DD=3.6V or2.7V60μA

V DD=3.3V;f=10MHz6pF Power dissipation capacitance

C PD

per output(3)V

=2.5V;f=10MHz 4.5pF

Input leakage current at1G±8

I I V I=0V or V DD,V DD=3.6V or2.7VμA

Input leakage current at CLKIN±25

V DD=3.3V45Ω

R OUT Output impedance

V DD=2.5V60Ω

V DD=3.0V to3.6V DC250MHz f OUT Output frequency

V DD=2.3V to2.7V DC180MHz OUTPUT PARAMETERS FOR V DD=3.3V±0.3V

V DD=3V,I OH=–0.1mA 2.9

V OH High-level output voltage V DD=3V,I OH=–8mA 2.5V

V DD=3V,I OH=–12mA 2.2

V DD=3V,I OL=0.1mA0.1

V OL Low-level output voltage V DD=3V,I OL=8mA0.5V

V DD=3V,I OL=12mA0.8

t PLH,

Propagation delay CLKIN to Yn0.8 2.0ns

t PHL

t sk(o)Output skew Equal load of each output50ps

t r/t f Rise and fall time20%–80%(V OH-V OL)0.30.8ns

t DIS Output disable time1G to Yn6ns

t EN Output enable time1G to Yn6ns

Pulse skew;

t sk(p)To be measured with input duty cycle of50%180ps t PLH(Yn)–t PHL(Yn)(4)

t sk(pp)Part-to-part skew Under equal operating conditions for two parts0.5ns

t jitter Additive jitter rms12kHz…20MHz,f OUT=250MHz100fs

(1)All typical values are at respective nominal V DD.For switching characteristics,outputs are terminated to50Ωto V DD/2(see Figure1).

(2)For dynamic I DD over frequency see Figure8and Figure9.

(3)This is the formula for the power dissipation calculation(see Figure8and the Power Consideration section).

P tot=P stat+P dyn+P Cload[W]

P stat=V DD×I DD[W]

P dyn=C PD×V DD2×?[W]

P Cload=C load×V DD2×?×n[W]

n=Number of switching output pins

(4)t sk(p)depends on output rise-and fall-time(t r/t f).The output duty-cycle can be calculated:odc=(t w(OUT)±t sk(p))/t period;t w(OUT)is

pulse-width of output waveform and tperiod is1/f OUT.

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DEVICE CHARACTERISTICS(continued)

over recommended operating free-air temperature range(unless otherwise noted)

PARAMETER CONDITION MIN TYP(1)MAX UNIT OUTPUT PARAMETERS FOR V DD=2.5V±0.2V

V DD=2.3V,I OH=–0.1mA 2.2

V OH High-level output voltage V

V DD=2.3V,I OH=–8mA 1.7

V DD=2.3V,I OL=0.1mA0.1

V OL Low-level output voltage V

V DD=2.3V,I OL=8mA0.5

t PLH,

Propagation delay CLKIN to Yn 1.0 2.6ns

t PHL

t sk(o)Output skew Equal load of each output50ps

t r/t f Rise and fall time20%–80%reference point0.3 1.2ns

t DIS Output disable time1G to Yn10ns

t EN Output enable time1G to Yn10ns

Pulse skew;

t sk(p)To be measured with input duty cycle of50%220ps t PLH(Yn)–t PHL(Yn)(5)

t sk(pp)Part-to-part skew Under equal operating conditions for two parts 1.2ns

t jitter Additive jitter rms12kHz…20MHz,f OUT=180MHz350fs (5)t sk(p)depends on output rise-and fall-time(t r/t f).The output duty-cycle can be calculated:odc=(t w(OUT)±t sk(p))/t period;t w(OUT)is

pulse-width of output waveform and tperiod is1/f OUT.

Product Folder Link(s):CDCLVC11xx

R=50W

from Measurement Equipment

V /2

V = 3.3 V or 2.5 V

Y n+1

Y n

CDCLVC11xx

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PARAMETERS MEASUREMENT INFORMATION

Figure 1.Test Load Circuit

Figure 2.Application Load With 50ΩLine Termination

Figure 3.Application Load With Series Line Termination

Figure 4.t DIS and t EN for Disable Low Figure 5.Output Skew t sk(o)

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Y n

OL CLKIN

Y n

CLKIN

Note:sk (p)PLH PHL CDCLVC11xx

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SCAS895–MAY 2010

PARAMETERS MEASUREMENT INFORMATION (continued)

Figure 6.Pulse Skew t sk(p)and Propagation Delay

Figure 7.Rise/Fall Times t r /t f

t PLH /t PHL

TYPICAL CHARACTERISTICS

Power Consideration

The following power consideration refers to the device-consumed power consumption only.The device power consumption is the sum of static power and dynamic power.The dynamic power usage consists of two components:

1.Power used by the device as it switches states.

2.Power required to charge any output load.

The output load can be capacitive only or capacitive and resistive.The following formula and the power graphs in Figure 8and Figure 9can be used to obtain the power consumption of the device:

P dev =P stat +n (P dyn +P Cload )P stat =V DD x I DD

P dyn +P Cload =see Figure 8and Figure 9where:

V DD =Supply voltage (3.3V or 2.5V)

I DD =Static device current (typ 6mA for V DD =3.3V;typ 3mA for V DD =2.5V)n =Number of switching output pins

Example for Device Power Consumption for CDCLVC1104:4outputs are switching,f =120MHz,V DD =3.3V and C load =2pF per output:

P dev =P stat +n (P dyn +P Cload )=19.8mW +40mW =59.8mW P stat =V DD x I DD =6mA x 3.3V =19.8mW n (P dyn +P Cload )=4x 10mW =40mW

NOTE

For dimensioning the power supply,the total power consumption needs to be considered.The total power consumption is the sum of the device power consumption and the power consumption of the load.

Product Folder Link(s):CDCLVC11xx

f - Clock Frequency - MHz

D e v i c e P o w e r C o n s u m p t i o n - m

f - Clock Frequency - MHz

D e v i c e P o w e r C o n s u m p t i o n - m W

f - Clock Frequency - MHz

I - D y n a m i c S u p p l y C u r r e n t - m A

d y

n 0

f - Clock Frequency - MHz

I - D y n a m i c S u p p l y C u r r e n t - m A

d y n CDCLVC11xx

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TYPICAL CHARACTERISTICS (continued)

Figure 8.Device Power Consumption vs Clock Frequency

Figure 9.Device Power Consumption vs Clock Frequency

(Load 50Ωinto V DD /2.2pF,8pF;Per Output)

Figure 10.Dynamic Supply Current vs Clock Frequency

Figure 11.Dynamic Supply Current vs Clock Frequency

(C PD =6pF,No Load;Per Output)(C PD =4.5pF,No Load;Per Output)

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PACKAGING INFORMATION

Orderable Device Status (1)Package Type Package

Drawing Pins Package Qty Eco Plan (2)Lead/

Ball Finish

MSL Pea

CDCLVC1102PW ACTIVE TSSOP PW8150Green (RoHS

& no Sb/Br)

CU NIPDAU Level-1-260C

CDCLVC1102PWR ACTIVE TSSOP PW82000Green (RoHS

& no Sb/Br)

CU NIPDAU Level-1-260C

CDCLVC1103PW ACTIVE TSSOP PW8150Green (RoHS

& no Sb/Br)

CU NIPDAU Level-1-260C

CDCLVC1103PWR ACTIVE TSSOP PW82000Green (RoHS

& no Sb/Br)

CU NIPDAU Level-1-260C

CDCLVC1104PW ACTIVE TSSOP PW8150Green (RoHS

& no Sb/Br)

CU NIPDAU Level-1-260C

CDCLVC1104PWR ACTIVE TSSOP PW82000Green (RoHS

& no Sb/Br)

CU NIPDAU Level-1-260C

CDCLVC1106PW ACTIVE TSSOP PW1490Green (RoHS

& no Sb/Br)

CU NIPDAU Level-1-260C

CDCLVC1106PWR ACTIVE TSSOP PW142000Green (RoHS

& no Sb/Br)

CU NIPDAU Level-1-260C

CDCLVC1108PW ACTIVE TSSOP PW1690Green (RoHS

& no Sb/Br)

CU NIPDAU Level-1-260C

CDCLVC1108PWR ACTIVE TSSOP PW162000Green (RoHS

& no Sb/Br)

CU NIPDAU Level-1-260C

CDCLVC1110PW ACTIVE TSSOP PW2070Green (RoHS

& no Sb/Br)

CU NIPDAU Level-1-260C

CDCLVC1110PWR ACTIVE TSSOP PW202000Green (RoHS

& no Sb/Br)

CU NIPDAU Level-1-260C

CDCLVC1112PW ACTIVE TSSOP PW2460Green (RoHS

& no Sb/Br)

CU NIPDAU Level-1-260C

CDCLVC1112PWR ACTIVE TSSOP PW242000Green (RoHS

& no Sb/Br)

CU NIPDAU Level-1-260C

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

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(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.t

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable fo

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package,

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retard

in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate inf

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical an TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for releas

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Cu

分销商库存信息: TI

CDCLVC1112PW