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RF1K49223中文资料

RF1K49223

2.5A, 30V , 0.150 Ohm, Dual P-Channel LittleFET? Power MOSFET

The RF1K49223 Dual P-Channel power MOSFET is

manufactured using an advanced MegaFET process. This process, which uses feature sizes approaching those of LSI integrated circuits, gives optimum utilization of silicon,

resulting in outstanding performance. It is designed for use in applications such as switching regulators, switching

converters, motor drivers, relay drivers, and low voltage bus switches. This device can be operated directly from integrated circuits.

Formerly developmental type TA49223.

Features

? 2.5A,

30V ?r DS(ON) = 0.150?

?Temperature Compensating PSPICE ? Model ?Thermal Impedance PSPICE Model ?Peak Current vs Pulse Width Curve ?UIS Rating Curve

?Related Literature

-TB334 “Guidelines for Soldering Surface Mount Components to PC Boards”

Symbol

Packaging

JEDEC MS-012AA

Ordering Information

PART NUMBER PACKAGE BRAND

RF1K49223

MS-012AA

RF1K49223

NOTE:When ordering, use the entire part number. For ordering in tape and reel, add the suffix 96 to the part number, i.e. RF1K4922396.

G1(2)

D1(8)S1(1)D1(7)

D2(6)D2(5)

S2(3)G2(4)

BRANDING DASH

Data Sheet

January 2002

元器件交易网https://www.wendangku.net/doc/1f1899668.html,

Absolute Maximum Ratings T A= 25o C Unless Otherwise Specified

RF1K49223UNITS Drain to Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V DSS-30V Drain to Gate Voltage (R GS = 20k?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V DGR-30V Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V GS±20V Drain Current

Continuous (Pulse Width = 5s). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I D Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I DM

2.5

Refer to Peak Current Curve

Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E AS Refer to UIS Curve

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P D Derate Above 25o C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

0.016

W/o C

Operating and Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T J, T STG-55 to 150o C Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T L Package Body for 10s, See Techbrief 334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T pkg 300

260

o C

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1.T J = 25o C to 125o C.

Electrical Specifications T A = 25o C, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BV DSS I D = 250μA, V GS = 0V, (Figure 12)-30--V Gate to Source Threshold Voltage V GS(TH)V GS = V DS, I D = 250μA, (Figure 11)-1--3V

Zero Gate Voltage Drain Current I DSS V DS = -30V,

V GS = 0V T A = 25o C---1μA T A = 150o C---50μA

Gate to Source Leakage Current I GSS V GS = ±20V--±100nA

Drain to Source On Resistance r DS(ON)I D = 2.5A,

(Figure 9, 10) V GS = -10V--0.150? V GS = -4.5V--0.360?

Turn-On Time t ON V DD = -15V, I D? 2.5A,

R L = 6?, V GS = -10V,

R GS = 25?--40ns

Turn-On Delay Time t d(ON)-9-ns Rise Time t r-19-ns Turn-Off Delay Time t d(OFF)-60-ns Fall Time t f-34-ns Turn-Off Time t OFF--140ns

Total Gate Charge Q g(TOT)V GS = 0V to -20V V DD = -24V,

I D? 2.5A,

R L = 9.6?

I g(REF) = -1.0mA

(Figure 14)-2835nC

Gate Charge at -10V Q g(-10)V GS = 0V to -10V-1519nC Threshold Gate Charge Q g(TH)V GS = 0V to -2V- 1.5 1.9nC

Input Capacitance C ISS V DS = -25V, V GS = 0V,

f = 1MHz

(Figure 13)-580-pF

Output Capacitance C OSS-260-pF Reverse Transfer Capacitance C RSS-38-pF Thermal Resistance Junction to Ambient RθJA Pulse Width = 1s

Device mounted on FR-4 material

--62.5o C/W Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage V SD I SD = -2.5A---1.25V Reverse Recovery Time t rr I SD =-2.5A, dI SD/dt = 100A/μs--49ns

Typical Performance Curves

FIGURE 1.NORMALIZED POWER DISSIPATION vs AMBIENT

TEMPERATURE FIGURE 2.MAXIMUM CONTINUOUS DRAIN CURRENT vs

AMBIENT TEMPERATURE

FIGURE 3.NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

FIGURE 4.FORWARD BIAS SAFE OPERATING AREA FIGURE 5.PEAK CURRENT CAPABILITY

T A , AMBIENT TEMPERATURE (o C)

P O W E R D I S S I P A T I O N M U L T I P L I E R

5075100150

0.20.40.60.81.01.2125-1.5-0.5025

75100125150

-1.0-2.0I D , D R A I N C U R R E N T (A )

T A , AMBIENT TEMPERATURE (o C)

-3.0-2.5t, RECTANGULAR PULSE DURATION (s)

10-5

10-1100102

0.001

0.1

10-2

103

Z θJ A , N O R M A L I Z E D

T H E R M A L I M P E D A N C E

0.01

10-4

10-3

SINGLE PULSE

NOTES:

DUTY FACTOR: D = t 1/t 2

PEAK T J = P DM x Z θJA x R θJA + T A

P DM

t 1

t 2

101

DUTY CYCLE - DESCENDING ORDER 0.50.20.10.050.01

0.02V DS , DRAIN TO SOURCE VOLTAGE (V)

-1

-10

-100

-0.01

-1

-50

-10

-0.1-0.1

I D , D R A I N C U R R E N T (A )

5ms 100ms

10ms V DSS(MAX) = -30V

LIMITED BY r DS(ON)

AREA MAY BE

OPERATION IN THIS T J = MAX RATED T A = 25o C

t, PULSE WIDTH (s)

-100

-10

-110-5

10-410-310-210-1100101

I D M , P E A K C U R R E N T (A )

TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION

V GS = -10V

I = I 25

150 - T A 125

FOR TEMPERATURES

ABOVE 25o C DERATE PEAK CURRENT AS FOLLOWS:T A = 25o C

V GS = -20V

NOTE:Refer to Fairchild Application Notes AN9321 and AN9322.FIGURE 6.UNCLAMPED INDUCTIVE SWITCHING CAPABILITY

FIGURE 7.SATURATION CHARACTERISTICS

FIGURE 8.TRANSFER CHARACTERISTICS

FIGURE 9.DRAIN TO SOURCE ON RESISTANCE vs

GATE VOLTAGE AND DRAIN CURRENT

FIGURE 10.NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE FIGURE 11.NORMALIZED GATE THRESHOLD VOLTAGE vs

JUNCTION TEMPERATURE

110100

-10

0.1

-15-1I A S , A V A L A N C H E C U R R E N T (A )t AV , TIME IN AVALANCHE (ms)

t AV = (L)(I AS )/(1.3*RATED BV DSS - V DD )If R = 0

If R ≠ 0

t AV = (L/R)ln[(I AS *R)/(1.3*RATED BV DSS - V DD ) +1]

STARTING T J = 25o C

STARTING T J = 150o C

-4

-8

-12

0-1.5-3.0-4.5-6.0-7.5

-16

-20

I D , D R A I N C U R R E N T (A )

V DS , DRAIN TO SOURCE VOLTAGE (V)

V GS = -6V

V GS = -10V V GS = -20V PULSE DURATION = 80μs T A = 25o C

V GS = -5V V GS = -4.5V

V GS = -8V

DUTY CYCLE = 0.5% MAX

V GS = -7V 0

-4-6-8-10

-20

-4

-8

-12

-16

-20I D (O N ), O N -S T A T E D R A I N C U R R E N T (A )

V GS , GATE TO SOURCE VOLTAGE (V)

150o C

V DD = -15V

-55o C 25o C

PULSE DURATION = 80μs DUTY CYCLE = 0.5% MAX 100200

300

400

500

-6-4V GS , GATE TO SOURCE VOLTAGE (V)

r D S (O N ), D R A I N T O S O U R C E -2-8-10

I D = -0.625A O N R E S I S T A N C E (m ?)

PULSE DURATION = 80μs V DD = -15V

DUTY CYCLE = 0.5% MAX

I D = -1.25A

I D = -2.5A I D = -5.0A 00.5

1.01.5

2.0-80

-4004080120160

N O R M A L I Z E D D R A I N T O S O U R C E T J , JUNCTION TEMPERATURE (o C)

O N R E S I S T A N C E

PULSE DURATION = 80μs V GS = -10V, I D = -2.5A

DUTY CYCLE = 0.5% MAX -80

-40

04080120

160

0.40.6

0.8

1.0

1.2

N O R M A L I Z E D G A T E T J , JUNCTION TEMPERATURE (o C)

T H R E S H O L D V O L T A G E

V GS = V DS , I D = -250μA

FIGURE 12.NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

FIGURE 13.CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

NOTE:Refer to Fairchild Application Notes AN7254 and AN7260.

FIGURE 14.NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT

Test Circuits and Waveforms

FIGURE 15.UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16.UNCLAMPED ENERGY WAVEFORMS

1.2

1.1

1.0

0.9

0.8-80

-40

04080120

160

T J , JUNCTION TEMPERATURE (o C)

N O R M A L I Z E D D R A I N T O S O U R C E B R E A K D O W N V O L T A G E

I D = -250μA

750

600

300

0-5-10-15-20-25

C , C A P A C I T A N C E (p F )

450

V DS , DRAIN TO SOURCE VOLTAGE (V)

150

C ISS

C OSS

C RSS

V GS = 0V, f = 1MHz C ISS = C GS + C GD C RSS = C GD

C OSS = C DS + C GD

V DD = BV DSS

V DD = 0.75 BV DSS V DD = 0.50 BV DSS V DD = 0.25 BV DSS

PLATEAU VOLTAGES IN DESCENDING ORDER:

R L = 12?

I G(REF) = -0.26mA V GS = -10V

-30.0

-22.5

-15.0

-7.5

20I G REF ()

I G ACT ()---------------------t, TIME (μs)

80I G REF ()

I G ACT ()----------------------10.0

-7.5

-5.0

-2.5

V D S , D R A I N T O S O U R C E V O L T A G E (V )V G S , G A T E T O S O U R C E V O L T A G E (V )

V DD = BV DSS

V DD = BV

DSS

t P

0.01?

I AS

-V DS

V DD

R G

DUT

VARY t P TO OBTAIN REQUIRED PEAK I AS 0V V GS

DSS

Soldering Precautions

The soldering process creates a considerable thermal stress on any semiconductor component. The melting temperature of solder is higher than the maximum rated temperature of the device. The amount of time the device is heated to a high temperature should be minimized to assure device reliability.Therefore, the following precautions should always be observed in order to minimize the thermal stress to which the devices are subjected.1.Always preheat the device.

2.The delta temperature between the preheat and solder-ing should always be less than 100o C. Failure to preheat the device can result in excessive thermal stress which can damage the device.

3.The maximum temperature gradient should be less than

5o C per second when changing from preheating to sol-dering.

4.The peak temperature in the soldering process should be

at least 30o C higher than the melting point of the solder chosen.5.The maximum soldering temperature and time must not

exceed 260o C for 10 seconds on the leads and case of the device.6.After soldering is complete, the device should be allowed

to cool naturally for at least three minutes, as forced cool-ing will increase the temperature gradient and may result in latent failure due to mechanical stress.7.During cooling, mechanical stress or shock should be

avoided.

FIGURE 17.SWITCHING TIME TEST CIRCUIT FIGURE 18.RESISTIVE SWITCHING WAVEFORMS

FIGURE 19.GATE CHARGE TEST CIRCUIT FIGURE 20.GATE CHARGE WAVEFORMS

V GS

R L

R GS

DUT

-V DD

V DS

V GS

t d(ON)

t r

90%

10%

V DS 90%

t f t d(OFF)

t OFF 90%

50%50%

10%

PULSE WIDTH

V GS t ON 10%

R L

V GS

-V DS

V DD

DUT

I g(REF)

PSPICE Electrical Model

SUBCKT RF1K49223 2 1 3 ;rev 4/7/97

CA 12 8 7.29e-10CB 15 14 5.01e-10CIN 6 8 5.55e-10

DBODY 5 7 DBODYMOD DBREAK 7 11 DBREAKMOD DPLCAP 10 6 DPLCAPMOD EBREAK 5 11 17 18 -35.46EDS 14 8 5 8 1EGS 13 8 6 8 1ESG 5 10 8 6 1

EVTHRES 6 21 19 8 1EVTEMP 6 20 18 22 1

IT 8 17 1

LDRAIN 2 5 1e-9LGATE 1 9 1.27e-9

LSOURCE 3 7 4.20e-10MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD

RBREAK 17 18 RBREAKMOD 1RDRAIN 50 16 RDRAINMOD 19.3e-3RGATE 9 20 7.44RLDRAIN 2 5 10RLGATE 1 9 12.7RLSOURCE 3 7 4.2

RSLC1 5 51 RSLCMOD 1e-6RSLC2 5 50 1e3

RSOURCE 8 7 RSOURCEMOD 65.37e-3RVTHRES 22 8 RVTHRESMOD 1RVTEMP 18 19 RVTEMPMOD 1S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 22 19 DC 1

ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*48),2.5))}

.MODEL DBODYMOD D (IS = 3.30e-13RS = 4.56e-2TRS1 =6.98e-4TRS2 =8.08e-7CJO = 8.21e-10TT = 3.51e-8 M=0.4).MODEL DBREAKMOD D (RS = 8.18e-1TRS1 =5.28e-3TRS2 = -7.18e-5.MODEL DPLCAPMOD D (CJO = 2.52e-10IS = 1e-30N = 10 M=0.6)

.MODEL MMEDMOD PMOS (VTO= -1.95 KP=0.75 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=7.44).MODEL MSTROMOD PMOS (VTO= -2.44 KP= 7.25 IS=1e-30 N=10 TOX=1 L=1u W=1u)

.MODEL MWEAKMOD PMOS (VTO= -1.68 KP=0.045 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=74.4 RS=0.1).MODEL RBREAKMOD RES (TC1 = 9.45e-4TC2 = -1.01e-7).MODEL RDRAINMOD RES (TC1 = 3.69e-3TC2 = 5.90e-6).MODEL RSLCMOD RES (TC1=3.46e-3 TC2= 1.26e-6)

.MODEL RSOURCEMOD RES (TC1=3.69e-3 TC2=5.90e-6).MODEL RVTHRESMOD RES (TC=-5.19e-4 TC2= 5.02e-6).MODEL RVTEMPMOD RES (TC1 = -3.54e-3TC2 = -6.53e-7).MODEL S1AMOD VSWITCH (RON = 1e-5ROFF = 0.1VON = 6.94VOFF= 3.94).MODEL S1BMOD VSWITCH (RON = 1e-5ROFF = 0.1VON = 3.94VOFF= 6.94).MODEL S2AMOD VSWITCH (RON = 1e-5ROFF = 0.1VON = 0.40VOFF= -2.60).MODEL S2AMOD VSWITCH (RON = 1e-5ROFF = 0.1

VON = -2.60VOFF= 0.40)

.ENDS

NOTE:For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options ;IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.

1822

-++

-551

198+-1718

RBREAK

RVTEMP

VBAT

RVTHRES

1922

121315

S1A S1B

S2A S2B

CB EGS

EDS

148138

1413MWEAK

DBODY

RSOURCE

SOURCE

LSOURCE RLSOURCE

CIN

RDRAIN EVTHRES 16

MMED

MSTRO

DRAIN 2

LDRAIN

RLDRAIN

DBREAK

DPLCAP

ESLC RSLC110

RSLC2

GATE RGATE EVTEMP

ESG LGATE

RLGATE

EBREAK

PSPICE Thermal Model

REV 28 Feb 97RF1K49223

CTHERM1 7 6 1.00e-7CTHERM2 6 5 9.00e-4CTHERM3 5 4 3.00e-3CTHERM4 4 3 4.00e-2CTHERM5 3 2 5.20e-3CTHERM6 2 1 1.90e-2RTHERM1 7 6 7.10e-2RTHERM2 6 5 1.90e-1RTHERM3 5 4 5.95e-1RTHERM4 4 3 4.27RTHERM5 3 2 1.2e1RTHERM6 2 1 1.04e2

RTHERM4RTHERM6RTHERM5RTHERM3RTHERM2RTHERM1

CTHERM4

CTHERM6

CTHERM5

CTHERM3

CTHERM2

CTHERM1

JUNCTION

CASE