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PIP201-12M-3中文资料

PIP201-12M-3

DC-to-DC converter powertrain

Rev. 03 — 19 November 2003Product data M3D797

1.Description

The PIP201-12M is designed for use as the power output stage of a synchronous

buck DC-to-DC converter.It contains a MOSFET control IC and two power MOSFET

transistors. By combining the power MOSFETs and the driver circuit into a single

component, stray inductances are virtually eliminated, resulting in higher switching

frequency, lower switching losses and a compact, ef?cient design.

2.Features

s Input conversion range from 3.3V to 12V

s Output voltages from 0.8V to 5V

s Capable of up to 20A continuous output current

s Operating frequency up to 1MHz

s Peak system ef?ciency >90% at 500kHz

s Low-pro?le, surface mount package (10×10×0.85mm)

s Compatible with any single or multi-phase PWM controller.

3.Applications

s High-current DC-to-DC point-of-load converters

s Small form-factor Voltage Regulator Modules

s Microprocessor and memory voltage regulators.

4.Ordering information

Table 1:Ordering information

Type number Package

Name Description Version

PIP201-12M-3HVQFN68

(MLF68)plastic thermal enhanced very thin quad?at package;no leads;

68terminals; body 10×10×0.85mm

SOT687-1

5.Block diagram

6.Pinning information

6.1Pinning

A bootstrap diode is integrated into the design of the PIP201-12M between V DDC and CB.

Fig 1.Block diagram.

V DDO

V SSO

V SSC VO

V DDC

sourceH

driveH driveL control

cct gnd

bootstrap capacitor

03ae80

CB PIP201-12M

sourceL

PWM input

11, 12 1 to 8, 60, 6168, PAD1

10, 26, 27,45 to 59

62 to 67, PAD328 to 44

9, 15

22 to 24, PAD216, 17

13, 14control cct supply

n.c.

18 to 21, 25

Shaded area denotes terminal 1 index area.

Fig 2.Pin con?guration (footprint view).

VO P AD 3

PIP201-12M

V DDO PAD 1

V SSC PAD 2

292321252728262434

3032333122201918576365615958606252

56545355646667682134569711810121416131517

5051494847464345414442403836393735

03ae83

V DDO V DDO V DDO V DDO V DDO V DDO V DDO V SSC V DDO V SSC

VO CB CB V DDC V DDC VI VI

n .c .n .c .n .c .n .c .

V S S C V S S C V S S C n .c .V O V O V S S O V S S O V S S O V S S O V S S O V S S O V S S O

V D D O V O V O V O V O V O V O V D D O V D D O V O V O V O V O V O V O V O V O

VO VO VO VO VO VO VO V SSO V SSO V SSO V SSO V SSO V SSO V SSO V SSO V SSO V SSO

6.2Pin description

[1]All pins connected to P AD1[2]All pins connected to P AD2[3]All pins connected to P AD3.

[4]P AD1, PAD2 and PAD3 are electrical connections and must be soldered to the printed circuit board.[5]

All n.c. pins should be connected to V SSC .

7.Functional description

7.1Basic functionality

In order to understand the functions performed by the PIP201-12M, consider the requirements of a synchronous DC-to-DC converter output stage,driven from a PWM controller (Figure 3).

When the input voltage is HIGH, the upper MOSFET must be on and the lower MOSFET must be off. Current ?ows from the supply (V DDO ), through the upper MOSFET and the inductor (L out ), to the output.

Table 2:Pin description Symbol Pin

I/O Description

V DDO 1to 8, 60, 61,68

[1][4]

-output stage supply voltage V SSC 9,15,22to 24[2][4]-control circuit supply ground V O

10, 26, 27,45to 59,62to 67[3][4]

output

CB 11, 12I/O bootstrap capacitor connection V DDC 13, 14-control circuit supply voltage VI 16, 17I pulse width modulated input V SSO 28to 44-output stage supply ground n.c.

18to 21, 25

[5]-

no internal connection

Fig 3.Simpli?ed functional block diagram of a synchronous DC-to-DC converter

output stage.

V DDC V SSC

VO V DDO input voltage

from PWM controller control circuit supply (12 V)

output stage supply voltage t p t p T

δ =

V I

V SSO

03ad36

output

100nF L out

C out

signal ground power ground

When the input voltage is LOW and current is ?owing in the inductor, the upper

MOSFET must be off and the lower MOSFET must be on. Current ?ows from the

power ground (V SSO), through the lower MOSFET and the inductor (L out), to the

output.

Finally, when switching between states, both MOSFETs must not be on at the same time.

7.2MOSFET driver function

input voltage

upper MOSFET

gate drive

delay

lower MOSFET

gate drive

delay

output voltage

03ag35

Fig 4.Input,output and gate drive waveforms of a synchronous DC-to-DC converter output stage.

The input, output and gate drive waveforms are shown in Figure4. When the input voltage goes HIGH,the gate drive to the lower MOSFET immediately goes LOW.This causes the output current to ?ow through the source-drain diode of the lower

MOSFET. This causes output voltage to fall from zero to approximately?0.7V.

After a delay, if the input voltage is still HIGH, the gate drive to the upper MOSFET goes HIGH.This causes the output voltage to rise to the output stage supply voltage, V DDO.

When the input voltage goes LOW,the gate drive to the upper MOSFET immediately goes LOW.The output voltage falls from V DDO,until it is clamped by the source-drain diode of the synchronous FET at approximately?0.7V.

After a delay, if the input voltage is still LOW, the gate drive to the lower MOSFET

goes HIGH.The lower MOSFET turns on,and the output voltage rises from?0.7V to zero.

7.3Bootstrap diode

A bootstrap diode is integrated into the design of the PIP201-12M between V DDC and

CB.

7.43-state function

If the input from the PWM controller becomes high impedance (3-state) for longer than t d(3-state),then both MOSFETs are turned off and the V I input is driven to 2.5V by an internal 2x 10k ? resistor voltage divider between an internal 5V reference and ground. Once the V I input is outside the 3-state window for longer than t d(3-state)normal operation will commence.

8.Limiting values

[1]Pulse width and repetition rate limited by maximum value of T j .

[2]

Assumes a thermal resistance from junction to printed-circuit board of 5K/W.

Table 3:Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).Symbol Parameter

Conditions Min Max Unit V DDC control circuit supply voltage ?0.515V V DDO output stage supply voltage ?0.525V V I input voltage ?0.5 5.25V V O output voltage ?0.5V DDO + 0.5V

V CB bootstrap voltage ?0.5

V O + 15V I O(AV)average output current V DDC =12V; T pcb ≤112°C;f i =500kHz;Figure 5-20A I ORM repetitive peak output current V DDC =12V; t p ≤10μs [1]-200A P tot total power dissipation T pcb =25°C [2]-25W T pcb =90°C

[2]

-12W T stg storage temperature ?55+150°C T j

junction temperature

?55

+150

°C

V DDC =12V; V DDO =12V; f i =500kHz; V O =1.6V .

Fig 5.Average output current as a function of printed-circuit board temperature.

03ae74

24050100

150

I O(AV)(A)T pcb (°C)

9.Thermal characteristics

10.Characteristics

[1]

If the input voltage remains between V IH and V IL (2.5V typ) for longer than t d(3-state), then both MOSFETs are turned off.

Table 4:Thermal characteristics Symbol Parameter

Conditions

Min Typ Max Unit R th(j-pcb)

thermal resistance from junction to printed-circuit board

-4

K/W

R th(j-a)

thermal resistance from junction to ambient

device mounted on FR4printed-circuit board; copper area around device 25×25mm no thermal vias -25-K/W with thermal vias

-20-K/W with thermal vias and forced air cooling; air?ow =0.8ms -1(150 LFM)

-15

-K/W

R th(j-c)

thermal resistance from junction to case

measured on upper surface of package

-11-K/W

Table 5:Characteristics

V DDC =12V; T j =25°C unless otherwise speci?ed.Symbol Parameter

Conditions Min Typ Max Unit Static characteristics

V DDC control circuit supply voltage 25°C ≤T j ≤150°C 71214V V IH HIGH-level input voltage 25°C ≤T j ≤150°C [1] 3.0 3.45 3.9V V IL LOW-level input voltage 25°C ≤T j ≤150°C [1]

1 1.45 1.9V I LI input leakage current 0V ≤V I ≤5V -0.3 1.2mA I DDC control circuit supply current f i =0Hz

- 1.53mA f i =500kHz;Figure 10-4560mA P tot

total power dissipation

V DDO =12V;I O(AV)=12.5A;f i =500kHz; V O =1.6V;T pcb =90°C;Figure 6.

2.7

Dynamic characteristics

t d(on)(IH-OH)turn-on delay time input HIGH to output HIGH V DDO =12V; I O(AV)=12.5A

-7785ns t d(off)(IL-OL)turn-off delay time input LOW

to output LOW -3045ns t o(r)output rise time -1825ns t o(f)output fall time -1220ns t d(3-state)

3-state delay time

140

V DDC =12V; V DDO =12V; V O =1.6V; f i =500kHz V DDC =12V; V O =1.6V; f i =500kHz; I O(AV)=12.5A Fig 6.Total power dissipation as a function of average

output current; typical values.Fig 7.Normalized power dissipation as a function of

output stage supply voltage; typical values.

03ae77

1520

I O(AV) A P tot (W)

03ag54

0.8

1.2

1.4

1.65

V DDO (V)

a a P tot

P tot V DDO

12V =()

--------------------------------------=V DDC =12V; V DDO =12V; f i =500kHz; I O(AV)=12.5A V DDC =12V; V DDO =12V; V O =1.6V; I O(AV)=12.5A Fig 8.Normalized power dissipation as a function of

output voltage; typical values.Fig 9.Normalized power dissipation as a function of

input frequency; typical values.

03ag55

0.9

1.1

1.2

1.31

V O (V)

b 03ag74

0.60.8

1.2

1.4

1.6200

400

600

800

1000f i (kHz)

c b P tot

P tot V O

1.6V =()

---------------------------------=c P tot

P tot f i

500kHz =()

------------------------------------=

V DDC =12V; V DDO =12V; V O =1.6V; I O(AV)=12.5A.

Fig 10.Control circuit supply current as a function of input frequency; typical values.

03ae75

020

100250

500750

1000

I DDC (mA)

f i (kHz)

11.Application information

11.1Typical application

A typical four-phase buck converter is shown in Figure 11. This system uses four PIP201-12M devices to deliver a continuous output current of 50A at an operating frequency of 500kHz.

Remark:An external bootstrap diode is not required as one is already integrated into the design of the PIP201-12M between V DDC and CB.

Fig 11.Typical application circuit using the PIP201-12M in a four-phase converter

PWM 1PWM 2

PWM 3PWM 4

PWM Controller

03ae81

conversion supply (12 V)

control circuit supply (12 V)output voltage

PIP201-12M

360 nH

V DDC V DDO

CB VO

V SSO

VI PIP201-12M

360 nH

100nF

1 μF

V DDC V DDO

CB VO

V SSO

V SSC

VI PIP201-12M

360 nH

V DDC V DDO

CB VO

V SSO

VI PIP201-12M

360 nH

V DDC V DDO

CB VO

V SSO

10 ?

2.2 nF 2.2 ?

22 μF (4x)

10 ?

2.2 ?

2.2 nF 2.2 nF 2.2 nF 100nF

100nF

1 μF

100 μF (2x)

signal ground power ground

22 μF (4x)

22 μF (4x)100 μF (2x)

100 μF (2x)

The typical dissipation in each PIP201-12M as a function of output current,is given in Figure 6. At 500KHz and 12.5A output current, the dissipation in each PIP201-12M is 2.7W. The typical thermal resistance from junction to ambient is given in Table 4.With thermal vias and forced air cooling,the thermal resistance of each PIP201-12M from junction to ambient is15K/W. Assuming a maximum ambient temperature of 55°C, the maximum junction temperature (T j(max)) is given by:(1)

The thermal resistance between the junction and the printed-circuit board is 5K/W.Therefore, the maximum printed-circuit board temperature (T pcb(max)) is given by:(2)

11.2Advantages of an integrated driver

One problem in the design of low-voltage, high-current DC-to-DC converters using discrete components, is stray inductance between the various circuit elements.Stray inductance in the gate drive circuit increases the switching times of the MOSFETs and causes high-frequency oscillation of the gate voltage.

Stray inductance in the high-current loop between V DDO and V SSO causes switching losses and electromagnetic interference. In discrete designs, high-frequency electric and magnetic ?elds radiate from PCB tracks and couple into adjacent circuits.By integrating the power MOSFETs and their drive circuits into a single package,stray inductance is virtually eliminated, resulting in a compact, ef?cient design.In discrete designs, the delays in the MOSFET drivers must be long enough to ensure no cross-conduction even when using the slowest MOSFETs. Use of an

integrated driver allows the propagation delays in the MOSFET drivers to be precisely matched to the MOSFETs. This minimizes switching losses and eliminates cross-conduction whilst allowing the circuit to operate at a higher frequency.

11.3External connection of power and signal lines

A major bene?t of the PIP201-12M module is the ability to switch the internal power MOSFETs faster than a DC-to-DC converter built from discrete components. This reduces switching losses and increases system ef?ciency but it also results in higher transient voltages on the device supply lines (V DDO and V SSO ).This is due to the high rate of change of current (dI/dt)through the combined parasitic inductance of the pcb tracks and the decoupling capacitors.

To minimize the amplitude of these transients,decoupling capacitors must be placed between V DDO and V SSO , as close as possible to the device pins. Low inductance,chip ceramic capacitors are recommended.

T j max ()P tot R th j a –()×T amb + 2.71555+×95.5°C

===T pcb max ()T j max ()P tot R th j pcb –()×–95.5 2.75×–82°C

===

To protect the control circuit from the transient voltages, the following precautions must be taken. Refer to Figure 12.

1.The output stage ground (V SSO ) must be connected to the decoupling capacitor (C in )before joining the ground plane.Otherwise,the switching noise on V SSO will couple into the control circuit ground (V SSC ).

2.The control circuit supply must be ?ltered using a resistor-capacitor (RC) ?lter.The values shown in Figure 12 are suitable for most applications.

3.It is essential that the V SSC (signal ground) connection at the device is not connected in the current return path between the V SSO (power ground)connection at the device and the V DDO input capacitor.

4.It is also essential that the input to the V DDC (logic power)?lter is not connected in the current path between the V DDO (conversion power) connection at the device.

11.4Switching frequency

A high operating frequency reduces the size and number of capacitors needed to ?lter the output current, and also reduces the size of the output inductors. The

disadvantage is higher dissipation due to switching and MOSFET driver losses. For example,doubling the operating frequency of the circuit in Figure 11from 500kHz to 1MHz would increase the power dissipation in each PIP201-12M from 2.7W to 4.5W, at an output current of 12.5A in each PIP201-12M.

The maximum switching frequency is limited by thermal considerations, the

dissipation in the PIP201-12M device(s) and the thermal resistance from junction to ambient.

11.5Thermal design

The PIP201-12M has three pads on its underside.These are designated PAD1,P AD2and PAD3 (Figure 2). PAD1 is connected to V DDO , PAD2 is connected to V SSC and P AD3 is connected to V O . In addition to providing low inductance electrical connections, these pads conduct heat away ef?ciently from the MOSFETs and control IC to the printed-circuit board. The thermal resistance from junction to

Fig 12.External connection of power and signal lines.

V DDC V SSC VO

V DDO control circuit supply (12 V)

output stage supply voltage

V SSO

03ae27

output

100nF L out

C out

10 ?1 μF

C in

signal ground power ground

input voltage

from PWM controller

printed-circuit board is approximately 5K/W.In order to take full advantage of the low thermal resistance of this package,the printed-circuit board must be designed so that heat is conducted away ef?ciently from the package. This can be achieved by

maximizing the area of copper around each pad,and by incorporating thermal vias to conduct the heat to inner and/or bottom layers of the printed-circuit board.

An example of a thermal via pattern is shown in Figure 13. In a typical application,with no forced air cooling, the use of thermal vias typically reduces the thermal

resistance from 25K/W to 20K/W. The additional use of a small fan can reduce this further to approximately 15K/W.

The thermal resistance of a particular design can be measured by passing a known current through the source-drain diode of the lower MOSFET.The direction of current ?ow is into V SSO and out of V O .The volt drop between V SSO and V O is then measured and used to calculate the power dissipation in the PIP201-12M. The case

temperature of the PIP201-12M can be measured using an infra-red thermometer.The thermal resistance can then be calculated using the following equation:

(3)

where T case is the measured case temperature (°C), T amb is the ambient

temperature (°C), I is the MOSFET current (A), and V F is the voltage drop between V SSO and V DDO (V).

Where more than one phase is used,for example the circuit of Figure 11,the thermal resistance of each PIP201-12M should be measured with current ?owing in all phases.

12.Test information

Figure 14shows the test circuit used to measure power loss in the PIP201-12M.The output voltage is measured using an averaging circuit. This eliminates losses in the output inductor and the PCB tracks. The calculated power loss, using this method,

All holes 0.5mm diameter with 1mm spacing.

Fig 13.Printed-circuit board thermal via pattern.

03ag36

P AD1

P AD2

P AD3

R th j pcb –()T case T amb

–I V F ×------------------------------K W ?()=

includes the losses in the Equivalent Series Resistance (ESR) of the input ?lter capacitors. This must be subtracted from the total loss to give the net loss in the PIP201-12M.

13.Marking

Fig 14.Power loss (P tot ) test circuit.

V DDC V SSC VO

V DDO

input voltage

from pulse generator control circuit supply (12 V)

output stage supply

V I

V SSO

03ai73

I O 100nF

averaging circuit

load

A V V O(AV)I DDO

I DDC

500 nH

V DDO

signal ground power ground

P DDO V DDO I DDO ×=P DDC V DDC I DDC ×=P O V O AV ()I O

×=P tot P DDO P DDC P O

–+=TYPE No: PIP201-12M-NN (NN is version number)DIFFUSION LOT No: 7 characters MANUFACTURING CODE: see Figure 16COUNTRY OF ORIGIN: Korea

Fig 15.SOT687-1 marking.Fig 16.Interpretation of manufacturing code.

terminal 1index area

03ag38

TYPE No.

DIFFUSION LOT No.

MANUFACTURING CODE COUNTRY OF ORIGIN

Release status code

X = Development Sample

Y = Customer Qualification Sampl blank = Released for Supply

Date code

YY = last two digits of year WW = week number

Design centre k = Hazel Grove, UK Diffusion centre = Hazel Grove, UK

Assembly centre f = Anam Korea

03ai72

hfkYYWWY

14.Package outline

Fig 17.SOT687-1.

A 4b UNIT D

e REFERENCES

OUTLINE VERSION EUROPEAN PROJECTION

ISSUE DATE IEC JEDEC JEITA mm

10.159.8510.159.853.83.5

3.83.5

0.5

v 0.1

w 0.05

y 0.05

y 10.1

e 18

e 20.300.18

c 0.2

9.959.559.959.55

7.857.55

0.750.50

0.800.65

A 10.050.00

DIMENSIONS (mm are the original dimensions) SOT687-1

MO-220

- - -

- - -E

E h1E h E 1

D h D 1

L 0 2.5 5 mm

scale

SOT687-1

HVQFN68: plastic thermal enhanced very thin quad flat package; no leads;68 terminals; body 10 x 10 x 0.85 mm

A max.A

A 4

A 1

detail X

E h1

D h

E h

D h

e 18

D D 1

E 1X

e 2

02-10-1803-06-13

terminal 1index area

y 1C

e 1b

A C C

B v M w M

15.Soldering

15.1Introduction to soldering MLF packages

The MicroLeadFrame package (MLF) is a near Chip Scale Package (CSP) with a copper leadframe. It is a leadless package, where electrical contact to the printed circuit board is made through metal pads on the underside of the package.In addition to the small pads around the periphery of the package, there are large pads on the underside that provide low thermal resistance, low electrical resistance, low

inductance connections between the power components inside the MLF package and the printed-circuit board. It is this feature of the MLF package that makes it ideally suited for VRM applications.

Electrical connection between the package and the printed circuit board is made by printing solder paste on the printed circuit board, placing the component and

re?owing the solder in a convection or infra-red oven. The solder re?ow process is shown in Figure 18 and the typical temperature pro?le is shown in Figure 19. T o

ensure good solder joints,the peak temperature T p should not exceed 220°C for thin packages such as MLF ,and the time above liquidus temperature should be less than 1.25 minutes. The maximum temperature can be increased for lead free solder. The ramp rate during preheat should not exceed 3K/s. Nitrogen purge is recommended during re?ow.

Fig 18.Typical re?ow soldering process ?ow.Fig 19.Typical re?ow soldering temperature pro?le.

SOLDER P ASTE PRINTING POST PRINT INSPECTION COMPONENT PLACEMENT PRE REFLOW INSPECTION REFLOW SOLDERING POST REFLOW INSPECTION

(PREFERABL Y X-RAY)

REWORK AND TOUCH UP

03aj25

03aj26

0100

2003000

time (minutes)

Temp T r T e

T p rate of rise of

temperature < 3 K/s

1 min max

1.25 min max

(°C)

15.2Rework guidelines

Since the solder joints are largely inaccessible, only the side ?llets can be touched

up. If there are defects underneath the package, then the whole package has to be

removed.

The ?rst step in component removal is to re?ow the solder joints. It is recommended

that the board is heated from the underside using a convective heater whilst hot air or

gas is directed at the upper surface of the component. Nozzles should be used to

direct the hot air or gas to minimize heating of adjacent components. Excessive

air?ow should be avoided since this may cause the package to skew. An air?ow

velocity of 15 to 20 liters per minute is usually adequate.

Once the solder joints have re?owed, the component should be lifted off the board

using a vacuum pen.

The next step is to clean the solder pads using solder braid and a blade-style

soldering tool. Finally, the pads should be cleaned with a solvent. The solvent is

usually speci?c to the type of solder paste used in the original assembly and the

paste manufacturers recommendations should be followed.

16.Mounting

16.1PCB design guidelines

The terminals on the underside of the package are rectangular in shape with a

rounded edge on the inside. Electrical connection between the package and the

printed-circuit board is made by printing solder paste onto the PCB footprint followed

by component placement and re?ow soldering.The PCB footprint shown in Figure20

is designed to form reliable solder joints.

The use of solder resist between each solder land is recommended. PCB tracks

should not be routed through the corner areas shown in Figure20. This is because

there is a small,exposed remnant of the leadframe in each corner of the package,left

over from the cropping process.

Good surface?atness of the PCB lands is desirable to ensure accuracy of placement

after soldering.Printed-circuit boards that are?nished with a roller tin process tend to

leave small lumps of tin in the corners of each land. Levelling with a hot air knife

improves ?atness. Alternatively, an electro-less silver or silver immersion process

produces completely ?at PCB lands.

16.2Solder paste printing

The process of printing the solder paste requires care because of the ?ne pitch and small size of the solder lands.A stencil thickness of 0.125mm is recommended.The stencil apertures can be made the same size as the solder lands in Figure 20.The type of solder paste recommended for MLF packages is “No clean”,Type 3,due to the dif?culty of cleaning ?ux residues from beneath the MLF package.

All dimensions in mm.

Fig 20.PCB footprint for SOT687-1 package (re?ow soldering).

0.4 SP (2×)

11.15 OA (2×)

7.6 Cu (2×)10.8 Cu (2×)

0.9 SP (10×)

0.5 SP

(4×)

1 SP (10×)

8.9 Cu (2×)1 SP (8×)

1 SP (8×)

0.28 Cu (68×)

0.4 SP 0.4 SP

0.6 Cu 4.1

8.63 OA (4×)

4.1

0.6 Cu

e = 0.5

MGW820

solder lands

Cu pattern

clearance

solder paste

occupied area

0.1

0.2

0.02

17.Revision history

Table 6:Revision history

Rev Date CPCN Description

0320031119-Product data (9397 750 11942)

Modi?cations:

?T able 5 “Characteristics” on page 6: Min, T yp and Max values changed for V IH, V IL and

t d(3-state).

022*******-Product data (939775009833)

Modi?cations:

?Section 2 “Features” and T able1 on page1: updated.

?Figure1 on page2 and Table2 on page3: n.c. pins added.

?Section 7.4 “3-state function” on page 5: 3-state function clari?ed.

?Section 8 “Limiting values” on page 5: V DDC and V CB increased to 14V.

?Section9“Thermal characteristics”on page6:Thermal resistance with forced air cooling

added. Thermal resistance from junction to case added.

?Section 10 “Characteristics” on page 6: V DDC added.

?Figure11 on page9: Application diagram updated.

?Section 11.3 “External connection of power and signal lines” on page 10: New section

added.

?Figure15 on page13: Marking details and Version number added.

?Figure17 on page14: Package drawing updated.

?Section 15 “Soldering” on page 15: Soldering section rewritten.

?Section 16 “Mounting” on page 16: Mounting and Figure20 updated.

0120020124-Preliminary data (9397 750 09032)

Contact information

For additional information, please visit https://www.wendangku.net/doc/188940049.html, .

For sales of?ce addresses, send e-mail to:sales.addresses@https://www.wendangku.net/doc/188940049.html, .

Fax: +31 40 27 24825

18.Data sheet status

[1]Please consult the most recently issued data sheet before initiating or completing a design.

[2]The product status of the device(s)described in this data sheet may have changed since this data sheet was published.The latest information is available on the Internet at URL https://www.wendangku.net/doc/188940049.html,.

[3]For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

19.De?nitions

Short-form speci?cation —The data in a short-form speci?cation is extracted from a full data sheet with the same type number and title.For detailed information see the relevant data sheet or data handbook.

Limiting values de?nition —Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134).Stress above one or more of the limiting values may cause permanent damage to the device.These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the speci?cation is not implied.Exposure to limiting values for extended periods may affect device reliability.

Application information —Applications that are described herein for any of these products are for illustrative purposes only.Philips Semiconductors make no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation.

20.Disclaimers

Life support —These products are not designed for use in life support appliances,devices,or systems where malfunction of these products can reasonably be expected to result in personal injury.Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes —Philips Semiconductors reserves the right to make changes in the products -including circuits,standard cells,and/or software -described or contained herein in order to improve design and/or performance.When the product is in full production (status ‘Production’),relevant changes will be communicated via a Customer Product/Process Change Noti?cation (CPCN).Philips Semiconductors assumes no responsibility or liability for the use of any of these products,conveys no licence or title under any patent,copyright,or mask work right to these products,and makes no representations or warranties that these products are free from patent,copyright,or mask work right infringement,unless otherwise speci?ed.

Level Data sheet status [1]Product status [2][3]De?nition

I Objective data Development This data sheet contains data from the objective speci?cation for product development. Philips Semiconductors reserves the right to change the speci?cation in any manner without notice.

Preliminary data

Quali?cation

This data sheet contains data from the preliminary speci?cation.Supplementary data will be published at a later date.Philips Semiconductors reserves the right to change the speci?cation without notice,in order to improve the design and supply the best possible product.

III Product data Production

This data sheet contains data from the product speci?cation. Philips Semiconductors reserves the right to make changes at any time in order to improve the design,manufacturing and supply.Relevant changes will be communicated via a Customer Product/Process Change Noti?cation (CPCN).

? Koninklijke Philips Electronics N.V .2003.Printed in The Netherlands

All rights are reserved.Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract,is believed to be accurate and reliable and may be changed without notice.No Contents

1Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Ordering information . . . . . . . . . . . . . . . . . . . . . 15Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 26Pinning information . . . . . . . . . . . . . . . . . . . . . . 26.1Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26.2Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 37Functional description . . . . . . . . . . . . . . . . . . . 37.1Basic functionality. . . . . . . . . . . . . . . . . . . . . . . 37.2MOSFET driver function. . . . . . . . . . . . . . . . . . 47.3Bootstrap diode. . . . . . . . . . . . . . . . . . . . . . . . . 47.43-state function. . . . . . . . . . . . . . . . . . . . . . . . . 58Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . . 59Thermal characteristics . . . . . . . . . . . . . . . . . . . 610Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 611Application information . . . . . . . . . . . . . . . . . . . 911.1Typical application . . . . . . . . . . . . . . . . . . . . . . 911.2Advantages of an integrated driver. . . . . . . . . 1011.3External connection of power and signal lines 1011.4Switching frequency . . . . . . . . . . . . . . . . . . . . 1111.5Thermal design. . . . . . . . . . . . . . . . . . . . . . . . 1112Test information . . . . . . . . . . . . . . . . . . . . . . . . 1213Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1314Package outline . . . . . . . . . . . . . . . . . . . . . . . . 1415Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1515.1Introduction to soldering MLF packages. . . . . 1515.2Rework guidelines . . . . . . . . . . . . . . . . . . . . . 1616Mounting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1616.1PCB design guidelines . . . . . . . . . . . . . . . . . . 1616.2Solder paste printing. . . . . . . . . . . . . . . . . . . . 1717Revision history . . . . . . . . . . . . . . . . . . . . . . . . 1818Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 1919Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1920

Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19