IS62WV2568BLL中文资料
IS62WV2568ALL IS62WV2568BLL
ISSI
?
Copyright ? 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
256K x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
FEATURES
?High-speed access time: 55ns, 70ns ?CMOS low power operation – 36 mW (typical) operating – 9 μW (typical) CMOS standby ?TTL compatible interface levels ?Single power supply
– 1.65V--2.2V V CC (62WV2568ALL)– 2.5V--3.6V V CC (62WV2568BLL)?Fully static operation: no clock or refresh required ?Three state outputs
?Industrial temperature available ?Lead-free available
DESCRIPTION
The ISSI IS62WV2568ALL / IS62WV2568BLL are high-speed, 2M bit static RAMs organized as 256K words by 8bits. It is fabricated using ISSI 's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices.When CS1 is HIGH (deselected) or when CS2 is LOW (deselected) or when CS1 is LOW, CS2 is HIGH, the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE) controls both writing and reading of the memory.The IS62WV2568ALL and IS62WV2568BLL are packaged in the JEDEC standard 32-pin TSOP (TYPE I), sTSOP (TYPE I), and 36-pin mini BGA.
FUNCTIONAL BLOCK DIAGRAM
JUNE 2005
2Integrated Silicon Solution, Inc. — https://www.wendangku.net/doc/1611273657.html, — 1-800-379-4774
Rev.B IS62WV2568ALL, IS62WV2568BLL
ISSI
?
PIN DESCRIPTIONS
A0-A17Address Inputs CS1Chip Enable 1 Input CS2Chip Enable 2 Input OE Output Enable Input WE Write Enable Input I/O0-I/O7Input/Output NC No Connection Vcc Power GND
Ground
36-pin mini BGA (B) (6mm x 8mm)
32-pin TSOP (TYPE I), sTSOP (TYPE I)
PIN CONFIGURATION
1 2 3 4 5 6
A B C D E F G H
A0I/O4I/O5GND Vcc I/O6I/O7A9
A1A2
OE A10
CS2WE NC
NC
CS1A11
A3A4A5
A17A16A12
A6A7
A15A13
A8I/O0I/O1Vcc GND
I/O2I/O3A14
IS62WV2568ALL, IS62WV2568BLL ISSI?ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameter Value Unit
V TERM Terminal Voltage with Respect to GND–0.2 to Vcc+0.3V
T STG Storage Temperature–65 to +150°C
P T Power Dissipation 1.0W
Note:
1.Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
OPERATING RANGE (Vcc)
Range Ambient Temperature IS62WV2568ALL IS62WV2568BLL
Commercial0°C to +70°C 1.65V - 2.2V 2.5V - 3.6V
Industrial–40°C to +85°C 1.65V - 2.2V 2.5V - 3.6V
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter Test Conditions Vcc Min.Max.Unit V OH Output HIGH Voltage I OH = -0.1 mA 1.65-2.2V 1.4—V
I OH = -1 mA 2.5-3.6V 2.2—V
V OL Output LOW Voltage I OL = 0.1 mA 1.65-2.2V—0.2V
I OL = 2.1 mA 2.5-3.6V—0.4V
V IH Input HIGH Voltage 1.65-2.2V 1.4V CC + 0.2V
2.5-
3.6V 2.2V CC + 0.3V
V IL(1)Input LOW Voltage 1.65-2.2V–0.20.4V
2.5-
3.6V–0.20.6V
I LI Input Leakage GND ≤ V IN≤ V CC–11μA
I LO Output Leakage GND ≤ V OUT≤ V CC, Outputs Disabled–11μA Notes:
1.V IL (min.) = –1.0V for pulse width less than 10 ns.
4
Integrated Silicon Solution, Inc. — https://www.wendangku.net/doc/1611273657.html, — 1-800-379-4774
Rev.B IS62WV2568ALL, IS62WV2568BLL
ISSI
?
AC TEST LOADS
Figure 1Figure 2
CAPACITANCE (1)
Symbol Parameter Conditions Max.Unit C IN Input Capacitance V IN = 0V 8pF C OUT
Input/Output Capacitance
V OUT = 0V
10
pF
Note:
1.Tested initially and after any design or process changes that may affect these parameters.
AC TEST CONDITIONS
Parameter
62WV2568ALL
62WV2568BLL
(Unit)(Unit)Input Pulse Level
0.4V to Vcc-0.2V
0.4V to Vcc-0.3V
Input Rise and Fall Times 5 ns 5ns Input and Output Timing V REF V REF and Reference Level Output Load
See Figures 1 and 2
See Figures 1 and 2
1.65-
2.2V
2.5V -
3.6V R1(?)30703070R2(?)31503150V REF 0.9V 1.5V V TM
1.8V
2.8V
IS62WV2568ALL, IS62WV2568BLL ISSI?POWER SUPPLY CHARACTERISTICS(1)(Over Operating Range)
62WV2568ALL (1.65V - 2.2V)
Symbol Parameter Test Conditions Max.Unit
70 ns
I C C Vcc Dynamic Operating V CC=M ax.,Com.15m A
Supply C urrent I OUT = 0 mA, f = f MAX Ind.15
I CC1Operating S upply V CC=M ax.,Com.3m A
Current I OUT = 0 mA, f = 0Ind.3
I SB1TTL Standby Current V CC=M ax.,Com.0.3m A
(TTL Inputs)V IN = V IH or V IL Ind.0.3
CS1 = V IH , CS2 = V IL,
f = 1 MH Z
I SB2CMOS S tandby V CC=M ax.,Com.5μA
Current (CMOS Inputs)CS1≥V CC – 0.2V,Ind.10
CS2 ≤ 0.2V,
V IN≥V CC – 0.2V, or
V IN≤ 0.2V, f = 0
POWER SUPPLY CHARACTERISTICS(1)(Over Operating Range)
62WV2568BLL (2.5V - 3.6V)
Symbol Parameter Test Conditions Max.Max.Unit
55 ns70 ns
I C C Vcc Dynamic Operating V CC=M ax.,Com.3025m A
Supply C urrent I OUT = 0 mA, f = f MAX Ind.3530
I CC1Operating S upply V CC=M ax.,Com.33m A
Current I OUT = 0 mA, f = 0Ind.33
I SB1TTL Standby Current V CC=M ax.,Com.0.30.3m A
(TTL Inputs)V IN = V IH or V IL Ind.0.30.3
CS1 = V IH , CS2 = V IL,
f = 1 MH Z
I SB2CMOS S tandby V CC=M ax.,Com.1010μA
Current (CMOS Inputs)CS1≥V CC – 0.2V,Ind.1010
CS2 ≤ 0.2V,
V IN≥V CC – 0.2V, or
V IN≤ 0.2V, f = 0
IS62WV2568ALL, IS62WV2568BLL ISSI?READ CYCLE SWITCHING CHARACTERISTICS(1)(Over Operating Range)
55 ns70 ns
Symbol Parameter Min.Max.Min.Max.Unit
t RC Read Cycle Time55—70—ns
t AA Address Access Time—55—70ns
t OHA Output Hold Time10—10—ns
t ACS1/t ACS2CS1/CS2 Access Time—55—70ns
t DOE OE Access Time—25—35ns
t HZOE(2)OE to High-Z Output—20—25ns
t LZOE(2)OE to Low-Z Output5—5—ns
t HZCS1/t HZCS2(2)CS1/CS2 to High-Z Output020025ns
t LZCS1/t LZCS2(2)CS1/CS2 to Low-Z Output10—10—ns
Notes:
1.Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V, input pulse levels of 0.4 to 1.4V
and output loading specified in Figure 1.
2.Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC WAVEFORMS
READ CYCLE NO. 1(1,2) (Address Controlled) (CS1 = OE = V IL,CS2 = WE = V IH)
6Integrated Silicon Solution, Inc. — https://www.wendangku.net/doc/1611273657.html, — 1-800-379-4774
Rev.B
IS62WV2568ALL, IS62WV2568BLL ISSI?AC WAVEFORMS
READ CYCLE NO. 2(1,3)(CS1,CS2, OE Controlled)
Notes:
1.WE is HIGH for a Read Cycle.
2.The device is continuously selected. OE, CS1= V IL. CS2=WE=V IH.
3.Address is valid prior to or coincident with CS1 LOW and CS2 HIGH transition.
IS62WV2568ALL, IS62WV2568BLL ISSI?WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range)
55 ns70 ns
Symbol Parameter Min.Max. Min.Max.Unit t WC Write Cycle Time 55— 70—ns t SCS1/t SCS2CS1/CS2 to Write End45— 60—ns t AW Address Setup Time to Write End45— 60—ns t HA Address Hold from Write End0— 0—ns t SA Address Setup Time0— 0—ns t PWE WE Pulse Width40— 50—ns t SD Data Setup to Write End25— 30—ns t HD Data Hold from Write End 0— 0—ns t HZWE(3)WE LOW to High-Z Output—20 —20ns t LZWE(3)WE HIGH to Low-Z Output5— 5—ns Notes:
1.Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V, input pulse levels of 0.4V to 1.4V
and output loading specified in Figure 1.
2.The internal write time is defined by the overlap of CS1 LOW, CS2 HIGH and WE LOW. All signals must be in valid states to initiate a Write, but any one can go
inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write.
3.Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC WAVEFORMS
WRITE CYCLE NO. 1 (CS1/CS2 Controlled, OE = HIGH or LOW)
8Integrated Silicon Solution, Inc. — https://www.wendangku.net/doc/1611273657.html, — 1-800-379-4774
Rev.B
IS62WV2568ALL, IS62WV2568BLL ISSI?AC WAVEFORMS
WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle)
IS62WV2568ALL, IS62WV2568BLL ISSI?DATA RETENTION SWITCHING CHARACTERISTICS
Symbol Parameter Test Condition Min.Max.Unit V DR Vcc for Data Retention See Data Retention Waveform 1.0 3.6V
I DR Data Retention Current Vcc = 1.0V, CS1/CS2 ≥ Vcc – 0.2V—10μA
t SDR Data Retention Setup Time See Data Retention Waveform0—ns t RDR Recovery Time See Data Retention Waveform t RC—ns
DATA RETENTION WAVEFORM (CS1 Controlled)
DATA RETENTION WAVEFORM (CS2 Controlled)
10Integrated Silicon Solution, Inc. — https://www.wendangku.net/doc/1611273657.html, — 1-800-379-4774
Rev.B
IS62WV2568ALL, IS62WV2568BLL
ISSI
?
PLASTIC sTSOP - 32 PINS Package Code: H (Type 1)
Notes:
1.Controlling dimension: millimeters, unless otherwise specified.
2.BSC = Basic lead spacing between centers .
3.Dimensions D1 and E do not include mold flash protrusion and should be
measured from the bottom of the package.4.Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane.
PLASTIC sTSOP (H-TYPE 1)
MILLIMETERS
INCHES
Symbol Min.
Max.
Min.
Max.
REF. STD N0. Leads 32
A — 1.25 —0.049A1 0.05—0.002 —A20.95 1.050.0370.041b 0.170.230.0070.009C 0.1420.1580.00560.0082D 13.213.60.5200.535D111.711.90.4610.469E 7.98.10.3110.319e 0.50BSC 0.020BSC L 0.300.700.0120.028S 0.278TYP.0.0109TYP.α
00
50
00
50
12Integrated Silicon Solution, Inc. — https://www.wendangku.net/doc/1611273657.html, — 1-800-379-4774
Rev.B IS62WV2568ALL, IS62WV2568BLL
ISSI
?
PLASTIC TSOP - 32 PINS Package Code: T (Type 1)
Notes:
1.Controlling dimension: millimeters, unless otherwise specified.
2.BSC = Basic lead spacing between centers .
3.Dimensions D1 and E do not include mold flash protrusion and should be measured from the bottom of the package.
4.Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane.
PLASTIC TSOP (T-TYPE 1)
MILLIMETERS
INCHES Symbol Min.
Max.
Min.
Max.
REF. STD N0. Leads 32
A — 1.20 —0.047A1 0.050.250.002 0.010
B 0.170.230.0070.009
C 0.120.170.0060.014
D 7.908.100.3080.316
E 18.3018.500.7140.722H 19.8020.200.7220.788e 0.50BSC 0.020BSC L 0.400.600.0160.024α
00
80
00
80
IS62WV2568ALL, IS62WV2568BLL
ISSI
?
Mini Ball Grid Array
Package Code: B (36-pin) (6mm x 8mm, 8mm x 10 mm)
1.Controlling dimension: millimeters, unless otherwise specified.
2.BSC = Basic lead spacing between centers .
3.Dimensions D1 and E do not include mold flash protrusion and should be measured from the bottom of the package.
4.
Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane.
Mini Ball Grid Array - 6mm x 8mm
MILLIMETERS
INCHES Sym.
Min.Typ.Max.
Min.Typ Max.
REF.STD N0.Leads 36A 1.00— 1.35.039 —.053A1 0.24—.030.009 —.011A2.600
——
.023——D 7.908.008.10
.311
.314.318
D1 5.25BSC .206BSC E 5.90 6.00 6.10
.232
.236
.240
E1 3.75BSC .147BSC e
0.75BSC
.029BSC
Mini Ball Grid Array - 8mm x 10mm
MILLIMETER
INCHES Sym.
Min.Typ.Max.
Min.Typ Max.
REF.STD N0.Leads 36A 1.00— 1.35.039 —.053A1 0.24—0.030.009 —.011A2.600
——
.023——
D 9.9010.0010.10.389
.393.397
D1 5.25BSC .206BSC E 7.908.008.10
.311
.314.318E1 3.75BSC .147BSC e
0.75BSC
.029BSC
IS62WV2568ALL, IS62WV2568BLL ISSI?ORDERING INFORMATION
IS62WV2568ALL (1.65V - 2.2V)
Commercial Range: 0°C to +70°C
Speed (ns)Order Part No.Package
70IS62WV2568ALL-70T TSOP, TYPE I,
Industrial Range: –40°C to +85°C
Speed (ns)Order Part No.Package
70IS62WV2568ALL-70TI TSOP, TYPE I
70IS62WV2568ALL-70BI mini BGA (6mm x 8mm)
70IS62WV2568ALL-70HI sTSOP, TYPE I
IS62WV2568BLL (2.5V - 3.6V)
Commercial Range: 0°C to +70°C
Speed (ns)Order Part No.Package
70IS62WV2568BLL-70T TSOP, TYPE I
70IS62WV2568BLL-70B mini BGA (6mm x 8mm)
70IS62WV2568BLL-70H sTSOP, TYPE I
Industrial Range: –40°C to +85°C
Speed (ns)Order Part No.Package
55IS62WV2568BLL-55TI TSOP, TYPE I
55IS62WV2568BLL-55TLI TSOP, TYPE I, Lead-free
55IS62WV2568BLL-55BI mini BGA (6mm x 8mm)
55IS62WV2568BLL-55BLI mini BGA (6mm x 8mm), Lead-free
55IS62WV2568BLL-55HI sTSOP, TYPE I
55IS62WV2568BLL-55HLI sTSOP, TYPE I, Lead-free
70IS62WV2568BLL-70TI TSOP, TYPE I
70IS62WV2568BLL-70BI mini BGA (6mm x 8mm)
70IS62WV2568BLL-70HI sTSOP, TYPE I
14Integrated Silicon Solution, Inc. — https://www.wendangku.net/doc/1611273657.html, — 1-800-379-4774
Rev.B