文档库 最新最全的文档下载
当前位置:文档库 › Realtek ALC262 DataSheet 1.9

Realtek ALC262 DataSheet 1.9

ALC262-GR ALC262-VB Series (ALC262-VB0-GR, ALC262SRS-GR, ALC262H-GR) ALC262-VC Series (ALC262-VC1-GR, ALC262-VC2-GR) ALC262-VD Series (ALC262-VD2-GR, ALC262W-VD2-GR)
4-CHANNEL DAC AND 6-CHANNEL ADC HIGH DEFINITION AUDIO CODEC
DATASHEET
Rev. 1.9 15 April 2008 Track ID: JATR-1076-21
Realtek Semiconductor Corp.
No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan Tel.: +886-3-578-0211. Fax: +886-3-577-6047 https://www.wendangku.net/doc/2d10802618.html,

ALC262 Series Datasheet
COPYRIGHT ?2008 Realtek Semiconductor Corp. All rights reserved. No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language in any form or by any means without the written permission of Realtek Semiconductor Corp.
DISCLAIMER Realtek provides this document “as is”, without warranty of any kind, neither expressed nor implied, including, but not limited to, the particular purpose. Realtek may make improvements and/or changes in this document or in the product described in this document at any time. This document could include technical inaccuracies or typographical errors.
TRADEMARKS Realtek is a trademark of Realtek Semiconductor Corporation. Other names mentioned in this document are trademarks/registered trademarks of their respective owners.
USING THIS DOCUMENT This document is intended for the hardware and software engineer’s general information on the Realtek ALC262 Series Audio Codecs. Though every effort has been made to ensure that this document is current and accurate, more information may have become available subsequent to the production of this guide. In that event, please contact your Realtek representative for additional information that may help in the development process.
4-Ch DAC and 6-Ch ADC High Definition Audio Code
ii
Track ID: JATR-1076-21
Rev. 1.9

ALC262 Series Datasheet
REVISION HISTORY
Revision 1.0 1.1 1.2 1.3 Release Date 2005/05/02 2005/06/09 2005/08/25 2005/10/17 Summary First release. Update section 12 Ordering Information, page 78. Revise analog output port information in section 1 General Description, page 1. Add ordering information note (see section 12 Ordering Information, page 78). Revise Figure 2, page 7. Revise Table 84, page 72. Update section 122 Ordering Information, page 78. Update section 12 Ordering Information, page 78. Release for ALC262 ‘C’ version. Revise section 4 Block Diagram, page 6 Improve DAC/ADC filter characteristics, Table 79, page 68. Support low voltage (1.5V~3.3V) IO for HAD link. Add digital microphone input support (pins 2 and 46), see Figure 5, page 10. Add digital microphone application note (section 10.4 Digital Microphone Implementation, page 74). Update section 12 Ordering Information, page 78. Update section 12 Ordering Information, page 78. Cosmetic changes to Figure 5, page 10. Release for ALC262 ‘D’ version. This release was never checked/reviewed/approved Supports 2nd SPDIF output: Update section 8.2 Verb – Get Connection Select Control (Verb ID=F01h), page 40. Update section 8.3 Verb – Set Connection Select (Verb ID=701h), page 41. Meets Intel low power ECR compliant and power status control for all analog converter and pin widgets. See section 7.5 Power Management, page 28. Added information for all ALC262 series (version A/B/C/D). Added part number ALC262W-VD2-GR in section 12 Ordering Information, page 78.
1.4 1.5
2005/11/25 2006/06/22
1.6 1.7 1.8
2007/01/15 2007/01/22 2007/07/04
1.9
2008/04/15
4-Ch DAC and 6-Ch ADC High Definition Audio Code
iii
Track ID: JATR-1076-21
Rev. 1.9

ALC262 Series Datasheet
Table of Contents
1. 2. GENERAL DESCRIPTION ..............................................................................................................................................1 FEATURES .........................................................................................................................................................................3 2.1. 2.2. 3. 4. HARDWARE FEATURES ................................................................................................................................................3 SOFTWARE FEATURES ..................................................................................................................................................4
SYSTEM APPLICATIONS...............................................................................................................................................5 BLOCK DIAGRAM ...........................................................................................................................................................6 4.1. 4.2. 4.3. 4.4. ALC262 A/B VERSION ................................................................................................................................................6 ALC262 C VERSION ....................................................................................................................................................7 ALC262 D VERSION ....................................................................................................................................................8 ANALOG INPUT/OUTPUT UNIT .....................................................................................................................................9 ALC262 A/B VERSION ..............................................................................................................................................10 GREEN PACKAGE AND VERSION IDENTIFICATION ......................................................................................................10 ALC262 C VERSION ..................................................................................................................................................11 GREEN PACKAGE AND VERSION IDENTIFICATION ......................................................................................................11 ALC262 D VERSION ..................................................................................................................................................12 GREEN PACKAGE AND VERSION IDENTIFICATION ......................................................................................................12 DIGITAL I/O PINS .......................................................................................................................................................13 ANALOG I/O PINS ......................................................................................................................................................13 FILTER/REFERENCE....................................................................................................................................................14 POWER/GROUND ........................................................................................................................................................14
5.
PIN ASSIGNMENTS .......................................................................................................................................................10 5.1. 5.2. 5.3. 5.4. 5.5. 5.6.
6.
PIN DESCRIPTIONS.......................................................................................................................................................13 6.1. 6.2. 6.3. 6.4.
7.
HIGH DEFINITION AUDIO LINK PROTOCOL .......................................................................................................15 7.1. LINK SIGNALS ............................................................................................................................................................15 7.1.1. Signal Definitions .................................................................................................................................................16 7.1.2. Signaling Topology...............................................................................................................................................17 7.2. FRAME COMPOSITION ................................................................................................................................................18 7.2.1. Outbound Frame – Single SDO............................................................................................................................18 7.2.2. Outbound Frame – Multiple SDO ........................................................................................................................19 7.2.3. Inbound Frame – Single SDI ................................................................................................................................20 7.2.4. Inbound Frame – Multiple SDI ............................................................................................................................21 7.2.5. Variable Sample Rates .........................................................................................................................................21 7.3. RESET AND INITIALIZATION .......................................................................................................................................24 7.3.1. Link Reset .............................................................................................................................................................24 7.3.2. Codec Reset ..........................................................................................................................................................25 7.3.3. Codec Initialization Sequence ..............................................................................................................................26 7.4. VERB AND RESPONSE FORMAT ..................................................................................................................................27 7.4.1. Command Verb Format........................................................................................................................................27 7.4.2. Response Format..................................................................................................................................................27 7.5. POWER MANAGEMENT...............................................................................................................................................28 7.5.1. ALC262 A/B/C Versions .......................................................................................................................................28 7.5.2. ALC262 D Version ...............................................................................................................................................29
4-Ch DAC and 6-Ch ADC High Definition Audio Code
iv
Track ID: JATR-1076-21
Rev. 1.9

ALC262 Series Datasheet
8. SUPPORTED VERBS AND PARAMETERS................................................................................................................31 8.1. VERB – GET PARAMETERS (VERB ID=F00H).............................................................................................................31 8.1.1. Parameter – Vendor ID (Verb ID=F00h, Parameter ID=00h)............................................................................31 8.1.2. Parameter – Revision ID (Verb ID=F00h, Parameter ID=02h)..........................................................................32 8.1.3. Parameter – Subordinate Node Count (Verb ID=F00h, Parameter ID=04h) .....................................................32 8.1.4. Parameter – Function Group Type (Verb ID=F00h, Parameter ID=05h) ..........................................................32 8.1.5. Parameter – Audio Function Capabilities (Verb ID=F00h, Parameter ID=08h) ...............................................33 8.1.6. Parameter – Audio Widget Capabilities (Verb ID=F00h, Parameter ID=09h) ..................................................33 8.1.7. Parameter – Supported PCM Size, Rates (Verb ID=F00h, Parameter ID=0Ah) ................................................34 8.1.8. Parameter – Supported Stream Formats (Verb ID=F00h, Parameter ID=0Bh) .................................................35 8.1.9. Parameter – Pin Capabilities (Verb ID=F00h, Parameter ID=0Ch) ..................................................................35 8.1.10. Parameter – Amplifier Capabilities (Verb ID=F00h, Input Amplifier Parameter ID=0Dh) ..........................36 8.1.11. Parameter – Amplifier Capabilities (Verb ID=F00h, Output Amplifier Parameter ID=12h) ........................36 8.1.12. Parameter – Connect List Length (Verb ID=F00h, Parameter ID=0Eh) .......................................................37 8.1.13. Parameter – Supported Power States (Verb ID=F00h, Parameter ID=0Fh) (ALC262 A/B/C Version) ........37 8.1.14. Parameter – Supported Power States (Verb ID=F00h, Parameter ID=0Fh) (ALC262 D Version) ...............38 8.1.15. Parameter – Processing Capabilities (Verb ID=F00h, Parameter ID=10h)..................................................38 8.1.16. Parameter – GPIO Capabilities (Verb ID=F00h, Parameter ID=11h)..........................................................39 8.1.17. Parameter – Volume Knob Capabilities (Verb ID=F00h, Parameter ID=13h)..............................................39 8.2. VERB – GET CONNECTION SELECT CONTROL (VERB ID=F01H) ................................................................................40 8.3. VERB – SET CONNECTION SELECT (VERB ID=701H) .................................................................................................41 8.4. VERB – GET CONNECTION LIST ENTRY (VERB ID=F02H) .........................................................................................41 8.5. VERB – GET PROCESSING STATE (VERB ID=F03H) ...................................................................................................44 8.6. VERB – SET PROCESSING STATE (VERB ID=703H) ....................................................................................................44 8.7. VERB – GET COEFFICIENT INDEX (VERB ID=DH)......................................................................................................45 8.8. VERB – SET COEFFICIENT INDEX (VERB ID=5H) .......................................................................................................45 8.9. VERB – GET PROCESSING COEFFICIENT (VERB ID=CH) ............................................................................................45 8.10. VERB – SET PROCESSING COEFFICIENT (VERB ID=4H)..............................................................................................46 8.11. VERB – GET AMPLIFIER GAIN (VERB ID=BH) ...........................................................................................................46 8.12. VERB – SET AMPLIFIER GAIN (VERB ID=3H) ............................................................................................................48 8.13. VERB – GET CONVERTER FORMAT (VERB ID=AH)....................................................................................................49 8.14. VERB – SET CONVERTER FORMAT (VERB ID=2H) .....................................................................................................50 8.15. VERB – GET POWER STATE (VERB ID=F05H) (ALC262 A/B/C VERSION)................................................................51 8.16. VERB – GET POWER STATE (VERB ID=F05H) (ALC262 D VERSION) .......................................................................52 8.17. VERB – SET POWER STATE (VERB ID=705H) ............................................................................................................53 8.18. VERB – GET CONVERTER STREAM, CHANNEL (VERB ID=F06H) ...............................................................................53 8.19. VERB – SET CONVERTER STREAM, CHANNEL (VERB ID=706H) ................................................................................54 8.20. VERB – GET PIN WIDGET CONTROL (VERB ID=F07H) ..............................................................................................54 8.21. VERB – SET PIN WIDGET CONTROL (VERB ID=707H) ...............................................................................................55 8.22. VERB – GET UNSOLICITED RESPONSE CONTROL (VERB ID=F08H) ...........................................................................55 8.23. VERB – SET UNSOLICITED RESPONSE CONTROL (VERB ID=708H) ............................................................................56 8.24. VERB – GET PIN SENSE (VERB ID=F09H)..................................................................................................................56 8.25. VERB – EXECUTE PIN SENSE (VERB ID=709H)..........................................................................................................57 8.26. VERB – GET CONFIGURATION DEFAULT (VERB ID=F1CH) .......................................................................................57 8.27. VERB – SET CONFIGURATION DEFAULT BYTES 0, 1, 2, 3 (VERB ID=71CH/71DH/71EH/71FH FOR BYTES 0, 1, 2, 3) 58 8.28. VERB – GET BEEP GENERATOR (VERB ID=F0AH) ...................................................................................................58 8.29. VERB – SET BEEP GENERATOR (VERB ID=70AH) ....................................................................................................59 8.30. VERB – GET GPIO DATA (VERB ID=F15H)...............................................................................................................59 8.31. VERB – SET GPIO DATA (VERB ID=715H)................................................................................................................60 8.32. VERB – GET GPIO ENABLE MASK (VERB ID=F16H).................................................................................................60 8.33. VERB – SET GPIO ENABLE MASK (VERB ID=716H) .................................................................................................61 8.34. VERB – GET GPIO DIRECTION (VERB ID=F17H).......................................................................................................61 8.35. VERB – SET GPIO DIRECTION (VERB ID=717H) .......................................................................................................62 8.36. VERB – GET GPIO UNSOLICITED RESPONSE ENABLE MASK (VERB ID=F19H).........................................................62 8.37. VERB – SET GPIO UNSOLICITED RESPONSE ENABLE MASK (VERB ID=719H)..........................................................63 4-Ch DAC and 6-Ch ADC High Definition Audio Code v Track ID: JATR-1076-21 Rev. 1.9

ALC262 Series Datasheet
8.38. 8.39. 8.40. 8.41. 8.42. 9. VERB – FUNCTION RESET (VERB ID=7FFH) ..............................................................................................................63 VERB – GET DIGITAL CONVERTER CONTROL 1 & CONTROL 2 (VERB ID=F0DH, F0EH)...........................................64 VERB – SET DIGITAL CONVERTER CONTROL 1 & CONTROL 2 (VERB ID=70DH, 70EH)............................................65 GET/SET VOLUME KNOB WIDGET (NID=21H) (VERB ID=F0FH/70FH) ....................................................................66 GET/SET SUBSYSTEM ID [31:0] (VERB ID=F20H/723H~720H TO SET BIT[31:0]).....................................................66
ELECTRICAL CHARACTERISTICS ..........................................................................................................................67 9.1. DC CHARACTERISTICS ...............................................................................................................................................67 9.1.1. Absolute Maximum Ratings ..................................................................................................................................67 9.1.2. Threshold Voltage ................................................................................................................................................67 9.1.3. Digital Filter Characteristics ...............................................................................................................................68 9.1.4. S/PDIF Input/Output Characteristics...................................................................................................................68 9.2. AC CHARACTERISTICS ...............................................................................................................................................69 9.2.1. Link Reset and Initialization Timing.....................................................................................................................69 9.2.2. Link Timing Parameters at the Codec ..................................................................................................................70 9.2.3. S/PDIF Output and Input Timing .........................................................................................................................71 9.2.4. Test Mode .............................................................................................................................................................71 9.3. ANALOG PERFORMANCE ............................................................................................................................................72
10. 10.1. 10.2. 10.3. 10.4. 11. 11.1. 12.
APPLICATION NOTES .............................................................................................................................................73 APPLICATION CIRCUIT ...............................................................................................................................................73 VOLUME CONTROL VIA EXTERNAL VARIABLE RESISTOR .........................................................................................73 VOLUME CONTROL VIA GPIO0/GPIO1.....................................................................................................................74 DIGITAL MICROPHONE IMPLEMENTATION .................................................................................................................74 MECHANICAL DIMENSIONS.................................................................................................................................76 MECHANICAL DIMENSIONS NOTES ............................................................................................................................77 ORDERING INFORMATION ...................................................................................................................................78
4-Ch DAC and 6-Ch ADC High Definition Audio Code
vi
Track ID: JATR-1076-21
Rev. 1.9

ALC262 Series Datasheet
List of Tables
TABLE 1. TABLE 2. TABLE 3. TABLE 4. TABLE 5. TABLE 6. TABLE 7. TABLE 8. TABLE 9. TABLE 10. TABLE 11. TABLE 12. TABLE 13. TABLE 14. TABLE 15. TABLE 16. TABLE 17. TABLE 18. TABLE 19. TABLE 20. TABLE 21. TABLE 22. TABLE 23. TABLE 24. TABLE 25. TABLE 26. TABLE 27. TABLE 28. TABLE 29. TABLE 30. TABLE 31. TABLE 32. TABLE 33. TABLE 34. TABLE 35. TABLE 36. TABLE 37. TABLE 38. TABLE 39. TABLE 40. TABLE 41. TABLE 42. TABLE 43. TABLE 44. TABLE 45. TABLE 46. TABLE 47. TABLE 48. TABLE 49. TABLE 50. TABLE 51. TABLE 52. DIGITAL I/O PINS ........................................................................................................................................................13 ANALOG I/O PINS .......................................................................................................................................................13 FILTER/REFERENCE ....................................................................................................................................................14 POWER/GROUND.........................................................................................................................................................14 LINK SIGNAL DEFINITIONS .........................................................................................................................................16 HDA SIGNAL DEFINITIONS .........................................................................................................................................16 DEFINED SAMPLE RATE AND TRANSMISSION RATE ....................................................................................................22 48KHZ VARIABLE RATE OF DELIVERY TIMING ..........................................................................................................22 44.1KHZ VARIABLE RATE OF DELIVERY TIMING .......................................................................................................23 40-BIT COMMANDS IN 4-BIT VERB FORMAT...............................................................................................................27 40-BIT COMMANDS IN 12-BIT VERB FORMAT.............................................................................................................27 SOLICITED RESPONSE FORMAT ..................................................................................................................................27 UNSOLICITED RESPONSE FORMAT .............................................................................................................................27 SYSTEM POWER STATE DEFINITIONS .........................................................................................................................28 POWER CONTROLS IN NID IS 01H, 02H~05H, 07H~09H .............................................................................................28 ALC262 VERSION A/B/C POWERED DOWN CONDITIONS ..........................................................................................29 ALC262-VD SUPPORTS POWER CONTROLS IN NID 01H, 02H~03H, 06H, 07H~0AH, 10H~12H, 14H~1FH ................30 ALC262 VERSION D POWERED DOWN CONDITIONS .................................................................................................31 VERB – GET PARAMETERS (VERB ID=F00H).............................................................................................................31 PARAMETER – VENDOR ID (VERB ID=F00H, PARAMETER ID=00H)..........................................................................31 PARAMETER – REVISION ID (VERB ID=F00H, PARAMETER ID=02H) ........................................................................32 PARAMETER – SUBORDINATE NODE COUNT (VERB ID=F00H, PARAMETER ID=04H) ...............................................32 PARAMETER – FUNCTION GROUP TYPE (VERB ID=F00H, PARAMETER ID=05H) ......................................................32 PARAMETER – AUDIO FUNCTION CAPABILITIES (VERB ID=F00H, PARAMETER ID=08H)..........................................33 PARAMETER – AUDIO WIDGET CAPABILITIES (VERB ID=F00H, PARAMETER ID=09H).............................................33 PARAMETER – SUPPORTED PCM SIZE, RATES (VERB ID=F00H, PARAMETER ID=0AH) ...........................................34 PARAMETER – SUPPORTED STREAM FORMATS (VERB ID=F00H, PARAMETER ID=0BH)...........................................35 PARAMETER – PIN CAPABILITIES (VERB ID=F00H, PARAMETER ID=0CH) ...............................................................35 PARAMETER – AMPLIFIER CAPABILITIES (VERB ID=F00H, INPUT AMPLIFIER PARAMETER ID=0DH).......................36 PARAMETER – AMPLIFIER CAPABILITIES (VERB ID=F00H, OUTPUT AMPLIFIER PARAMETER ID=12H) ....................36 PARAMETER – CONNECT LIST LENGTH (VERB ID=F00H, PARAMETER ID=0EH) ......................................................37 PARAMETER – SUPPORTED POWER STATES (VERB ID=F00H, PARAMETER ID=0FH) (ALC262 A/B/C VERSION).....37 PARAMETER – SUPPORTED POWER STATES (VERB ID=F00H, PARAMETER ID=0FH) (ALC262 D VERSION) ............38 PARAMETER – PROCESSING CAPABILITIES (VERB ID=F00H, PARAMETER ID=10H)..................................................38 PARAMETER – GPIO CAPABILITIES (VERB ID=F00H, PARAMETER ID=11H) ............................................................39 PARAMETER – VOLUME KNOB CAPABILITIES (VERB ID=F00H, PARAMETER ID=13H) .............................................39 VERB – GET CONNECTION SELECT CONTROL (VERB ID=F01H) ................................................................................40 VERB – SET CONNECTION SELECT (VERB ID=701H) .................................................................................................41 VERB – GET CONNECTION LIST ENTRY (VERB ID=F02H) .........................................................................................41 VERB – GET PROCESSING STATE (VERB ID=F03H) ...................................................................................................44 VERB – SET PROCESSING STATE (VERB ID=703H) ....................................................................................................44 VERB – GET COEFFICIENT INDEX (VERB ID=DH)......................................................................................................45 VERB – SET COEFFICIENT INDEX (VERB ID=5H) .......................................................................................................45 VERB – GET PROCESSING COEFFICIENT (VERB ID=CH) ............................................................................................45 VERB – SET PROCESSING COEFFICIENT (VERB ID=4H)..............................................................................................46 VERB – GET AMPLIFIER GAIN (VERB ID=BH) ...........................................................................................................46 VERB – SET AMPLIFIER GAIN (VERB ID=3H).............................................................................................................48 VERB – GET CONVERTER FORMAT (VERB ID=AH)....................................................................................................49 VERB – SET CONVERTER FORMAT (VERB ID=2H) .....................................................................................................50 VERB – GET POWER STATE (VERB ID=F05H) (ALC262 A/B/C VERSION) ................................................................51 VERB – GET POWER STATE (VERB ID=F05H) (ALC262 D VERSION)........................................................................52 VERB – SET POWER STATE (VERB ID=705H).............................................................................................................53 vii Track ID: JATR-1076-21 Rev. 1.9
4-Ch DAC and 6-Ch ADC High Definition Audio Code

ALC262 Series Datasheet
TABLE 53. TABLE 54. TABLE 55. TABLE 56. TABLE 57. TABLE 58. TABLE 59. TABLE 60. TABLE 61. TABLE 62. TABLE 63. TABLE 64. TABLE 65. TABLE 66. TABLE 67. TABLE 68. TABLE 69. TABLE 70. TABLE 71. TABLE 72. TABLE 73. TABLE 74. TABLE 75. TABLE 76. TABLE 77. TABLE 78. TABLE 79. TABLE 80. TABLE 81. TABLE 82. TABLE 83. TABLE 84. TABLE 85. VERB – SET CONVERTER STREAM, CHANNEL (VERB ID=706H) ................................................................................54 VERB – GET PIN WIDGET CONTROL (VERB ID=F07H) ..............................................................................................54 VERB – SET PIN WIDGET CONTROL (VERB ID=707H) ...............................................................................................55 VERB – GET UNSOLICITED RESPONSE CONTROL (VERB ID=F08H) ...........................................................................55 VERB – SET UNSOLICITED RESPONSE CONTROL (VERB ID=708H) ............................................................................56 VERB – GET PIN SENSE (VERB ID=F09H)..................................................................................................................56 VERB – EXECUTE PIN SENSE (VERB ID=709H)..........................................................................................................57 VERB – GET CONFIGURATION DEFAULT (VERB ID=F1CH) .......................................................................................57 VERB – SET CONFIGURATION DEFAULT BYTES 0, 1, 2, 3 (VERB ID=71CH/71DH/71EH/71FH FOR BYTES 0, 1, 2, 3)58 VERB – GET BEEP GENERATOR (VERB ID=F0AH) ...................................................................................................58 VERB – SET BEEP GENERATOR (VERB ID=70AH) ....................................................................................................59 VERB – GET GPIO DATA (VERB ID=F15H)...............................................................................................................59 VERB – SET GPIO DATA (VERB ID=715H)................................................................................................................60 VERB – GET GPIO ENABLE MASK (VERB ID=F16H).................................................................................................60 VERB – SET GPIO ENABLE MASK (VERB ID=716H) .................................................................................................61 VERB – GET GPIO DIRECTION (VERB ID=F17H).......................................................................................................61 VERB – SET GPIO DIRECTION (VERB ID=717H) .......................................................................................................62 VERB – GET GPIO UNSOLICITED RESPONSE ENABLE MASK (VERB ID=F19H) .........................................................62 VERB – SET GPIO UNSOLICITED RESPONSE ENABLE MASK (VERB ID=719H)..........................................................63 VERB – FUNCTION RESET (VERB ID=7FFH) ..............................................................................................................63 VERB – GET DIGITAL CONVERTER CONTROL 1 & CONTROL 2 (VERB ID=F0DH, F0EH)...........................................64 VERB – SET DIGITAL CONVERTER CONTROL 1 & CONTROL 2 (VERB ID=70DH, 70EH) ............................................65 GET/SET VOLUME KNOB WIDGET (NID=21H) (VERB ID=F0FH/70FH) ....................................................................66 GET/SET SUBSYSTEM ID [31:0] (VERB ID=F20H / 723H~720H TO SET BIT[31:0])....................................................66 ABSOLUTE MAXIMUM RATINGS ................................................................................................................................67 THRESHOLD VOLTAGE ...............................................................................................................................................67 DIGITAL FILTER CHARACTERISTICS ...........................................................................................................................68 S/PDIF INPUT/OUTPUT CHARACTERISTICS ................................................................................................................68 LINK RESET AND INITIALIZATION TIMING..................................................................................................................69 LINK TIMING PARAMETERS AT THE CODEC ...............................................................................................................70 S/PDIF OUTPUT AND INPUT TIMING ..........................................................................................................................71 ANALOG PERFORMANCE ............................................................................................................................................72 ORDERING INFORMATION ..........................................................................................................................................78
4-Ch DAC and 6-Ch ADC High Definition Audio Code
viii
Track ID: JATR-1076-21
Rev. 1.9

ALC262 Series Datasheet
List of Figures
FIGURE 1. FIGURE 2. FIGURE 3. FIGURE 4. FIGURE 5. FIGURE 6. FIGURE 7. FIGURE 8. FIGURE 9. FIGURE 10. FIGURE 11. FIGURE 12. FIGURE 13. FIGURE 14. FIGURE 15. FIGURE 16. FIGURE 17. FIGURE 18. FIGURE 19. FIGURE 20. FIGURE 21. FIGURE 22. FIGURE 23. FIGURE 24. FIGURE 25. FIGURE 26. FIGURE 27. BLOCK DIAGRAM – ALC262 A/B VERSION ................................................................................................................6 BLOCK DIAGRAM – ALC262 C VERSION ....................................................................................................................7 BLOCK DIAGRAM – ALC262 D VERSION ....................................................................................................................8 ANALOG INPUT/OUTPUT UNIT.....................................................................................................................................9 ALC262 A/B VERSION PIN ASSIGNMENTS ................................................................................................................10 ALC262 C VERSION PIN ASSIGNMENTS ....................................................................................................................11 ALC262 D VERSION PIN ASSIGNMENTS....................................................................................................................12 HDA LINK PROTOCOL ...............................................................................................................................................15 BIT TIMING ................................................................................................................................................................16 SIGNALING TOPOLOGY .............................................................................................................................................17 SDO OUTBOUND FRAME ..........................................................................................................................................18 SDO STREAM TAG IS INDICATED IN SYNC ..............................................................................................................18 STRIPED STREAM ON MULTIPLE SDOS .....................................................................................................................19 SDI INBOUND STREAM .............................................................................................................................................20 SDI STREAM TAG AND DATA ...................................................................................................................................20 CODEC TRANSMITS DATA OVER MULTIPLE SDIS ....................................................................................................21 LINK RESET TIMING..................................................................................................................................................25 CODEC INITIALIZATION SEQUENCE ...........................................................................................................................26 CODEC INITIALIZATION SEQUENCE ...........................................................................................................................30 LINK RESET AND INITIALIZATION TIMING ................................................................................................................69 LINK SIGNALS TIMING ..............................................................................................................................................70 OUTPUT AND INPUT TIMING......................................................................................................................................71 VOLUME CONTROL BY EXTERNAL VARIABLE RESISTOR ..........................................................................................73 VOLUME CONTROL VIA GPIO0 AND GPIO1.............................................................................................................74 DIGITAL MICROPHONE IMPLEMENTATION-1.............................................................................................................74 DIGITAL MICROPHONE IMPLEMENTATION-2.............................................................................................................75 DIGITAL MICROPHONE TIMING .................................................................................................................................75
4-Ch DAC and 6-Ch ADC High Definition Audio Code
ix
Track ID: JATR-1076-21
Rev. 1.9

ALC262 Series Datasheet
1.
General Description
The ALC262 series are 4-Channel DAC and 6-Channel ADC High Definition Audio Codecs with UAA (Universal Audio Architecture). Featuring two 24-bit stereo DACs and three 24-bit stereo ADCs (the ALC262, ALC262-VB and ALC262-VC support 20-bit ADC format, the ALC262-VD supports 24-bit ADC format), they are designed for high-performance multimedia desktop and laptop systems. The ALC262 series incorporates proprietary converter technology to achieve over 100dB Signal-to-Noise ratio playback quality.
The ALC series meets the current WLP3.10 (Windows? Logo Program) requirements, and the ALC262-VD (D version) meets future WLP requirements that become effective from 01 June 2008, bringing PC sound quality closer to consumer electronic devices.
The ALC262 series provide 4 channels of DAC, supporting stereo sound playback on the rear panel and independent stereo sound output on the front panel simultaneously (multiple streaming), along with flexible mixing, mute, and fine gain control functions to provide a complete integrated audio solution.
The ALC262 series also integrates three stereo ADCs that can support a microphone array with Acoustic Echo Cancellation (AEC), Beam Forming (BF), and Noise Suppression (NS) technology simultaneously, significantly improving sound quality for PC VoIP applications. With this unique feature (3 stereo ADCs), the ALC262 can provide high-quality audio using S/PDIF to output analog data, or for multiple-source recording applications.
All analog IO are input and output capable and can be re-tasked according to user’s definitions. Headphone amplifiers are also integrated at analog output ports A, B, C, D, E, and F. The ALC262 series supports 16/20/24 S/PDIF input and output to offer easy connection of PCs to high quality consumer electronic products such as digital decoders and speakers.
The ALC262 series supports host/soft audio from the Intel ICH chipset, and also from any other HDA compatible audio controller. With EAX/Direct Sound 3D/I3DL2/A3D compatibility, and excellent software utilities like Karaoke mode, environment emulation, software equalizer, HRTF 3D positional audio, and optional Dolby?, SRS?, Fortemedia? and Waves? audio technology the ALC262 provides an excellent entertainment package and game experience for PC users.
4-Ch DAC and 6-Ch ADC High Definition Audio Code
1
Track ID: JATR-1076-21
Rev. 1.9

ALC262 Series Datasheet
Two functions are added in the ALC262 C version: ? Addition of a digital microphone interface. The ALC262 C version supports most digital microphones currently available. With digital microphone implementation, a notebook computer can achieve better voice input quality without noise interference caused by geometric PCB layout and radio frequency devices The ALC262 C supports scalable I/O voltage (1.5V to 3.3V) on an HDA link, which will be a requirement in future chipsets designed for low voltage operation.
?
The ALC262 D supports a secondary S/PDIF output converter and a dedicated output pin (S/PDIF-OUT2) to a HDMI transmitter, and all ADCs support up to192K sample rate and 24-bit PCM format. The ALC262 D version conforms to Intel’s Audio Codec low power state white paper and is ECR compliant, with improved frequency response at a 44.1kHz sampling rate, and THD+N measured at -1dB full scale in compliance with future WLP requirements that become effective from 01 June 2008.
Note: ALC262 version differences are listed in section 12 Ordering Information, page 78.
4-Ch DAC and 6-Ch ADC High Definition Audio Code
2
Track ID: JATR-1076-21
Rev. 1.9

ALC262 Series Datasheet
2.
2.1.
Features
Hardware Features
High-performance DACs with 100dB SNR ADCs with 90dB SNR (A-weighting) Meets WLP (Windows Logo Program) 3.10 and future WLP requirements that become effective from 01 June 2008 Two stereo DACs support 16/20/24-bit PCM for stereo audio playback on the rear panel, plus 2 channels of independent stereo sound output (multiple streaming) through the Front-Out-Left and Front-Out-Right channels Three stereo ADCs support 16/20-bit PCM for multiple input streaming (ALC262A/B/C versions) Three stereo ADCs support 16/20/24-bit PCM for multiple input streaming (ALC262D version) All DACs supports 44.1/48/96/192kHz sample rate All ADCs support 44.1/48/96kHz sample rate (ALC262 A/B/C version) All ADCs support 44.1/48/96/192kHz sample rate (ALC262 D version) 16/20/24-bit S/PDIF-OUT supports 44.1/48/96/192kHz sample rate 16/20/24-bit S/PDIF-IN supports 44.1/48/96/192kHz sample rate Up to four channels of microphone input are supported for AEC/BF applications Supports MONO line output with independent volume control High-quality analog differential CD input Supports external PCBEEP input and built-in digital BEEP generator Software selectable 2.5V/3.75V VREFOUT Two jack detection pins each designed to detect up to 4 jacks Wide range (–80dB ~ +42dB) volume control with 1.5dB resolution of analog to analog mixer gain All analog jacks are stereo input and output re-tasking for analog plug & play Built-in headphone amplifiers for port-A/D/E/F
4-Ch DAC and 6-Ch ADC High Definition Audio Code
3
Track ID: JATR-1076-21
Rev. 1.9

ALC262 Series Datasheet
Supports both analog DC volume control and GPI digital volume control (requires driver support) 4 GPIOs (General Purpose Input/Output) for customized applications Optional EAPD (External Amplifier Power Down) is supported Power support: Digital: 3.3V; Analog: 3.3V/5.0V Power management and enhanced power saving features 48-pin LQFP ‘Green’ package; pin compatible with the ALC260 Supports low voltage (1.5V~3.3V) IO for HDA link (ALC262 C/D version) Supports stereo digital microphone input (ALC262 C/D version) Supports 2nd S/PDIF output. (ALC262 D version) Intel low power ECR compliant and power status control for all widgets (ALC262 D version)
2.2.
Software Features
Meets Microsoft Windows Logo Program requirements EAX? 1.0 & 2.0 compatible Direct Sound 3D? compatible A3D? compatible I3DL2 compatible HRTF 3D Positional Audio (Windows XP only) Emulation of 26 sound environments to enhance gaming experience Multi-band software equalizer and tools Voice Cancellation and Key Shifting in Karaoke mode Dynamic range control (expander, compressor and limiter) with adjustable parameters Intuitive Configuration Panel (Realtek Audio Manager) to enhance user experience Provides 10-foot GUI for Windows Media Center
4-Ch DAC and 6-Ch ADC High Definition Audio Code
4
Track ID: JATR-1076-21
Rev. 1.9

ALC262 Series Datasheet
Microphone Acoustic Echo Cancellation (AEC), Noise Suppression (NS), and Beam Forming (BF) technology for voice application Smart multiple streaming operation HDMI audio driver for AMD platform Dolby? PCEE program? (optional software feature) SRS? TrueSurround HD (optional software feature) Fortemedia? SAM? technology for voice processing (Beam Forming and Acoustic Echo Cancellation) (optional software feature) MaxxAudio technologies from Waves (optional software feature, ALC262-VD2 only)
3.
System Applications
Multimedia desktop and laptop PCs Information appliances (IA)
4-Ch DAC and 6-Ch ADC High Definition Audio Code
5
Track ID: JATR-1076-21
Rev. 1.9

ALC262 Series Datasheet
4.
4.1.
Block Diagram
ALC262 A/B Version
Figure 1.
Block Diagram – ALC262 A/B Version 6 Track ID: JATR-1076-21 Rev. 1.9
4-Ch DAC and 6-Ch ADC High Definition Audio Code

ALC262 Series Datasheet
4.2.
ALC262 C Version
Note: The ALC262 C Version supports digital MIC (DMIC-CLK, DMIC-DATA).
Figure 2.
Block Diagram – ALC262 C Version 7 Track ID: JATR-1076-21 Rev. 1.9
4-Ch DAC and 6-Ch ADC High Definition Audio Code

4.3.
0Eh 03h DAC M M VOL VOL
Boost LOUT1 LOUT2 1
M M
/2 VOL
MONO LOUT2
MONO
PCM- OUT
0Dh M O 15h I/OA 14h I/OA
16h
MONO OUT HP-OUT(Port-A)
PCM- OUT
02h DAC M M M M
0Ch
LOUT1
LOUT1 LOUT2 1
Digital Interface
0Bh BEEP Gen VOL M VOL M
Boost
LINE-OUT(Port-D) BEEP-IN 1Dh CD-IN 1Ch
ALC262 D Version
Figure 3.
VOL VOL VOL VOL VOL VOL
LOUT1 1 LOUT2 Boost
1
Verb Control Parameters
M 22h
LOUT1 1 LOUT2 Boost
M M M M M M M M M M M M M M M M M M
4-Ch DAC and 6-Ch ADC High Definition Audio Code
M M M M M M I/OA 1Bh
LINE2( Port-E)
1Ah M I/OA M
09h ADC VOL M 23h
PCM-IN
Block Diagram – ALC262 D Version
LOUT1 1 LOUT2 Boost LOUT1 1 LOUT2
Note: The ALC262 D Version supports digital MIC (DMIC-CLK, DMIC-DATA) and S/DPIF-OUT2.
8
08h ADC VOL M 24h 07h ADC VOL M 06h S/PDIF-OUT 10h S/PDIF-OUT2 0Ah
Volume Knob
Digital Converter Digital Converter
LINE1( Port-C)
I/OA M
Boost
19h
PCM-IN
MIC2( Port-F)
18h I/OA
MIC1( Port-B)
OA : Output w/ Amplifier
PCM-IN
Digitaql MIC Input S/ PDIF- OUT
1Eh
12h
S/ PDIF-OUT2
S/PDIF-IN
Digital Converter
11h
Track ID: JATR-1076-21
Up/ Down Mute 21h
S/PDIF-IN
1Fh
ALC262 Series Datasheet
Rev. 1.9

ALC262 Series Datasheet
4.4.
Analog Input/Output Unit
A EN_OBUF EN_AMP EN_OBUF
Pin Complex widgets NID=14h~16h, 18h~1Bh are re-tasking IO.
R
Output_Signal_Left Output_Signal_Right Input_Signal_Left Input_Signal_Right
R
Left Right
EN_IBUF
Figure 4.
Analog Input/Output Unit
4-Ch DAC and 6-Ch ADC High Definition Audio Code
9
Track ID: JATR-1076-21
Rev. 1.9

ALC262 Series Datasheet
5.
5.1.
Pin Assignments
ALC262 A/B Version
Note: C and D versions (Figure 6, page 11, and Figure 7, page 12) support digital MIC (pin 2, 46) and Scalable I/O Power (pin 9).
Figure 5.
ALC262 A/B Version Pin Assignments
5.2.
Green Package and Version Identification
Green package is indicated by a ‘G’ in the location marked ‘T’ in Figure 5. The version number is shown in the location marked ‘VV’. For example, ‘VV=B0’ indicates silicon version ‘B’ and stepping version ‘0’, which is the first stepping of the ALC262 version B.
4-Ch DAC and 6-Ch ADC High Definition Audio Code 10 Track ID: JATR-1076-21 Rev. 1.9

ALC262 Series Datasheet
5.3.
ALC262 C Version
The C version supports digital MIC (pin 2, 46) and Scalable I/O Power (pin 9).
Figure 6.
ALC262 C Version Pin Assignments
5.4.
Green Package and Version Identification
Green package is indicated by a ‘G’ in the location marked ‘T’ in Figure 6. The version number is shown in the location marked ‘VV’. For example, ‘VV=C0’ indicates silicon version ‘C’ and stepping version ‘0’, which is the first stepping of the ALC262-VC.
4-Ch DAC and 6-Ch ADC High Definition Audio Code 11 Track ID: JATR-1076-21 Rev. 1.9

相关文档