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IS62LV12816L-100T中文资料

FEATURES

?High-speed access time: 70, 100, and 120 ns ?CMOS low power operation

– 120 mW (typical) operating

– 6 μW (typical) CMOS standby

?TTL compatible interface levels

?Single 3V ± 10% V CC power supply

?Fully static operation: no clock or refresh required

?Three state outputs

?Data control for upper and lower bytes ?Industrial temperature available

?Available in the 44-pin TSOP (Type II) and 48-pin mini BGA DESCRIPTION

The ISSI IS62LV12816L is a high-speed, 2,097,152-bit static RAM organized as 131,072 words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices.

When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels.

Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory.

A data byte allows Upper Byte (UB) and Lower Byte (LB) access.

The IS62LV12816L is packaged in the JEDEC standard 44-pin TSOP (Type II) and 48-pin mini BGA.

The specification contains ADVANCE INFORMATION. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. ? Copyright 1998, Integrated Silicon Solution, Inc.

IS62LV12816L

2Integrated Silicon Solution, Inc.

ADVANCE INFORMATION SR002-0C

ISSI

PIN CONFIGURATIONS 44-Pin TSOP (Type II)

TRUTH TABLE

I/O PIN

Mode

WE CE OE LB UB I/O0-I/O7I/O8-I/O15Vcc Current Not Selected X H X X X High-Z High-Z I SB 1, I SB 2

Output Disabled H L H X X High-Z High-Z I CC

X L X H H High-Z High-Z Read

H L L L H D OUT High-Z I CC

H L L H L High-Z D OUT H L L L L D OUT D OUT Write L L X L H D IN High-Z I CC

L L X H L High-Z D IN L

D IN

PIN DESCRIPTIONS

A0-A16Address Inputs I/O0-I/O15Data Inputs/Outputs CE

Chip Enable Input OE Output Enable Input WE

Write Enable Input

LB Lower-byte Control (I/O0-I/O7)UB Upper-byte Control (I/O8-I/O15)NC No Connection Vcc Power GND

Ground

48-Pin mini BGA

IS62LV12816L

ISSI

POWER SUPPLY CHARACTERISTICS (1) (Over Operating Range)

-70-100-120Symbol Parameter Test Conditions Min.Max.Min.Max.Min.Max.Unit I CC Vcc Dynamic Operating V CC = Max.,

Com.—40—30—20mA Supply Current I OUT = 0 mA, f = f MAX Ind.—60—50—40I SB 1

TTL Standby Current V CC = Max.,Com.—0.4—0.4—0.4mA

(TTL Inputs)

V IN = V IH or V IL Ind.— 1.0— 1.0— 1.0CE ≥ V IH , f = 0I SB 2CMOS Standby

V CC = Max.,

Com.—15—15—15μA

Current (CMOS Inputs)

CE ≥ V CC – 0.2V,Ind.

—

V IN ≥ V CC – 0.2V, or V IN ≤ 0.2V, f = 0

Note:

1.At f = f MAX , address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

DC ELECTRICAL CHARACTERISTICS (Over Operating Range)

Symbol Parameter

Test Conditions Min.Max.Unit V OH Output HIGH Voltage V CC = Min., I OH = –1 mA 2.0—V V OL Output LOW Voltage V CC = Min., I OL = 2.1 mA

—0.4V V IH Input HIGH Voltage 2.2V CC + 0.2V V IL (1)Input LOW Voltage –0.20.4V I LI Input Leakage GND ≤ V IN ≤ V CC

–11μA I LO

Output Leakage

GND ≤ V OUT ≤ V CC , Outputs Disabled –1

μA

Notes:

1.V IL (min.) = –

2.0V for pulse width less than 10 ns.

ABSOLUTE MAXIMUM RATINGS (1)

Symbol Parameter

Value

Unit V TERM Terminal Voltage with Respect to GND –0.5 to Vcc+0.5V T BIAS Temperature Under Bias –40 to +85°C V CC Vcc Related to GND –0.3 to +4.0V T STG Storage Temperature –65 to +150

°C P T

Power Dissipation

1.0

Note:

1.Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

OPERATING RANGE

Range

Ambient Temperature

V CC

Commercial 0°C to +70°C 3.0V ± 10%Industrial

–40°C to +85°C

3.0V ± 10%

IS62LV12816L

4Integrated Silicon Solution, Inc.

ADVANCE INFORMATION SR002-0C

ISSI

AC TEST CONDITIONS

Parameter

Unit Input Pulse Level

0.4V to 2.2V

Input Rise and Fall Times 5 ns Input and Output Timing 1.5V and Reference Level Output Load

See Figures 1 and 2

AC TEST LOADS

CAPACITANCE (1)

Symbol Parameter Conditions Max.Unit C IN Input Capacitance V IN = 0V 6pF C OUT

Input/Output Capacitance

V OUT = 0V

Note:

1.Tested initially and after any design or process changes that may affect these parameters.

Figure 1

Figure 2

IS62LV12816L

ISSI

READ CYCLE SWITCHING CHARACTERISTICS (1) (Over Operating Range)

-70

-100-120Symbol

Parameter Min.Max.Min.Max.Min.Max.Unit t RC Read Cycle Time 70—100—120—ns t AA Address Access Time —70—100—120ns t OHA Output Hold Time 10—15—15—ns t ACE CE Access Time —70—100—120ns t DOE OE Access Time —35—50—60ns t HZOE (2)OE to High-Z Output —25—30040ns t LZOE (2)OE to Low-Z Output 5—5—5—ns t HZCE (2)CE to High-Z Output 025030040ns t LZCE (2)CE to Low-Z Output 10—10—10—ns t BA LB , UB Access Time —35—50—60ns t HZB LB , UB to High-Z Output 025035050ns t LZB

LB , UB to Low-Z Output

—

Notes:

1.Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0.4 to

2.2V and output loading specified in Figure 1.

2.Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

AC WAVEFORMS

READ CYCLE NO. 1(1,2) (Address Controlled) (CE = OE = V IL , UB or LB = V IL )

IS62LV12816L

6Integrated Silicon Solution, Inc.

ADVANCE INFORMATION SR002-0C

ISSI

WRITE CYCLE SWITCHING CHARACTERISTICS (1,2) (Over Operating Range)

-70

-100-120Symbol

Parameter Min.Max.Min.Max.Min.Max.Unit t WC Write Cycle Time 70—100—120—ns t SCE CE to Write End

65—80—100—ns t AW Address Setup Time to Write End 65—80—100—ns t HA Address Hold from Write End 0—0—0—ns t SA Address Setup Time 0—0—0—ns t PWB LB , UB Valid to End of Write 60—80—100—ns t PWE WE Pulse Width 60—80—100—ns t SD Data Setup to Write End 30—40—50—ns t HD Data Hold from Write End 0—0—0—ns t HZWE (3)WE LOW to High-Z Output —30—40—50ns t LZWE (3)

WE HIGH to Low-Z Output

—

Notes:

1.Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0.4V to

2.2V and output loading specified in Figure 1.

2.The internal write time is defined by the overlap of CE LOW and UB or LB , and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write.

3.Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

AC WAVEFORMS READ CYCLE NO. 2(1,3)

1.WE is HIGH for a Read Cycle.

2.The device is continuously selected. OE , CE , UB , or LB = V IL .

3.Address is valid prior to or coincident with CE LOW transition.

ISSI?IS62LV12816L

AC WAVEFORMS

WRITE CYCLE NO. 1(1,2)(WE Controlled) Array

Notes:

1.WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE

inputs and at least one of the LB and UB inputs being in the LOW state.

2.WRITE = (CE) [ (LB) = (UB) ] (WE).

IS62LV12816L

8Integrated Silicon Solution, Inc.

ADVANCE INFORMATION SR002-0C

ISSI

DATA RETENTION SWITCHING CHARACTERISTICS

Symbol

Parameter

Test Condition

Min.Max.Unit V DR

Vcc for Data Retention See Data Retention Waveform 1.5 3.3V I DR

Data Retention Current Vcc = 2.0V, CE ≥ Vcc – 0.2V —15μA t SDR Data Retention Setup Time See Data Retention Waveform 0

—ns t RDR

Recovery Time

See Data Retention Waveform

t RC

—

DATA RETENTION WAVEFORM (CE Controlled)

IS62LV12816L

ISSI

Integrated Silicon Solution, Inc.

2231 Lawson Lane Santa Clara, CA 95054Fax: (408) 588-0806Toll Free: 1-800-379-4774

email: sales@https://www.wendangku.net/doc/3e14242568.html, https://www.wendangku.net/doc/3e14242568.html,

ISSI

ORDERING INFORMATION Commercial Range: 0°C to +70°C

Speed (ns)

Order Part No.Package 70IS62LV12816L-70T TSOP (Type II)70IS62LV12816L-70B Mini BGA 100IS62LV12816L-100T TSOP (Type II)100IS62LV12816L-100B Mini BGA 120IS62LV12816L-120T TSOP (Type II)120

IS62LV12816L-120B

Mini BGA

Industrial Range: –40°C to +85°C

Speed (ns)

Order Part No.Package 70IS62LV12816L-70TI TSOP (Type II)70IS62LV12816L-70BI

Mini BGA

100IS62LV12816L-100TI TSOP (Type II)100IS62LV12816L-100BI Mini BGA 120IS62LV12816L-120TI TSOP (Type II)120

IS62LV12816L-120BI Mini BGA