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PO74G38072A中文资料

PO74G38072A中文资料
PO74G38072A中文资料

FEATURES:

DESCRIPTION:

. Patented technology

. Max input frequency > 1GHz

. Operating frequency up to 1GHz with 2pf load . Operating frequency up to 700MHz with 5pf load . Operating frequency up to 400MHz with 15pf load . Operating frequency up to 200MHz with 50pf load . Very low output pin to pin skew < 20ps . VCC = 1.65V to 3.6V

. Propagation delay < 1.3ns max with 15pf load . Low input capacitance: 3pf typical . 1:2 fanout

. Available in 8 pin SOIC package

Potato Semiconductor’s PO74G38072A is designed for world top performance using submicron CMOS technology to achieve 1GHz TTL output frequency with less than 20ps output pin to pin skew.

PO74G38072A is a 3.3V CMOS 1 input to 2 outputs Buffered driver to achieve 1GHz output frequency. Typical applications are clock and signal distribution.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as

translators in a mixed 3.3V/5V system environment.

Pin Configuration Logic Block Diagram

Pin Description

Pin Name Description t u p n I

N I

Outputs

Ox

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1

1GHz TTL/CMOS Potato Chip

Maximum Ratings

DC Electrical Characteristics

Symbol

Description

Test Conditions

Min Typ Max Unit

V OH Output High voltage Vcc=3V Vin=V IH or V IL , I OH = -12mA 2.4 3 - V V OL Output Low voltage Vcc=3V Vin=V IH or V IL , I OH =12mA - 0.3 0.5 V V IH Input High voltage Guaranteed Logic HIGH Level (Input Pin) 2 - Vcc V V IL Input Low voltage Guaranteed Logic LOW Level (Input Pin)-0.5 - 0.8 V I IH Input High current Vcc = 3.6V and Vin = 5.5V - - 1 uA I IL Input Low current Vcc = 3.6V and Vin = 0V - -

-1

uA V IK

Clamp diode voltage

Vcc = Min. And I IN = -18mA

-

-0.7 -1.2

V

Notes:

1.For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2.Typical values are at Vcc =

3.3V, 25 °C ambient.

3.This parameter is guaranteed but not tested.

4.Not more than one output should be shorted at one time. Duration of the test should not exceed one second.

5.

VoH = Vcc – 0.6V at rated current

Description Max Unit Storage Temperature -65 to 150 °C Operation Temperature -40 to 85 °C Operation Voltage -0.5 to +4.6 V Input Voltage -0.5 to +5.5 V Output Voltage

-0.5 to Vcc+0.5

V

Note:

stresses greater than listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability specification is not implied.

02/13/07

2

1GHz TTL/CMOS Potato Chip

Power Supply Characteristics

Symbol

Description

Test Conditions (1)

Min Typ Max Unit

Icc Q Quiescent Power Supply Current Vcc=Max, Vin=Vcc or GND - 0.1 30 uA !Icc

Power Supply Current per Input High

Vcc=Max, Vin= Vcc-0.6V

-

50

300

uA

Notes:

1.For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2.Typical values are at Vcc =

3.3V, 25°C ambient. 3.This parameter is guaranteed but not tested.

4.Not more than one output should be shorted at one time. Duration of the test should not exceed one second.

5.

VoH = Vcc – 0.6V at rated current

Capacitance

Parameters (1)

Description

Test Conditions

Typ Max Unit

Cin Input Capacitance Vin = 0V 3 4 pF

Cout

Output Capacitance

Vout = 0V

-

6

pF

Notes:

1This parameter is determined by device characterization but not production tested.

Switching Characteristics

t i n U x a M

)1( s n o i t i d n o C t s e T

n o i t p i r c s e D

l o b m y S t PLH Propagation Delay A to Bn CL = 15pF 1.3 ns t PHL Propagation Delay A to Bn CL = 15pF 1.3 ns tr/tf Rise/Fall Time

0.8V – 2.0V

0.8 ns tsk(o)Output Pin to Pin Skew (Same Package) CL = 15pF, 125MHz 20ps tsk(pp) Output Skew (Different Package) CL = 15pF, 125MHz

0.25 ns

fmax F p 05 = L C y c n e u q e r F t u p n I 200 MHz fmax F p 51

= L C y c n e u q e r F t u p n I 400 MHz fmax F p 5 = L C y c n e u q e r F t u p n I 700 MHz fmax

F p 2 = L C

y c n e u q e r F t u p n I 1000

MHz

Notes:

1.See test circuits and waveforms.

2.tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested.

3.Airflow of 1m/s is recommended for frequencies above 133MHz

3

1GHz TTL/CMOS Potato Chip

Test Circuit

4

1GHz TTL/CMOS Potato Chip

Test Waveforms

02/13/07

5

1GHz TTL/CMOS Potato Chip

Packaging Mechanical Drawing: 8 pin SOIC

02/13/07

Ordering Information

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