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IS64WV6416BLL-15TA3中文资料

ISSI

Copyright ? 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any IS64WV6416BLL IS61WV6416BLL

FUNCTIONAL BLOCK DIAGRAM

64K x 16 HIGH-SPEED CMOS STATIC RAM

NOVEMBER 2005

FEATURES

?High-speed access time:12 ns: 3.3V + 10%15 ns: 2.5V-3.6V

?CMOS low power operation:50 mW (typical) operating 25 μW (typical) standby

?TTL compatible interface levels

?Fully static operation: no clock or refresh required

?Three state outputs

?Data control for upper and lower bytes ?Automotive Temperature Available ?Lead-free available

DESCRIPTION

The ISSI IS61/64WV6416BLL is a high-speed, 1,048,576-bit static RAM organized as 65,536 words by 16 bits. It is fabricated using ISSI 's high-performance CMOS technology. This highly reliable process coupled with inno-vative circuit design techniques, yields access times as fast as 12ns (3.3V + 10%) and 15ns (2.5V-3.6V) with low power consumption.

When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels.

Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE . The active LOW Write Enable (WE ) controls both writing and reading of the memory. A data byte allows Upper Byte (UB ) and Lower Byte (LB ) access.

The IS61/64WV6416BLL is packaged in the JEDEC stan-dard 44-pin TSOP-II, and 48-pin mini BGA (6mm x 8mm).

ISSI

IS64WV6416BLL IS61WV6416BLL

PIN CONFIGURATIONS 44-Pin TSOP-II

48-Pin mini BGA (6mm x 8mm)

PIN DESCRIPTIONS

A0-A15Address Inputs I/O0-I/O15Data Inputs/Outputs CE Chip Enable Input OE Output Enable Input WE Write Enable Input

LB Lower-byte Control (I/O0-I/O7)UB Upper-byte Control (I/O8-I/O15)NC No Connection V DD Power GND

Ground

1 2 3 4 5 6

A B C D E F G H

LB OE A0A1A2NC I/O 8UB A3A4CE I/O 0I/O 9I/O 10A5A6I/O 1I/O 2GND I/O 11NC A7I/O 3V DD V DD I/O 12NC NC I/O 4GND I/O 14I/O 13A14A15I/O 5I/O 6I/O 15NC A12A13WE I/O 7NC

A10

A11

12345678910111213141516171819202122

44434241403938373635343332313029282726252423A15A14A13A12A11CE I/O0I/O1I/O2I/O3V DD GND I/O4I/O5I/O6I/O7WE A10A9A8A7NC

A0A1A2OE UB LB I/O15I/O14I/O13I/O12GND V DD I/O11I/O10I/O9I/O8NC A3A4A5A6NC

ISSI

IS64WV6416BLL IS61WV6416BLL

OPERATING RANGE (V DD )

Range

Ambient Temperature

V DD (15 ns)V DD (12 ns)Commercial 0°C to +70°C 2.5V-3.6V 3.3V + 10%Industrial –40°C to +85°C 2.5V-3.6V 3.3V + 10%Automotive

–40°C to +125°C

2.5V-

3.6V

3.3V + 10%

ABSOLUTE MAXIMUM RATINGS (1)

Symbol Parameter

Value

Unit V TERM Terminal Voltage with Respect to GND –0.5 to V DD +0.5V T STG Storage Temperature –65 to +150

°C P T Power Dissipation 1.5W V DD

V DD Related to GND

-0.2 to +3.9

Note:

1.Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

TRUTH TABLE

I/O PIN

Mode

WE CE OE LB UB I/O0-I/O7I/O8-I/O15V DD Current Not Selected X H X X X High-Z High-Z I SB 1, I SB 2

Output Disabled H L H X X High-Z High-Z I CC

X L X H H High-Z High-Z Read

H L L L H D OUT High-Z I CC

H L L H L High-Z D OUT H L L L L D OUT D OUT Write L L X L H D IN High-Z I CC

L L X H L High-Z D IN L

D IN

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IS64WV6416BLL IS61WV6416BLL

DC ELECTRICAL CHARACTERISTICS (Over Operating Range)V DD = 2.5V-3.6V

Symbol Parameter

Test Conditions

Min.Max.Unit

V OH Output HIGH Voltage V DD = Min., I OH = –1.0 mA 2.3—V V OL Output LOW Voltage V DD = Min., I OL = 1.0 mA

—0.4V V IH Input HIGH Voltage 2.0V DD + 0.3V V IL Input LOW Voltage (1)–0.3

0.8V I LI Input Leakage GND ≤ V IN ≤ V DD

–22μA I LO Output Leakage

GND ≤ V OUT ≤ V DD , Outputs Disabled

–2

μA

Note:

V IL (min.) = –0.3V DC; V IL (min.) = –2.0V AC (pulse width - 2.0 ns). Not 100% tested.

V IH (max.) = V DD + 0.3V DC; V IH (max.) = V DD + 2.0V AC (pulse width - 2.0 ns). Not 100% tested.

DC ELECTRICAL CHARACTERISTICS (Over Operating Range)V DD = 3.3V + 10%

Symbol Parameter

Test Conditions

Min.Max.Unit V OH Output HIGH Voltage V DD = Min., I OH = –4.0 mA 2.4—V V OL Output LOW Voltage V DD = Min., I OL = 8.0 mA

—0.4V V IH Input HIGH Voltage 2V DD + 0.3V V IL Input LOW Voltage (1)–0.3

0.8V I LI Input Leakage GND ≤ V IN ≤ V DD

–22μA I LO Output Leakage

GND ≤ V OUT ≤ V DD , Outputs Disabled

–2

μA

Note:

V IL (min.) = –0.3V DC; V IL (min.) = –2.0V AC (pulse width - 2.0 ns). Not 100% tested.

V IH (max.) = V DD + 0.3V DC; V IH (max.) = V DD + 2.0V AC (pulse width - 2.0 ns). Not 100% tested.

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IS64WV6416BLL IS61WV6416BLL

CAPACITANCE (1)

Symbol Parameter Conditions Max.Unit C IN Input Capacitance V IN = 0V 6pF C OUT

Input/Output Capacitance

V OUT = 0V

Note:

1.Tested initially and after any design or process changes that may affect these parameters.

POWER SUPPLY CHARACTERISTICS (1) (Over Operating Range)

-12 ns -15 ns

Symbol Parameter Test Conditions Options Min.Max.

Min.Max.Unit I CC

V DD Dynamic Operating V DD = Max.,

COM .—35—30mA

Supply Current

I OUT = 0 mA, f = f MAX

IND .—45—40AUTO

—60—50typ.(2)

—20—20I CC 1

Operating Supply V DD = Max.,COM .—5—5mA

Current

Iout = 0mA, f = 0IND .—5—5AUTO

—5—5I SB 2CMOS Standby

V DD = Max.,COM .—20—20uA

Current (CMOS Inputs)

CE ≥ V DD – 0.2V,IND .—50—50V IN ≥ V DD – 0.2V, or AUTO

—75—75V IN ≤ 0.2V, f = 0

typ.(2)

—

Note:

1.At f = f MAX , address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

2. Typical values are measured at V DD =2.5V, T A =25o C. Not 100% tested.

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AC TEST CONDITIONS

Parameter

Unit Unit (2.5V-3.6V)(3.3V + 10%)Input Pulse Level

0V to V DD V 0V to V DD V Input Rise and Fall Times 1.5ns 1.5ns Input and Output Timing V DD /2V DD /2 + 0.05and Reference Level (V Ref )Output Load

See Figures 1a and 1b

AC TEST LOADS

Figure 1a.

Figure 1b.

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IS64WV6416BLL IS61WV6416BLL

READ CYCLE SWITCHING CHARACTERISTICS (1) (Over Operating Range)

-12 ns

-15 ns Symbol

Parameter Min.Max.

Min.Max.Unit t RC Read Cycle Time 12—15—ns t AA Address Access Time —12—15ns t OHA Output Hold Time 3—3—ns t ACE CE Access Time —12—15ns t DOE OE Access Time —6—7ns t HZOE (2)OE to High-Z Output —606ns t LZOE (2)OE to Low-Z Output 0—0—ns t HZCE (2CE to High-Z Output 0606ns t LZCE (2)CE to Low-Z Output 3—3—ns t BA LB , UB Access Time —6—7ns t HZB LB , UB to High-Z Output 0606ns t LZB

LB , UB to Low-Z Output

—

Notes:

1.Test conditions assume signal transition times of 1.5 ns or less, timing reference levels of 1.25V, input pulse levels of 0V to V DD V and output loading specified in Figure 1a.

2.Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

3.Not 100% tested.

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READ CYCLE NO. 2(1,3)

AC WAVEFORMS

READ CYCLE NO. 1(1,2) (Address Controlled) (CS = OE = V IL , UB or LB = V IL )

Notes:

1.WE is HIGH for a Read Cycle.

2.The device is continuously selected. OE , CE , UB , or LB = V IL .

3.Address is valid prior to or coincident with CE LOW transition.

ISSI

IS64WV6416BLL IS61WV6416BLL

WRITE CYCLE SWITCHING CHARACTERISTICS (1,2) (Over Operating Range)

-12 ns -15 ns Symbol

Parameter Min.Max.

Min.Max.Unit t WC Write Cycle Time 12—15—ns t SCE CE to Write End 9—10—ns t AW Address Setup Time 9—10—ns to Write End

t HA Address Hold from Write End 0—0—ns t SA Address Setup Time 0—0—ns t PWB LB , UB Valid to End of Write 9—10—ns t PWE 1WE Pulse Width (OE = HIGH)9—10—ns t PWE 2WE Pulse Width (OE = LOW)11—12—ns t SD Data Setup to Write End 9—9—ns t HD Data Hold from Write End 0—0—ns t HZWE (3)WE LOW to High-Z Output —6—7ns t LZWE (3)

WE HIGH to Low-Z Output

—

Notes:

1.Test conditions for IS61WV6416BLL assume signal transition times of 1.5ns or less, timing reference levels of 1.25V, input pulse levels of 0V to V DD V and output loading specified in Figure 1a.

2.Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

3.The internal write time is defined by the overlap of CE LOW and UB or LB , and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write.

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IS64WV6416BLL IS61WV6416BLL

WRITE CYCLE NO. 1(1,2) (CE Controlled, OE = HIGH or LOW)

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IS64WV6416BLL IS61WV6416BLL

WRITE CYCLE NO. 2(1) (WE Controlled, OE = HIGH during Write Cycle)

WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle)

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WRITE CYCLE NO. 4 (LB , UB Controlled, Back-to-Back Write) (1,3)

Notes:

1.The internal Write time is defined by the overlap of CE = LOW, UB and/or LB = LOW, and WE = LOW. All signals must be in valid states to initiate a Write, but any can be deasserted to terminate the Write. The t SA , t HA , t SD , and t HD timing is referenced to the rising or falling edge of the signal that terminates the Write.

2.Tested with OE HIGH for a minimum of 4 ns before WE = LOW to place the I/O in a HIGH-Z state.

3.WE may be held LOW across many address cycles and the LB , UB pins can be used to control the Write function.

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IS64WV6416BLL IS61WV6416BLL

DATA RETENTION WAVEFORM (CE Controlled)

DATA RETENTION SWITCHING CHARACTERISTICS

Symbol

Parameter

Test Condition

Operations

Min.Typ.(1)Max.Unit V DR

V DD for Data Retention See Data Retention Waveform

1.8— 3.6V I DR

Data Retention Current

V DD = 1.8V, CE ≥ V DD – 0.2V

COM .—620μA

IND .—650AUTO

—675t SDR Data Retention Setup Time See Data Retention Waveform 0

——ns t RDR

Recovery Time

See Data Retention Waveform

t RC

—

Note :

1. Typical values are measured at V DD =

2.5V, T A = 25O

C. Not 100% tested.

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IS64WV6416BLL IS61WV6416BLL

ORDERING INFORMATION

Industrial Temperature Range: –40°C to +85°C

Speed (ns)

Order Part No.Package

12IS61WV6416BLL-12TI Plastic TSOP

12IS61WV6416BLL-12TLI Plastic TSOP, Lead-free 12IS61WV6416BLL-12BI mini BGA (6mm x 8mm)

IS61WV6416BLL-12BLI

mini BGA (6mm x 8mm), Lead-free

Temperature Range (A3): –40°C to +125°C

Speed (ns)Order Part No.

Package

15 (121)IS64WV6416BLL-15TA3Plastic TSOP

15 (121)IS64WV6416BLL-15TLA3Plastic TSOP, Lead-free 15 (121)IS64WV6416BLL-15BA3mini BGA (6mm x 8mm)

15 (121)

IS64WV6416BLL-15BLA3

mini BGA (6mm x 8mm), Lead-free

Note:

1. Speed = 12ns for V DD = 3.3V + 10%. Speed = 15ns for V DD =

2.5V-

3.6V.

PACKAGING INFORMATION

ISSI

Copyright ? 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to Mini Ball Grid Array

Package Code: B (48-pin)

PACKAGING INFORMATION

ISSI

without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to Plastic TSOP

Package Code: T (Type II)