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SN74LVCH244ADGVR中文资料

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FEATURES

SN54LVCH244A...J OR W PACKAGE SN74LVCH244A...DB, DBQ, DGV, DW,

NS, OR PW PACKAGE

(TOP VIEW)

SN54LVCH244A...FK PACKAGE

(TOP VIEW)

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201918171615141312111OE 1A12Y41A22Y31A32Y21A42Y1GND

V CC 2OE 1Y12A41Y22A31Y32A21Y42A1

3212019

910111213

45678

1716

1514

1Y12A41Y22A31Y3

1A22Y31A32Y21A4

2Y 41A 11O E 1Y 42A 2

O E

2Y 1G N D 2A 1V C C

SN74LVCH244A...RGY PACKAGE

(TOP VIEW)

2345678

19181716151413122OE 1Y12A41Y22A31Y32A21Y4

1A12Y41A22Y31A32Y21A42Y1

1O E

2A 1

V G N D

C C

DESCRIPTION/ORDERING INFORMATION

SN54LVCH244A ,SN74LVCH244A

OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

SCES009O–JULY 1995–REVISED FEBRUARY 2007

?Operate From 1.65V to 3.6V ?I off Supports Partial-Power-Down Mode Operation

?Inputs Accept Voltages to 5.5V ?Bus Hold on Data Inputs Eliminates the Need ?Max t pd of 5.9ns at 3.3V

for External Pullup/Pulldown Resistors

?Typical V OLP (Output Ground Bounce)?Latch-Up Performance Exceeds 250mA Per <0.8V at V CC =3.3V,T A =25°C

JESD 17

?Typical V OHV (Output V OH Undershoot)?

ESD Protection Exceeds JESD 22

>2V at V CC =3.3V,T A =25°C

–2000-V Human-Body Model (A114-A)?

Support Mixed-Mode Signal Operation on All Ports

–200-V Machine Model (A115-A)

(5-V Input/Output Voltage With 3.3-V V CC )

–1000-V Charged-Device Model (C101)

The SN54LVCH244A octal buffer/line driver is designed for 2.7-V to 3.6-V V CC operation,and the SN74LVCH244A octal buffer/line driver is designed for 1.65-V to 3.6-V V CC operation.

These devices are organized as two 4-bit line drivers with separate output-enable (OE)inputs.When OE is low,these devices pass data from the A inputs to the Y outputs.When OE is high,the outputs are in the high-impedance state.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic https://www.wendangku.net/doc/fc6669879.html,e of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

Inputs can be driven from either 3.3-V or 5-V devices.This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

These devices are fully specified for partial-power-down applications using I off .The I off circuitry disables the outputs,preventing damaging current backflow through the devices when they are powered down.

To ensure the high-impedance state during power up or power down,OE should be tied to V CC through a pullup resistor;the minimum value of the resistor is determined by the current-sinking capability of the driver.

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1Y11OE

1A1

1Y21A2

1Y31A3

1Y41A4

2Y1

2OE

2A1

2Y2

2A2

2Y3

2A3

2Y4

2A4

SN54LVCH244A ,SN74LVCH244A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

SCES009O–JULY 1995–REVISED FEBRUARY 2007

ORDERING INFORMATION

T A

PACKAGE (1)

ORDERABLE PART NUMBER TOP-SIDE MARKING QFN –RGY Reel of 1000SN74LVCH244ARGYR LCH244A Tube of 25SN74LVCH244ADW SOIC –DW LVCH244A Reel of 2000SN74LVCH244ADWR SOP –NS

Reel of 2000SN74LVCH244ANSR LVCH244A SSOP –DB

Reel of 2000SN74LVCH244ADBR LCH244A –40°C to 85°C

SSOP (QSOP)–DBQ Reel of 2500SN74LVCH244ADBQR LVCH244A

Tube of 70SN74LVCH244APW TSSOP –PW Reel of 2000SN74LVCH244APWR LCH244A

Reel of 250SN74LVCH244APWT TVSOP –DGV Reel of 2000SN74LVCH244ADGVR LCH244A

CDIP –J

Tube of 20SNJ54LVCH244AJ SNJ54LVCH244AJ –55°C to 125°C

CFP –W Tube of 85SNJ54LVCH244AW SNJ54LVCH244AW LCCC –FK

Tube of 55

SNJ54LVCH244AFK

SNJ54LVCH244AFK (1)

Package drawings,standard packing quantities,thermal data,symbolization,and PCB design guidelines are available at https://www.wendangku.net/doc/fc6669879.html,/sc/package.

FUNCTION TABLE (EACH BUFFER)

INPUTS OUTPUT

OE A L H H L L L H

LOGIC DIAGRAM (POSITIVE LOGIC)

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Absolute Maximum Ratings(1)SN54LVCH244A,SN74LVCH244A OCTAL BUFFERS/DRIVERS

WITH3-STATE OUTPUTS SCES009O–JULY1995–REVISED FEBRUARY2007

over operating free-air temperature range(unless otherwise noted)

MIN MAX UNIT V CC Supply voltage range–0.5 6.5V

V I Input voltage range(2)–0.5 6.5V

V O Voltage range applied to any output in the high-impedance or power-off state(2)–0.5 6.5V

V O Voltage range applied to any output in the high or low state(2)(3)–0.5V CC+0.5V

I IK Input clamp current V I<0–50mA I OK Output clamp current V O<0–50mA I O Continuous output current±50mA

Continuous current through V CC or GND±100mA

DB package(4)70

DBQ package(4)68

DGV package(4)92

θJA Package thermal impedance DW package(4)58°C/W

NS package(4)60

PW package(4)83

RGY package(5)37

T stg Storage temperature range–65150°C (1)Stresses beyond those listed under"absolute maximum ratings"may cause permanent damage to the device.These are stress ratings

only,and functional operation of the device at these or any other conditions beyond those indicated under"recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

(3)The value of V CC is provided in the recommended operating conditions table.

(4)The package thermal impedance is calculated in accordance with JESD51-7.

(5)The package thermal impedance is calculated in accordance with JESD51-5.

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Recommended Operating Conditions (1)

SN54LVCH244A ,SN74LVCH244A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

SCES009O–JULY 1995–REVISED FEBRUARY 2007

SN54LVCH244A

SN74LVCH244A

UNIT MIN

MAX MIN MAX Operating

2 3.6

1.65 3.6

V CC

Supply voltage

Data retention only 1.5

1.5

V CC =1.65V to 1.95V

0.65×V CC

V IH

High-level input voltage

V CC =2.3V to 2.7V 1.7V

V CC =2.7V to 3.6V 22

V CC =1.65V to 1.95V

0.35×V CC

V IL Low-level input voltage V CC =2.3V to 2.7V 0.7V V CC =2.7V to 3.6V

0.80.8V I Input voltage 0 5.50 5.5V High or low state 0V CC 0V CC V O

Output voltage

V 3-state 0

5.5

5.5V CC =1.65V

–4V CC =2.3V –8I OH

High-level output current

mA V CC =2.7V –12–12V CC =3V –24

–24V CC =1.65V

4V CC =2.3V 8I OL

Low-level output current

mA V CC =2.7V 1212V CC =3V

2424?t/?v Input transition rise or fall rate 1010ns/V T A Operating free-air temperature

–55

125

–40

°C (1)

All unused control inputs of the device must be held at V CC or GND to ensure proper device operation.Refer to the TI application report,Implications of Slow or Floating CMOS Inputs ,literature number SCBA004.

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Electrical Characteristics SN54LVCH244A,SN74LVCH244A OCTAL BUFFERS/DRIVERS

WITH3-STATE OUTPUTS SCES009O–JULY1995–REVISED FEBRUARY2007

over recommended operating free-air temperature range(unless otherwise noted)

SN54LVCH244A SN74LVCH244A PARAMETER TEST CONDITIONS V CC UNIT

MIN TYP(1)MAX MIN TYP(1)MAX

1.65V to3.6V V CC–0.2

I OH=–100μA

2.7V to

3.6V V CC–0.2

I OH=–4mA 1.65V 1.2

V OH I OH=–8mA 2.3V 1.7V

2.7V 2.2 2.2

I OH=–12mA

3V 2.4 2.4

I OH=–24mA3V 2.2 2.2

1.65V to3.6V0.2

I OL=100μA

2.7V to

3.6V0.2

I OL=4mA 1.65V0.45

V OL V

I OL=8mA 2.3V0.7

I OL=12mA 2.7V0.40.4

I OL=24mA3V0.550.55

I I V I=0to5.5V 3.6V±5±5μA

I off V I or V O=5.5V0±10μA

V I=0.58V(2)

1.65V

V I=1.07V(2)

V I=0.7V45

2.3V

I I(hold)V I=1.7V–45μA

V I=0.8V7575

V I=2V–75–75

V I=0to3.6V(3) 3..6V±500±500

I OZ V O=0to5.5V 3.6V±15±10μA

V I=V CC or GND1010

I CC I O=0 3.6VμA

3.6V≤V I≤5.5V(4)1010

One input at V CC–0.6V,

?I CC 2.7V to3.6V500500μA Other inputs at V CC or GND

C i V I=V CC or GN

D 3.3V4124pF

C o V O=V CC or GN

D 3.3V 5.512 5.5pF

(1)All typical values are at V CC=3.3V,T A=25°C.

(2)This information was not available at the time of publication.

(3)This is the bus-hold maximum dynamic current required to switch the input from one state to another.

(4)This applies in the disabled state only.

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Switching Characteristics

Operating Characteristics

SN54LVCH244A ,SN74LVCH244A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

SCES009O–JULY 1995–REVISED FEBRUARY 2007

over recommended operating free-air temperature range (unless otherwise noted)(see Figure 1)

SN54LVCH244A

FROM TO V CC =3.3V PARAMETER

V CC =2.7V UNIT

(INPUT)(OUTPUT)

±0.3V MIN MAX

MIN MAX t pd A Y 7.51 6.5ns t en OE Y 918ns t dis

ns over recommended operating free-air temperature range (unless otherwise noted)(see Figure 1)

SN74LVCH244A

FROM TO V CC =1.8V V CC =2.5V V CC =3.3V PARAMETER

V CC =2.7V UNIT

(INPUT)(OUTPUT)

±0.15V ±0.2V ±0.3V MIN MAX

MIN

MAX

MIN MAX

MIN MAX t pd A Y (1)(1)(1)(1) 6.9 1.5 5.9ns t en OE Y (1)(1)(1)(1)8.617.6ns t dis

(1)

6.8

1.5

5.8

(1)

This information was not available at the time of publication.

T A =25°C

V CC =1.8V

V CC =2.5V

V CC =3.3V

TEST PARAMETER

UNIT CONDITIONS TYP

TYP

TYP Outputs enabled (1)(1)47Power dissipation capacitance C pd f =10MHz

per buffer/driver

Outputs disabled

(1)

This information was not available at the time of publication.

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PARAMETER MEASUREMENT INFORMATION

From Output Under Test

LOAD CIRCUIT

Open Data Input

Timing Input

V I

0 V

V I

0 V

Input

VOLTAGE WAVEFORMS SETUP AND HOLD TIMES

VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES

INVERTING AND NONINVERTING OUTPUTS

VOLTAGE WAVEFORMS PULSE DURATION

V OH

V OL

V I

0 V Input

Output Waveform 1S1 at V LOAD (see Note B)

Output Waveform 2S1 at GND (see Note B)

V OL

V OH V LOAD /2

0 V

≈0 V

V I

VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING

Output

t PLH /t PHL t PLZ /t PZL t PHZ /t PZH

Open V LOAD GND

TEST S1NOTES: A.C L includes probe and jig capacitance.

B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z O = 50 ?.D.The outputs are measured one at a time, with one transition per measurement.E.t PLZ and t PHZ are the same as t dis .F.t PZL and t PZH are the same as t en .G.t PLH and t PHL are the same as t pd .

H.All parameters and waveforms are not applicable to all devices.

Output Control V I

1.8 V ± 0.15 V

2.5 V ± 0.2 V

2.7 V

3.3 V ± 0.3 V

1 k ?500 ?500 ?500 ?

V CC R L 2 × V CC 2 × V CC 6 V 6 V

V LOAD C L 30 pF 30 pF 50 pF 50 pF

0.15 V 0.15 V 0.3 V 0.3 V

V ?V CC V CC 2.7 V 2.7 V

V I V CC /2V CC /21.5 V 1.5 V

V M t r /t f ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns

INPUTS SN54LVCH244A ,SN74LVCH244A

OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

SCES009O–JULY 1995–REVISED FEBRUARY 2007

Figure 1.Load Circuit and Voltage Waveforms

PACKAGING INFORMATION

Orderable

Device Status (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)

Lead/Ball Finish

MSL Peak Temp (3)

5962-9754201Q2A ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type 5962-9754201QRA ACTIVE CDIP J 201TBD A42SNPB N /A for Pkg Type 5962-9754201QSA ACTIVE CFP W 201TBD A42N /A for Pkg Type 5962-9754201V2A ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type

5962-9754201VRA ACTIVE CDIP J 201TBD A42SNPB N /A for Pkg Type 5962-9754201VSA ACTIVE CFP W 201

TBD A42N /A for Pkg Type SN74LVCH244ADBLE OBSOLETE SSOP DB 20TBD

Call TI Call TI

SN74LVCH244ADBQR ACTIVE SSOP/QSOP DBQ 202500Green (RoHS &

no Sb/Br)CU NIPDAU Level-2-260C-1YEAR SN74LVCH244ADBQRE4ACTIVE SSOP/QSOP DBQ 202500Green (RoHS &

no Sb/Br)CU NIPDAU Level-2-260C-1YEAR SN74LVCH244ADBQRG4ACTIVE SSOP/QSOP DBQ 202500Green (RoHS &

no Sb/Br)CU NIPDAU Level-2-260C-1YEAR SN74LVCH244ADBR ACTIVE SSOP DB 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244ADBRE4ACTIVE SSOP DB 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244ADBRG4ACTIVE SSOP DB 202000

TBD

Call TI Call TI

SN74LVCH244ADGVR ACTIVE TVSOP DGV 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244ADGVRE4ACTIVE TVSOP DGV 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244ADGVRG4ACTIVE TVSOP DGV 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244ADW ACTIVE SOIC DW 2025Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244ADWE4ACTIVE SOIC DW 2025Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244ADWG4ACTIVE SOIC DW 2025

Green (RoHS &no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM SN74LVCH244ADWR ACTIVE SOIC DW 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244ADWRE4ACTIVE SOIC DW 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244ADWRG4ACTIVE SOIC DW 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244ANSR ACTIVE SO NS 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244ANSRE4ACTIVE SO NS 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244APW ACTIVE TSSOP PW 2070Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244APWE4ACTIVE TSSOP PW 2070Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244APWG4ACTIVE TSSOP PW 2070

Green (RoHS &no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM SN74LVCH244APWLE OBSOLETE TSSOP PW 20TBD

Call TI Call TI

SN74LVCH244APWR

ACTIVE

TSSOP

2000Green (RoHS &

CU NIPDAU

Level-1-260C-UNLIM

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26-May-2007

Orderable Device

Status (1)

Package Type Package Drawing Pins Package Qty

Eco Plan (2)

Lead/Ball Finish

MSL Peak Temp (3)

no Sb/Br)

SN74LVCH244APWRE4ACTIVE TSSOP PW 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244APWRG4ACTIVE TSSOP PW 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244APWT ACTIVE TSSOP PW 20250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244APWTE4ACTIVE TSSOP PW 20250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVCH244APWTG4ACTIVE TSSOP PW 20250

Green (RoHS &no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM SN74LVCH244ARGYR ACTIVE QFN RGY 201000Green (RoHS &

no Sb/Br)CU NIPDAU Level-2-260C-1YEAR SN74LVCH244ARGYRG4ACTIVE QFN RGY 201000Green (RoHS &

no Sb/Br)CU NIPDAU

Level-2-260C-1YEAR

SNJ54LVCH244AFK ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type SNJ54LVCH244AJ ACTIVE CDIP J 201TBD A42SNPB N /A for Pkg Type SNJ54LVCH244AW

ACTIVE

CFP

TBD

A42

N /A for Pkg Type

(1)

The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.

LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.

NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.

PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.

(2)

Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check https://www.wendangku.net/doc/fc6669879.html,/productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where

designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.

Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)

(3)

MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.

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26-May-2007

TAPE AND REEL

INFORMATION

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19-May-2007

Device

Package Pins Site

Reel Diameter (mm)Reel Width (mm)A0(mm)B0(mm)K0(mm)

P1(mm)W (mm)Pin1Quadrant SN74LVCH244ADBQR DBQ 20MLA 33016 6.59.0 2.1816Q1SN74LVCH244ADBR DB 20MLA 330168.27.5 2.51216Q1SN74LVCH244ADGVR DGV 20MLA 330127.0 5.6 1.6812Q1SN74LVCH244ADWR DW 20MLA 3302410.813.0 2.71224

Q1SN74LVCH244ANSR NS 20MLA 330248.213.0 2.51224Q1SN74LVCH244APWR PW 20MLA 33016 6.957.1 1.6816Q1SN74LVCH244ARGYR

RGY

MLA

180

3.8

4.8

1.6

TAPE AND REEL BOX INFORMATION

Device

Package Pins Site Length (mm)

Width (mm)

Height (mm)

SN74LVCH244ADBQR DBQ 20MLA 0.00.00.0SN74LVCH244ADBR DB 20MLA 342.9336.628.58SN74LVCH244ADGVR DGV 20MLA 338.1340.520.64SN74LVCH244ADWR DW 20MLA 333.2333.231.75SN74LVCH244ANSR NS 20MLA 333.2333.231.75SN74LVCH244APWR PW 20MLA 342.9336.628.58SN74LVCH244ARGYR

RGY

MLA

190.0

212.7

31.75

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19-May-2007

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